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crypto: hisilicon/qm - add UACCE_CMD_QM_SET_QP_INFO support

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To be compatible with accelerator devices of different
versions, 'UACCE_CMD_QM_SET_QP_INFO' ioctl is added to obtain
queue information in userspace, including queue depth and buffer
description size.

Signed-off-by: Weili Qian <qianweili@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This commit is contained in:
Weili Qian 2022-09-09 17:46:57 +08:00 • committed by Herbert Xu
parent 129a9f3401
commit c832da79cb
2 changed files with 34 additions and 4 deletions
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17
include/uapi/misc/uacce/hisi_qm.h
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@ -14,11 +14,26 @@ struct hisi_qp_ctx {
__u16 qc_type;
};
/**
* struct hisi_qp_info - User data for hisi qp.
* @sqe_size: Submission queue element size
* @sq_depth: The number of sqe
* @cq_depth: The number of cqe
* @reserved: Reserved data
*/
struct hisi_qp_info {
__u32 sqe_size;
__u16 sq_depth;
__u16 cq_depth;
__u64 reserved;
};
#define HISI_QM_API_VER_BASE "hisi_qm_v1"
#define HISI_QM_API_VER2_BASE "hisi_qm_v2"
#define HISI_QM_API_VER3_BASE "hisi_qm_v3"
/* UACCE_CMD_QM_SET_QP_CTX: Set qp algorithm type */
#define UACCE_CMD_QM_SET_QP_CTX _IOWR('H', 10, struct hisi_qp_ctx)
/* UACCE_CMD_QM_SET_QP_INFO: Set qp depth and BD size */
#define UACCE_CMD_QM_SET_QP_INFO _IOWR('H', 11, struct hisi_qp_info)
#endif