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drm/amdgpu/display: properly guard dc_dsc_stream_bandwidth_in_kbps

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Move the function protoype to the right header and guard
the call with CONFIG_DRM_AMD_DC_DCN as DSC is only available
with DCN.

Fixes: 8c2f14c36f ("drm/amd/display: Add changes for dsc bpp in 16ths and unify bw calculations")
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: Dillon Varone <dillon.varone@amd.com>
Cc: Stephen Rothwell <sfr@canb.auug.org.au>
This commit is contained in:
Alex Deucher 2021-03-18 22:15:06 -04:00
parent 7a78e2bc86
commit c645e4b80c
2 changed files with 4 additions and 2 deletions
Download patch file Download diff file Expand all files Collapse all files

4
drivers/gpu/drm/amd/display/dc/core/dc_link.c
View file

@ -3498,17 +3498,17 @@ void dc_link_enable_hpd_filter(struct dc_link *link, bool enable)
}
}
uint32_t dc_dsc_stream_bandwidth_in_kbps(uint32_t pix_clk_100hz, uint32_t bpp_x16);
uint32_t dc_bandwidth_in_kbps_from_timing(
const struct dc_crtc_timing *timing)
{
uint32_t bits_per_channel = 0;
uint32_t kbps;
#if defined(CONFIG_DRM_AMD_DC_DCN)
if (timing->flags.DSC) {
return dc_dsc_stream_bandwidth_in_kbps(timing->pix_clk_100hz, timing->dsc_cfg.bits_per_pixel);
}
#endif
switch (timing->display_color_depth) {
case COLOR_DEPTH_666:

2
drivers/gpu/drm/amd/display/dc/dc_dsc.h
View file

@ -88,4 +88,6 @@ void dc_dsc_policy_set_max_target_bpp_limit(uint32_t limit);
void dc_dsc_policy_set_enable_dsc_when_not_needed(bool enable);
uint32_t dc_dsc_stream_bandwidth_in_kbps(uint32_t pix_clk_100hz, uint32_t bpp_x16);
#endif