MTD updates for 3.15:
- A few SPI NOR ID definitions - Kill the NAND "max pagesize" restriction - Fix some x16 bus-width NAND support - Add NAND JEDEC parameter page support - DT bindings for NAND ECC - GPMI NAND updates (subpage reads) - More OMAP NAND refactoring - New STMicro SPI NOR driver (now in 40 patches!) - A few other random bugfixes -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.14 (GNU/Linux) iQIcBAABAgAGBQJTP6x+AAoJEFySrpd9RFgtit0P/jLWsjMK8G2ldPC4bMZsXmDF n3c71GcCRlUq4Qzb4rtZx9DANLAh+JyRrMOKCPg6dAMegFdmUqDOpZpNp0vF57KG myFjqTk+n5y0tfSkWLMUFt0tQ8ArDp3IBkQCUWkD5LgG50EWmjveIQGH0kFnkE39 Kytqvw17RV7f81tIs+WvKt8++YWD2X1VTpTi0S4fx2bJ99bJDBf/GgdoQpj2oirt igXmloUFEsob9JHZ3qumcUm9vaHwv2TiouZTvRyGdJCCoPdpJEZO4Ka6e4uAVarT 6kMKXBk3lj2GsilOSFFCNetXfy5Bf0TkJkv4rDjh3R1Y4J/hSgraVCbWXdKhb6tj RmwesdFMjsyS4f/Rhk5PXwJgGL9uK2mi6bk/SmXU0AMgCDSa5zjshY8Wq6C6uXwk LqlnK8l3h8Txotbc/XJIL+QGMbMkYQI8gxWTHFaqzDtkMe36mnGs9Zec3oso/s2d CNRpq5+dMZ6qF0z3zpOQHmFbaOekivMy7kCKMXer6ONsrQBNwTdmkwy+SdqnWsLF YdJttwV/RRcE0SRvK6GrhvzkGlV83Z8RPny6hC1kbrgQ0ffoy2CmIqyWNObK1RXf sYqoF8TCtR6Y8rHHi5dzZ1lria+nm8pb4+UfQLRI0mK8og7YW+fIfHXxqRrZZIrt No8NCPBKWzyew2UE0AiQ =CKih -----END PGP SIGNATURE----- Merge tag 'for-linus-20140405' of git://git.infradead.org/linux-mtd Pull MTD updates from Brian Norris: - A few SPI NOR ID definitions - Kill the NAND "max pagesize" restriction - Fix some x16 bus-width NAND support - Add NAND JEDEC parameter page support - DT bindings for NAND ECC - GPMI NAND updates (subpage reads) - More OMAP NAND refactoring - New STMicro SPI NOR driver (now in 40 patches!) - A few other random bugfixes * tag 'for-linus-20140405' of git://git.infradead.org/linux-mtd: (120 commits) Fix index regression in nand_read_subpage mtd: diskonchip: mem resource name is not optional mtd: nand: fix mention to CONFIG_MTD_NAND_ECC_BCH mtd: nand: fix GET/SET_FEATURES address on 16-bit devices mtd: omap2: Use devm_ioremap_resource() mtd: denali_dt: Use devm_ioremap_resource() mtd: devices: elm: update DRIVER_NAME as "omap-elm" mtd: devices: elm: configure parallel channels based on ecc_steps mtd: devices: elm: clean elm_load_syndrome mtd: devices: elm: check for hardware engine's design constraints mtd: st_spi_fsm: Succinctly reorganise .remove() mtd: st_spi_fsm: Allow loop to run at least once before giving up CPU mtd: st_spi_fsm: Correct vendor name spelling issue - missing "M" mtd: st_spi_fsm: Avoid duplicating MTD core code mtd: st_spi_fsm: Remove useless consts from function arguments mtd: st_spi_fsm: Convert ST SPI FSM (NOR) Flash driver to new DT partitions mtd: st_spi_fsm: Move runtime configurable msg sequences into device's struct mtd: st_spi_fsm: Supply the W25Qxxx chip specific configuration call-back mtd: st_spi_fsm: Supply the S25FLxxx chip specific configuration call-back mtd: st_spi_fsm: Supply the MX25xxx chip specific configuration call-back ...
This commit is contained in:
commit
c29aa153ef
83 changed files with 3183 additions and 649 deletions
|
|
@ -204,12 +204,12 @@ struct mtd_info {
|
|||
struct mtd_oob_ops *ops);
|
||||
int (*_write_oob) (struct mtd_info *mtd, loff_t to,
|
||||
struct mtd_oob_ops *ops);
|
||||
int (*_get_fact_prot_info) (struct mtd_info *mtd, struct otp_info *buf,
|
||||
size_t len);
|
||||
int (*_get_fact_prot_info) (struct mtd_info *mtd, size_t len,
|
||||
size_t *retlen, struct otp_info *buf);
|
||||
int (*_read_fact_prot_reg) (struct mtd_info *mtd, loff_t from,
|
||||
size_t len, size_t *retlen, u_char *buf);
|
||||
int (*_get_user_prot_info) (struct mtd_info *mtd, struct otp_info *buf,
|
||||
size_t len);
|
||||
int (*_get_user_prot_info) (struct mtd_info *mtd, size_t len,
|
||||
size_t *retlen, struct otp_info *buf);
|
||||
int (*_read_user_prot_reg) (struct mtd_info *mtd, loff_t from,
|
||||
size_t len, size_t *retlen, u_char *buf);
|
||||
int (*_write_user_prot_reg) (struct mtd_info *mtd, loff_t to,
|
||||
|
|
@ -278,12 +278,12 @@ static inline int mtd_write_oob(struct mtd_info *mtd, loff_t to,
|
|||
return mtd->_write_oob(mtd, to, ops);
|
||||
}
|
||||
|
||||
int mtd_get_fact_prot_info(struct mtd_info *mtd, struct otp_info *buf,
|
||||
size_t len);
|
||||
int mtd_get_fact_prot_info(struct mtd_info *mtd, size_t len, size_t *retlen,
|
||||
struct otp_info *buf);
|
||||
int mtd_read_fact_prot_reg(struct mtd_info *mtd, loff_t from, size_t len,
|
||||
size_t *retlen, u_char *buf);
|
||||
int mtd_get_user_prot_info(struct mtd_info *mtd, struct otp_info *buf,
|
||||
size_t len);
|
||||
int mtd_get_user_prot_info(struct mtd_info *mtd, size_t len, size_t *retlen,
|
||||
struct otp_info *buf);
|
||||
int mtd_read_user_prot_reg(struct mtd_info *mtd, loff_t from, size_t len,
|
||||
size_t *retlen, u_char *buf);
|
||||
int mtd_write_user_prot_reg(struct mtd_info *mtd, loff_t to, size_t len,
|
||||
|
|
|
|||
|
|
@ -51,14 +51,6 @@ extern int nand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len);
|
|||
/* The maximum number of NAND chips in an array */
|
||||
#define NAND_MAX_CHIPS 8
|
||||
|
||||
/*
|
||||
* This constant declares the max. oobsize / page, which
|
||||
* is supported now. If you add a chip with bigger oobsize/page
|
||||
* adjust this accordingly.
|
||||
*/
|
||||
#define NAND_MAX_OOBSIZE 744
|
||||
#define NAND_MAX_PAGESIZE 8192
|
||||
|
||||
/*
|
||||
* Constants for hardware specific CLE/ALE/NCE function
|
||||
*
|
||||
|
|
@ -350,6 +342,84 @@ struct nand_onfi_vendor_micron {
|
|||
u8 param_revision;
|
||||
} __packed;
|
||||
|
||||
struct jedec_ecc_info {
|
||||
u8 ecc_bits;
|
||||
u8 codeword_size;
|
||||
__le16 bb_per_lun;
|
||||
__le16 block_endurance;
|
||||
u8 reserved[2];
|
||||
} __packed;
|
||||
|
||||
/* JEDEC features */
|
||||
#define JEDEC_FEATURE_16_BIT_BUS (1 << 0)
|
||||
|
||||
struct nand_jedec_params {
|
||||
/* rev info and features block */
|
||||
/* 'J' 'E' 'S' 'D' */
|
||||
u8 sig[4];
|
||||
__le16 revision;
|
||||
__le16 features;
|
||||
u8 opt_cmd[3];
|
||||
__le16 sec_cmd;
|
||||
u8 num_of_param_pages;
|
||||
u8 reserved0[18];
|
||||
|
||||
/* manufacturer information block */
|
||||
char manufacturer[12];
|
||||
char model[20];
|
||||
u8 jedec_id[6];
|
||||
u8 reserved1[10];
|
||||
|
||||
/* memory organization block */
|
||||
__le32 byte_per_page;
|
||||
__le16 spare_bytes_per_page;
|
||||
u8 reserved2[6];
|
||||
__le32 pages_per_block;
|
||||
__le32 blocks_per_lun;
|
||||
u8 lun_count;
|
||||
u8 addr_cycles;
|
||||
u8 bits_per_cell;
|
||||
u8 programs_per_page;
|
||||
u8 multi_plane_addr;
|
||||
u8 multi_plane_op_attr;
|
||||
u8 reserved3[38];
|
||||
|
||||
/* electrical parameter block */
|
||||
__le16 async_sdr_speed_grade;
|
||||
__le16 toggle_ddr_speed_grade;
|
||||
__le16 sync_ddr_speed_grade;
|
||||
u8 async_sdr_features;
|
||||
u8 toggle_ddr_features;
|
||||
u8 sync_ddr_features;
|
||||
__le16 t_prog;
|
||||
__le16 t_bers;
|
||||
__le16 t_r;
|
||||
__le16 t_r_multi_plane;
|
||||
__le16 t_ccs;
|
||||
__le16 io_pin_capacitance_typ;
|
||||
__le16 input_pin_capacitance_typ;
|
||||
__le16 clk_pin_capacitance_typ;
|
||||
u8 driver_strength_support;
|
||||
__le16 t_ald;
|
||||
u8 reserved4[36];
|
||||
|
||||
/* ECC and endurance block */
|
||||
u8 guaranteed_good_blocks;
|
||||
__le16 guaranteed_block_endurance;
|
||||
struct jedec_ecc_info ecc_info[4];
|
||||
u8 reserved5[29];
|
||||
|
||||
/* reserved */
|
||||
u8 reserved6[148];
|
||||
|
||||
/* vendor */
|
||||
__le16 vendor_rev_num;
|
||||
u8 reserved7[88];
|
||||
|
||||
/* CRC for Parameter Page */
|
||||
__le16 crc;
|
||||
} __packed;
|
||||
|
||||
/**
|
||||
* struct nand_hw_control - Control structure for hardware controller (e.g ECC generator) shared among independent devices
|
||||
* @lock: protection lock
|
||||
|
|
@ -418,7 +488,7 @@ struct nand_ecc_ctrl {
|
|||
int (*read_page)(struct mtd_info *mtd, struct nand_chip *chip,
|
||||
uint8_t *buf, int oob_required, int page);
|
||||
int (*read_subpage)(struct mtd_info *mtd, struct nand_chip *chip,
|
||||
uint32_t offs, uint32_t len, uint8_t *buf);
|
||||
uint32_t offs, uint32_t len, uint8_t *buf, int page);
|
||||
int (*write_subpage)(struct mtd_info *mtd, struct nand_chip *chip,
|
||||
uint32_t offset, uint32_t data_len,
|
||||
const uint8_t *data_buf, int oob_required);
|
||||
|
|
@ -435,17 +505,17 @@ struct nand_ecc_ctrl {
|
|||
|
||||
/**
|
||||
* struct nand_buffers - buffer structure for read/write
|
||||
* @ecccalc: buffer for calculated ECC
|
||||
* @ecccode: buffer for ECC read from flash
|
||||
* @databuf: buffer for data - dynamically sized
|
||||
* @ecccalc: buffer pointer for calculated ECC, size is oobsize.
|
||||
* @ecccode: buffer pointer for ECC read from flash, size is oobsize.
|
||||
* @databuf: buffer pointer for data, size is (page size + oobsize).
|
||||
*
|
||||
* Do not change the order of buffers. databuf and oobrbuf must be in
|
||||
* consecutive order.
|
||||
*/
|
||||
struct nand_buffers {
|
||||
uint8_t ecccalc[NAND_MAX_OOBSIZE];
|
||||
uint8_t ecccode[NAND_MAX_OOBSIZE];
|
||||
uint8_t databuf[NAND_MAX_PAGESIZE + NAND_MAX_OOBSIZE];
|
||||
uint8_t *ecccalc;
|
||||
uint8_t *ecccode;
|
||||
uint8_t *databuf;
|
||||
};
|
||||
|
||||
/**
|
||||
|
|
@ -523,8 +593,12 @@ struct nand_buffers {
|
|||
* @subpagesize: [INTERN] holds the subpagesize
|
||||
* @onfi_version: [INTERN] holds the chip ONFI version (BCD encoded),
|
||||
* non 0 if ONFI supported.
|
||||
* @jedec_version: [INTERN] holds the chip JEDEC version (BCD encoded),
|
||||
* non 0 if JEDEC supported.
|
||||
* @onfi_params: [INTERN] holds the ONFI page parameter when ONFI is
|
||||
* supported, 0 otherwise.
|
||||
* @jedec_params: [INTERN] holds the JEDEC parameter page when JEDEC is
|
||||
* supported, 0 otherwise.
|
||||
* @read_retries: [INTERN] the number of read retry modes supported
|
||||
* @onfi_set_features: [REPLACEABLE] set the features for ONFI nand
|
||||
* @onfi_get_features: [REPLACEABLE] get the features for ONFI nand
|
||||
|
|
@ -597,7 +671,11 @@ struct nand_chip {
|
|||
int badblockbits;
|
||||
|
||||
int onfi_version;
|
||||
struct nand_onfi_params onfi_params;
|
||||
int jedec_version;
|
||||
union {
|
||||
struct nand_onfi_params onfi_params;
|
||||
struct nand_jedec_params jedec_params;
|
||||
};
|
||||
|
||||
int read_retries;
|
||||
|
||||
|
|
@ -840,4 +918,29 @@ static inline bool nand_is_slc(struct nand_chip *chip)
|
|||
{
|
||||
return chip->bits_per_cell == 1;
|
||||
}
|
||||
|
||||
/**
|
||||
* Check if the opcode's address should be sent only on the lower 8 bits
|
||||
* @command: opcode to check
|
||||
*/
|
||||
static inline int nand_opcode_8bits(unsigned int command)
|
||||
{
|
||||
switch (command) {
|
||||
case NAND_CMD_READID:
|
||||
case NAND_CMD_PARAM:
|
||||
case NAND_CMD_GET_FEATURES:
|
||||
case NAND_CMD_SET_FEATURES:
|
||||
return 1;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* return the supported JEDEC features. */
|
||||
static inline int jedec_feature(struct nand_chip *chip)
|
||||
{
|
||||
return chip->jedec_version ? le16_to_cpu(chip->jedec_params.features)
|
||||
: 0;
|
||||
}
|
||||
#endif /* __LINUX_MTD_NAND_H */
|
||||
|
|
|
|||
|
|
@ -13,6 +13,8 @@
|
|||
|
||||
#include <linux/of.h>
|
||||
int of_get_nand_ecc_mode(struct device_node *np);
|
||||
int of_get_nand_ecc_step_size(struct device_node *np);
|
||||
int of_get_nand_ecc_strength(struct device_node *np);
|
||||
int of_get_nand_bus_width(struct device_node *np);
|
||||
bool of_get_nand_on_flash_bbt(struct device_node *np);
|
||||
|
||||
|
|
@ -23,6 +25,16 @@ static inline int of_get_nand_ecc_mode(struct device_node *np)
|
|||
return -ENOSYS;
|
||||
}
|
||||
|
||||
static inline int of_get_nand_ecc_step_size(struct device_node *np)
|
||||
{
|
||||
return -ENOSYS;
|
||||
}
|
||||
|
||||
static inline int of_get_nand_ecc_strength(struct device_node *np)
|
||||
{
|
||||
return -ENOSYS;
|
||||
}
|
||||
|
||||
static inline int of_get_nand_bus_width(struct device_node *np)
|
||||
{
|
||||
return -ENOSYS;
|
||||
|
|
|
|||
|
|
@ -26,13 +26,6 @@ enum bch_ecc {
|
|||
/* ELM support 8 error syndrome process */
|
||||
#define ERROR_VECTOR_MAX 8
|
||||
|
||||
#define BCH8_ECC_OOB_BYTES 13
|
||||
#define BCH4_ECC_OOB_BYTES 7
|
||||
/* RBL requires 14 byte even though BCH8 uses only 13 byte */
|
||||
#define BCH8_SIZE (BCH8_ECC_OOB_BYTES + 1)
|
||||
/* Uses 1 extra byte to handle erased pages */
|
||||
#define BCH4_SIZE (BCH4_ECC_OOB_BYTES + 1)
|
||||
|
||||
/**
|
||||
* struct elm_errorvec - error vector for elm
|
||||
* @error_reported: set true for vectors error is reported
|
||||
|
|
@ -50,5 +43,6 @@ struct elm_errorvec {
|
|||
|
||||
void elm_decode_bch_error_page(struct device *dev, u8 *ecc_calc,
|
||||
struct elm_errorvec *err_vec);
|
||||
int elm_config(struct device *dev, enum bch_ecc bch_type);
|
||||
int elm_config(struct device *dev, enum bch_ecc bch_type,
|
||||
int ecc_steps, int ecc_step_size, int ecc_syndrome_size);
|
||||
#endif /* __ELM_H */
|
||||
|
|
|
|||
|
|
@ -1,5 +1,4 @@
|
|||
/* arch/arm/mach-s3c2410/include/mach/nand.h
|
||||
*
|
||||
/*
|
||||
* Copyright (c) 2004 Simtec Electronics
|
||||
* Ben Dooks <ben@simtec.co.uk>
|
||||
*
|
||||
|
|
@ -10,6 +9,9 @@
|
|||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#ifndef __MTD_NAND_S3C2410_H
|
||||
#define __MTD_NAND_S3C2410_H
|
||||
|
||||
/**
|
||||
* struct s3c2410_nand_set - define a set of one or more nand chips
|
||||
* @disable_ecc: Entirely disable ECC - Dangerous
|
||||
|
|
@ -65,3 +67,5 @@ struct s3c2410_platform_nand {
|
|||
* it with the s3c_device_nand. This allows @nand to be __initdata.
|
||||
*/
|
||||
extern void s3c_nand_set_platdata(struct s3c2410_platform_nand *nand);
|
||||
|
||||
#endif /*__MTD_NAND_S3C2410_H */
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue