Merge branches 'apple/dart', 'arm/mediatek', 'arm/msm', 'arm/smmu', 'ppc/pamu', 'x86/vt-d', 'x86/amd' and 'vfio-notifier-fix' into next
This commit is contained in:
commit
b0dacee202
787 changed files with 9052 additions and 4706 deletions
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@ -79,6 +79,14 @@ struct amba_driver {
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void (*remove)(struct amba_device *);
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void (*shutdown)(struct amba_device *);
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const struct amba_id *id_table;
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/*
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* For most device drivers, no need to care about this flag as long as
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* all DMAs are handled through the kernel DMA API. For some special
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* ones, for example VFIO drivers, they know how to manage the DMA
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* themselves and set this flag so that the IOMMU layer will allow them
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* to setup and manage their own I/O address space.
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*/
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bool driver_managed_dma;
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};
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/*
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@ -269,6 +269,7 @@ struct folio_iter {
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size_t offset;
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size_t length;
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/* private: for use by the iterator */
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struct folio *_next;
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size_t _seg_count;
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int _i;
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};
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@ -283,6 +284,7 @@ static inline void bio_first_folio(struct folio_iter *fi, struct bio *bio,
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PAGE_SIZE * (bvec->bv_page - &fi->folio->page);
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fi->_seg_count = bvec->bv_len;
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fi->length = min(folio_size(fi->folio) - fi->offset, fi->_seg_count);
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fi->_next = folio_next(fi->folio);
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fi->_i = i;
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}
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@ -290,9 +292,10 @@ static inline void bio_next_folio(struct folio_iter *fi, struct bio *bio)
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{
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fi->_seg_count -= fi->length;
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if (fi->_seg_count) {
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fi->folio = folio_next(fi->folio);
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fi->folio = fi->_next;
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fi->offset = 0;
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fi->length = min(folio_size(fi->folio), fi->_seg_count);
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fi->_next = folio_next(fi->folio);
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} else if (fi->_i + 1 < bio->bi_vcnt) {
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bio_first_folio(fi, bio, fi->_i + 1);
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} else {
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@ -163,7 +163,6 @@ struct request {
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struct rb_node rb_node; /* sort/lookup */
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struct bio_vec special_vec;
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void *completion_data;
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int error_count; /* for legacy drivers, don't use */
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};
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@ -167,7 +167,7 @@ static inline int suspend_disable_secondary_cpus(void) { return 0; }
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static inline void suspend_enable_secondary_cpus(void) { }
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#endif /* !CONFIG_PM_SLEEP_SMP */
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void cpu_startup_entry(enum cpuhp_state state);
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void __noreturn cpu_startup_entry(enum cpuhp_state state);
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void cpu_idle_poll_ctrl(bool enable);
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@ -59,6 +59,8 @@ struct fwnode_handle;
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* bus supports.
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* @dma_configure: Called to setup DMA configuration on a device on
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* this bus.
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* @dma_cleanup: Called to cleanup DMA configuration on a device on
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* this bus.
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* @pm: Power management operations of this bus, callback the specific
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* device driver's pm-ops.
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* @iommu_ops: IOMMU specific operations for this bus, used to attach IOMMU
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@ -103,6 +105,7 @@ struct bus_type {
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int (*num_vf)(struct device *dev);
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int (*dma_configure)(struct device *dev);
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void (*dma_cleanup)(struct device *dev);
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const struct dev_pm_ops *pm;
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@ -32,6 +32,13 @@ struct fsl_mc_io;
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* @shutdown: Function called at shutdown time to quiesce the device
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* @suspend: Function called when a device is stopped
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* @resume: Function called when a device is resumed
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* @driver_managed_dma: Device driver doesn't use kernel DMA API for DMA.
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* For most device drivers, no need to care about this flag
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* as long as all DMAs are handled through the kernel DMA API.
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* For some special ones, for example VFIO drivers, they know
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* how to manage the DMA themselves and set this flag so that
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* the IOMMU layer will allow them to setup and manage their
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* own I/O address space.
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*
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* Generic DPAA device driver object for device drivers that are registered
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* with a DPRC bus. This structure is to be embedded in each device-specific
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@ -45,6 +52,7 @@ struct fsl_mc_driver {
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void (*shutdown)(struct fsl_mc_device *dev);
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int (*suspend)(struct fsl_mc_device *dev, pm_message_t state);
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int (*resume)(struct fsl_mc_device *dev);
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bool driver_managed_dma;
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};
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#define to_fsl_mc_driver(_drv) \
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@ -539,7 +539,8 @@ struct dmar_domain {
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u8 has_iotlb_device: 1;
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u8 iommu_coherency: 1; /* indicate coherency of iommu access */
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u8 iommu_snooping: 1; /* indicate snooping control feature */
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u8 force_snooping : 1; /* Create IOPTEs with snoop control */
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u8 set_pte_snp:1;
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struct list_head devices; /* all devices' list */
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struct iova_domain iovad; /* iova's that belong to this domain */
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@ -9,7 +9,7 @@
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#define __INTEL_SVM_H__
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/* Page Request Queue depth */
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#define PRQ_ORDER 2
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#define PRQ_ORDER 4
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#define PRQ_RING_MASK ((0x1000 << PRQ_ORDER) - 0x20)
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#define PRQ_DEPTH ((0x1000 << PRQ_ORDER) >> 5)
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@ -103,10 +103,11 @@ static inline bool iommu_is_dma_domain(struct iommu_domain *domain)
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}
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enum iommu_cap {
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IOMMU_CAP_CACHE_COHERENCY, /* IOMMU can enforce cache coherent DMA
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transactions */
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IOMMU_CAP_CACHE_COHERENCY, /* IOMMU_CACHE is supported */
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IOMMU_CAP_INTR_REMAP, /* IOMMU supports interrupt isolation */
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IOMMU_CAP_NOEXEC, /* IOMMU_NOEXEC flag */
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IOMMU_CAP_PRE_BOOT_PROTECTION, /* Firmware says it used the IOMMU for
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DMA protection and we should too */
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};
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/* These are the possible reserved region types */
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@ -272,6 +273,9 @@ struct iommu_ops {
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* @iotlb_sync: Flush all queued ranges from the hardware TLBs and empty flush
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* queue
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* @iova_to_phys: translate iova to physical address
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* @enforce_cache_coherency: Prevent any kind of DMA from bypassing IOMMU_CACHE,
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* including no-snoop TLPs on PCIe or other platform
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* specific mechanisms.
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* @enable_nesting: Enable nesting
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* @set_pgtable_quirks: Set io page table quirks (IO_PGTABLE_QUIRK_*)
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* @free: Release the domain after use.
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@ -300,6 +304,7 @@ struct iommu_domain_ops {
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phys_addr_t (*iova_to_phys)(struct iommu_domain *domain,
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dma_addr_t iova);
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bool (*enforce_cache_coherency)(struct iommu_domain *domain);
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int (*enable_nesting)(struct iommu_domain *domain);
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int (*set_pgtable_quirks)(struct iommu_domain *domain,
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unsigned long quirks);
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@ -407,16 +412,10 @@ static inline const struct iommu_ops *dev_iommu_ops(struct device *dev)
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return dev->iommu->iommu_dev->ops;
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}
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#define IOMMU_GROUP_NOTIFY_ADD_DEVICE 1 /* Device added */
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#define IOMMU_GROUP_NOTIFY_DEL_DEVICE 2 /* Pre Device removed */
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#define IOMMU_GROUP_NOTIFY_BIND_DRIVER 3 /* Pre Driver bind */
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#define IOMMU_GROUP_NOTIFY_BOUND_DRIVER 4 /* Post Driver bind */
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#define IOMMU_GROUP_NOTIFY_UNBIND_DRIVER 5 /* Pre Driver unbind */
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#define IOMMU_GROUP_NOTIFY_UNBOUND_DRIVER 6 /* Post Driver unbind */
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extern int bus_set_iommu(struct bus_type *bus, const struct iommu_ops *ops);
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extern int bus_iommu_probe(struct bus_type *bus);
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extern bool iommu_present(struct bus_type *bus);
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extern bool device_iommu_capable(struct device *dev, enum iommu_cap cap);
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extern bool iommu_capable(struct bus_type *bus, enum iommu_cap cap);
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extern struct iommu_domain *iommu_domain_alloc(struct bus_type *bus);
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extern struct iommu_group *iommu_group_get_by_id(int id);
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@ -478,10 +477,6 @@ extern int iommu_group_for_each_dev(struct iommu_group *group, void *data,
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extern struct iommu_group *iommu_group_get(struct device *dev);
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extern struct iommu_group *iommu_group_ref_get(struct iommu_group *group);
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extern void iommu_group_put(struct iommu_group *group);
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extern int iommu_group_register_notifier(struct iommu_group *group,
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struct notifier_block *nb);
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extern int iommu_group_unregister_notifier(struct iommu_group *group,
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struct notifier_block *nb);
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extern int iommu_register_device_fault_handler(struct device *dev,
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iommu_dev_fault_handler_t handler,
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void *data);
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@ -675,6 +670,13 @@ struct iommu_sva *iommu_sva_bind_device(struct device *dev,
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void iommu_sva_unbind_device(struct iommu_sva *handle);
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u32 iommu_sva_get_pasid(struct iommu_sva *handle);
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int iommu_device_use_default_domain(struct device *dev);
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void iommu_device_unuse_default_domain(struct device *dev);
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int iommu_group_claim_dma_owner(struct iommu_group *group, void *owner);
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void iommu_group_release_dma_owner(struct iommu_group *group);
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bool iommu_group_dma_owner_claimed(struct iommu_group *group);
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#else /* CONFIG_IOMMU_API */
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struct iommu_ops {};
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@ -689,6 +691,11 @@ static inline bool iommu_present(struct bus_type *bus)
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return false;
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}
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static inline bool device_iommu_capable(struct device *dev, enum iommu_cap cap)
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{
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return false;
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}
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static inline bool iommu_capable(struct bus_type *bus, enum iommu_cap cap)
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{
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return false;
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@ -871,18 +878,6 @@ static inline void iommu_group_put(struct iommu_group *group)
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{
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}
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static inline int iommu_group_register_notifier(struct iommu_group *group,
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struct notifier_block *nb)
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{
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return -ENODEV;
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}
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static inline int iommu_group_unregister_notifier(struct iommu_group *group,
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struct notifier_block *nb)
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{
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return 0;
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}
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static inline
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int iommu_register_device_fault_handler(struct device *dev,
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iommu_dev_fault_handler_t handler,
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@ -1031,6 +1026,30 @@ static inline struct iommu_fwspec *dev_iommu_fwspec_get(struct device *dev)
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{
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return NULL;
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}
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static inline int iommu_device_use_default_domain(struct device *dev)
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{
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return 0;
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}
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static inline void iommu_device_unuse_default_domain(struct device *dev)
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{
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}
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static inline int
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iommu_group_claim_dma_owner(struct iommu_group *group, void *owner)
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{
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return -ENODEV;
|
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}
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static inline void iommu_group_release_dma_owner(struct iommu_group *group)
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{
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}
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static inline bool iommu_group_dma_owner_claimed(struct iommu_group *group)
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{
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return false;
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}
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#endif /* CONFIG_IOMMU_API */
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|
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/**
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|
|
|
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|
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@ -285,7 +285,7 @@ static inline char *hex_byte_pack_upper(char *buf, u8 byte)
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return buf;
|
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}
|
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|
||||
extern int hex_to_bin(char ch);
|
||||
extern int hex_to_bin(unsigned char ch);
|
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extern int __must_check hex2bin(u8 *dst, const char *src, size_t count);
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extern char *bin2hex(char *dst, const void *src, size_t count);
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|
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|
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|
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|
|
@ -389,10 +389,8 @@ struct mtd_info {
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/* List of partitions attached to this MTD device */
|
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struct list_head partitions;
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|
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union {
|
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struct mtd_part part;
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struct mtd_master master;
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||||
};
|
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struct mtd_part part;
|
||||
struct mtd_master master;
|
||||
};
|
||||
|
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static inline struct mtd_info *mtd_get_master(struct mtd_info *mtd)
|
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|
|
|
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|
|
@ -169,7 +169,7 @@ enum {
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|||
#define NETIF_F_HW_HSR_FWD __NETIF_F(HW_HSR_FWD)
|
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#define NETIF_F_HW_HSR_DUP __NETIF_F(HW_HSR_DUP)
|
||||
|
||||
/* Finds the next feature with the highest number of the range of start till 0.
|
||||
/* Finds the next feature with the highest number of the range of start-1 till 0.
|
||||
*/
|
||||
static inline int find_next_netdev_feature(u64 feature, unsigned long start)
|
||||
{
|
||||
|
|
@ -188,7 +188,7 @@ static inline int find_next_netdev_feature(u64 feature, unsigned long start)
|
|||
for ((bit) = find_next_netdev_feature((mask_addr), \
|
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NETDEV_FEATURE_COUNT); \
|
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(bit) >= 0; \
|
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(bit) = find_next_netdev_feature((mask_addr), (bit) - 1))
|
||||
(bit) = find_next_netdev_feature((mask_addr), (bit)))
|
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|
||||
/* Features valid for ethtool to change */
|
||||
/* = all defined minus driver/device-class-related */
|
||||
|
|
|
|||
|
|
@ -199,10 +199,10 @@ struct net_device_stats {
|
|||
* Try to fit them in a single cache line, for dev_get_stats() sake.
|
||||
*/
|
||||
struct net_device_core_stats {
|
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local_t rx_dropped;
|
||||
local_t tx_dropped;
|
||||
local_t rx_nohandler;
|
||||
} __aligned(4 * sizeof(local_t));
|
||||
unsigned long rx_dropped;
|
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unsigned long tx_dropped;
|
||||
unsigned long rx_nohandler;
|
||||
} __aligned(4 * sizeof(unsigned long));
|
||||
|
||||
#include <linux/cache.h>
|
||||
#include <linux/skbuff.h>
|
||||
|
|
@ -3843,15 +3843,15 @@ static __always_inline bool __is_skb_forwardable(const struct net_device *dev,
|
|||
return false;
|
||||
}
|
||||
|
||||
struct net_device_core_stats *netdev_core_stats_alloc(struct net_device *dev);
|
||||
struct net_device_core_stats __percpu *netdev_core_stats_alloc(struct net_device *dev);
|
||||
|
||||
static inline struct net_device_core_stats *dev_core_stats(struct net_device *dev)
|
||||
static inline struct net_device_core_stats __percpu *dev_core_stats(struct net_device *dev)
|
||||
{
|
||||
/* This READ_ONCE() pairs with the write in netdev_core_stats_alloc() */
|
||||
struct net_device_core_stats __percpu *p = READ_ONCE(dev->core_stats);
|
||||
|
||||
if (likely(p))
|
||||
return this_cpu_ptr(p);
|
||||
return p;
|
||||
|
||||
return netdev_core_stats_alloc(dev);
|
||||
}
|
||||
|
|
@ -3859,14 +3859,11 @@ static inline struct net_device_core_stats *dev_core_stats(struct net_device *de
|
|||
#define DEV_CORE_STATS_INC(FIELD) \
|
||||
static inline void dev_core_stats_##FIELD##_inc(struct net_device *dev) \
|
||||
{ \
|
||||
struct net_device_core_stats *p; \
|
||||
struct net_device_core_stats __percpu *p; \
|
||||
\
|
||||
preempt_disable(); \
|
||||
p = dev_core_stats(dev); \
|
||||
\
|
||||
if (p) \
|
||||
local_inc(&p->FIELD); \
|
||||
preempt_enable(); \
|
||||
this_cpu_inc(p->FIELD); \
|
||||
}
|
||||
DEV_CORE_STATS_INC(rx_dropped)
|
||||
DEV_CORE_STATS_INC(tx_dropped)
|
||||
|
|
|
|||
|
|
@ -895,6 +895,13 @@ struct module;
|
|||
* created once it is bound to the driver.
|
||||
* @driver: Driver model structure.
|
||||
* @dynids: List of dynamically added device IDs.
|
||||
* @driver_managed_dma: Device driver doesn't use kernel DMA API for DMA.
|
||||
* For most device drivers, no need to care about this flag
|
||||
* as long as all DMAs are handled through the kernel DMA API.
|
||||
* For some special ones, for example VFIO drivers, they know
|
||||
* how to manage the DMA themselves and set this flag so that
|
||||
* the IOMMU layer will allow them to setup and manage their
|
||||
* own I/O address space.
|
||||
*/
|
||||
struct pci_driver {
|
||||
struct list_head node;
|
||||
|
|
@ -913,6 +920,7 @@ struct pci_driver {
|
|||
const struct attribute_group **dev_groups;
|
||||
struct device_driver driver;
|
||||
struct pci_dynids dynids;
|
||||
bool driver_managed_dma;
|
||||
};
|
||||
|
||||
static inline struct pci_driver *to_pci_driver(struct device_driver *drv)
|
||||
|
|
|
|||
|
|
@ -210,6 +210,14 @@ struct platform_driver {
|
|||
struct device_driver driver;
|
||||
const struct platform_device_id *id_table;
|
||||
bool prevent_deferred_probe;
|
||||
/*
|
||||
* For most device drivers, no need to care about this flag as long as
|
||||
* all DMAs are handled through the kernel DMA API. For some special
|
||||
* ones, for example VFIO drivers, they know how to manage the DMA
|
||||
* themselves and set this flag so that the IOMMU layer will allow them
|
||||
* to setup and manage their own I/O address space.
|
||||
*/
|
||||
bool driver_managed_dma;
|
||||
};
|
||||
|
||||
#define to_platform_driver(drv) (container_of((drv), struct platform_driver, \
|
||||
|
|
@ -328,8 +336,6 @@ extern int platform_pm_restore(struct device *dev);
|
|||
#define platform_pm_restore NULL
|
||||
#endif
|
||||
|
||||
extern int platform_dma_configure(struct device *dev);
|
||||
|
||||
#ifdef CONFIG_PM_SLEEP
|
||||
#define USE_PLATFORM_PM_SLEEP_OPS \
|
||||
.suspend = platform_pm_suspend, \
|
||||
|
|
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|||
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@ -270,5 +270,6 @@ struct plat_stmmacenet_data {
|
|||
int msi_rx_base_vec;
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||||
int msi_tx_base_vec;
|
||||
bool use_phy_wol;
|
||||
bool sph_disable;
|
||||
};
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -160,6 +160,7 @@ struct rpc_add_xprt_test {
|
|||
#define RPC_CLNT_CREATE_NO_RETRANS_TIMEOUT (1UL << 9)
|
||||
#define RPC_CLNT_CREATE_SOFTERR (1UL << 10)
|
||||
#define RPC_CLNT_CREATE_REUSEPORT (1UL << 11)
|
||||
#define RPC_CLNT_CREATE_CONNECTED (1UL << 12)
|
||||
|
||||
struct rpc_clnt *rpc_create(struct rpc_create_args *args);
|
||||
struct rpc_clnt *rpc_bind_new_program(struct rpc_clnt *,
|
||||
|
|
|
|||
|
|
@ -465,6 +465,7 @@ static inline struct tb_xdomain *tb_service_parent(struct tb_service *svc)
|
|||
* @msix_ida: Used to allocate MSI-X vectors for rings
|
||||
* @going_away: The host controller device is about to disappear so when
|
||||
* this flag is set, avoid touching the hardware anymore.
|
||||
* @iommu_dma_protection: An IOMMU will isolate external-facing ports.
|
||||
* @interrupt_work: Work scheduled to handle ring interrupt when no
|
||||
* MSI-X is used.
|
||||
* @hop_count: Number of rings (end point hops) supported by NHI.
|
||||
|
|
@ -479,6 +480,7 @@ struct tb_nhi {
|
|||
struct tb_ring **rx_rings;
|
||||
struct ida msix_ida;
|
||||
bool going_away;
|
||||
bool iommu_dma_protection;
|
||||
struct work_struct interrupt_work;
|
||||
u32 hop_count;
|
||||
unsigned long quirks;
|
||||
|
|
|
|||
|
|
@ -15,7 +15,7 @@
|
|||
#define BDO_MODE_CARRIER2 (5 << 28)
|
||||
#define BDO_MODE_CARRIER3 (6 << 28)
|
||||
#define BDO_MODE_EYE (7 << 28)
|
||||
#define BDO_MODE_TESTDATA (8 << 28)
|
||||
#define BDO_MODE_TESTDATA (8U << 28)
|
||||
|
||||
#define BDO_MODE_MASK(mode) ((mode) & 0xf0000000)
|
||||
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue