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dmaengine updates for v5.19-rc1

Browse source 
New support:
  - Tegra gpcdma Driver support
  - Qualcomm SM8350, Sm8450 and SC7280 Device support
  - Renesas RZN1 dma and platform support
 
  Updates:
  - stm32 device pause/resume support and updates
  - DMA memset ops Documentation and usage clarification
  - Deprecate '#dma-channels' & '#dma-requests' bindings
  - Driver updates for stm32, ptdma idsx etc
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Merge tag 'dmaengine-5.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine

Pull dmaengine updates from Vinod Koul:
 "Nothing special, this includes a couple of new device support and new
  driver support and bunch of driver updates.

  New support:

   - Tegra gpcdma driver support

   - Qualcomm SM8350, Sm8450 and SC7280 device support

   - Renesas RZN1 dma and platform support

  Updates:

   - stm32 device pause/resume support and updates

   - DMA memset ops Documentation and usage clarification

   - deprecate '#dma-channels' & '#dma-requests' bindings

   - driver updates for stm32, ptdma idsx etc"

* tag 'dmaengine-5.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine: (87 commits)
  dmaengine: idxd: make idxd_wq_enable() return 0 if wq is already enabled
  dmaengine: sun6i: Add support for the D1 variant
  dmaengine: sun6i: Add support for 34-bit physical addresses
  dmaengine: sun6i: Do not use virt_to_phys
  dt-bindings: dma: sun50i-a64: Add compatible for D1
  dmaengine: tegra: Remove unused switch case
  dmaengine: tegra: Fix uninitialized variable usage
  dmaengine: stm32-dma: add device_pause/device_resume support
  dmaengine: stm32-dma: rename pm ops before dma pause/resume introduction
  dmaengine: stm32-dma: pass DMA_SxSCR value to stm32_dma_handle_chan_done()
  dmaengine: stm32-dma: introduce stm32_dma_sg_inc to manage chan->next_sg
  dmaengine: stm32-dmamux: avoid reset of dmamux if used by coprocessor
  dmaengine: qcom: gpi: Add support for sc7280
  dt-bindings: dma: pl330: Add power-domains
  dmaengine: stm32-mdma: use dev_dbg on non-busy channel spurious it
  dmaengine: stm32-mdma: fix chan initialization in stm32_mdma_irq_handler()
  dmaengine: stm32-mdma: remove GISR1 register
  dmaengine: ti: deprecate '#dma-channels'
  dmaengine: mmp: deprecate '#dma-channels'
  dmaengine: pxa: deprecate '#dma-channels' and '#dma-requests'
  ...
This commit is contained in:
Linus Torvalds 2022-05-29 11:38:27 -07:00
commit b00ed48bb0
64 changed files with 2745 additions and 350 deletions
Download patch file Download diff file Expand all files Collapse all files

31
include/uapi/linux/idxd.h
View file

@ -53,6 +53,11 @@ enum idxd_scmd_stat {
/* IAX */
#define IDXD_OP_FLAG_RD_SRC2_AECS 0x010000
#define IDXD_OP_FLAG_RD_SRC2_2ND 0x020000
#define IDXD_OP_FLAG_WR_SRC2_AECS_COMP 0x040000
#define IDXD_OP_FLAG_WR_SRC2_AECS_OVFL 0x080000
#define IDXD_OP_FLAG_SRC2_STS 0x100000
#define IDXD_OP_FLAG_CRC_RFC3720 0x200000
/* Opcode */
enum dsa_opcode {
@ -81,6 +86,18 @@ enum iax_opcode {
IAX_OPCODE_MEMMOVE,
IAX_OPCODE_DECOMPRESS = 0x42,
IAX_OPCODE_COMPRESS,
IAX_OPCODE_CRC64,
IAX_OPCODE_ZERO_DECOMP_32 = 0x48,
IAX_OPCODE_ZERO_DECOMP_16,
IAX_OPCODE_DECOMP_32 = 0x4c,
IAX_OPCODE_DECOMP_16,
IAX_OPCODE_SCAN = 0x50,
IAX_OPCODE_SET_MEMBER,
IAX_OPCODE_EXTRACT,
IAX_OPCODE_SELECT,
IAX_OPCODE_RLE_BURST,
IAX_OPCDE_FIND_UNIQUE,
IAX_OPCODE_EXPAND,
};
/* Completion record status */
@ -120,6 +137,7 @@ enum iax_completion_status {
IAX_COMP_NONE = 0,
IAX_COMP_SUCCESS,
IAX_COMP_PAGE_FAULT_IR = 0x04,
IAX_COMP_ANALYTICS_ERROR = 0x0a,
IAX_COMP_OUTBUF_OVERFLOW,
IAX_COMP_BAD_OPCODE = 0x10,
IAX_COMP_INVALID_FLAGS,
@ -140,7 +158,10 @@ enum iax_completion_status {
IAX_COMP_WATCHDOG,
IAX_COMP_INVALID_COMP_FLAG = 0x30,
IAX_COMP_INVALID_FILTER_FLAG,
IAX_COMP_INVALID_NUM_ELEMS = 0x33,
IAX_COMP_INVALID_INPUT_SIZE,
IAX_COMP_INVALID_NUM_ELEMS,
IAX_COMP_INVALID_SRC1_WIDTH,
IAX_COMP_INVALID_INVERT_OUT,
};
#define DSA_COMP_STATUS_MASK 0x7f
@ -319,8 +340,12 @@ struct iax_completion_record {
uint32_t output_size;
uint8_t output_bits;
uint8_t rsvd3;
uint16_t rsvd4;
uint64_t rsvd5[4];
uint16_t xor_csum;
uint32_t crc;
uint32_t min;
uint32_t max;
uint32_t sum;
uint64_t rsvd4[2];
} __attribute__((packed));
struct iax_raw_completion_record {