USB patches for 3.17-rc1
Here is the big USB driver update for 3.17-rc1. Loads of gadget driver changes in here, including some big file movements to make things easier to manage over time. There's also the usual xhci and uas driver updates, and a handful of other changes in here. The changelog has the full details. All of these have been in linux-next for a while. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iEYEABECAAYFAlPf2ZIACgkQMUfUDdst+ylvQwCfQKPKcwhtq4vJ2imUzJROEZwN ygYAnRpFpH/19X59uGSdE7DAdhbitqKg =uPh1 -----END PGP SIGNATURE----- Merge tag 'usb-3.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb Pull USB updates from Greg KH: "Here is the big USB driver update for 3.17-rc1. Loads of gadget driver changes in here, including some big file movements to make things easier to manage over time. There's also the usual xhci and uas driver updates, and a handful of other changes in here. The changelog has the full details. All of these have been in linux-next for a while" * tag 'usb-3.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (211 commits) USB: devio: fix issue with log flooding uas: Log a warning when we cannot use uas because the hcd lacks streams uas: Only complain about missing sg if all other checks succeed xhci: Add missing checks for xhci_alloc_command failure xhci: Rename Asrock P67 pci product-id to EJ168 xhci: Blacklist using streams on the Etron EJ168 controller uas: Limit qdepth to 32 when connected over usb-2 uwb/whci: use correct structure type name in sizeof usb-core bInterval quirk USB: serial: ftdi_sio: Add support for new Xsens devices USB: serial: ftdi_sio: Annotate the current Xsens PID assignments usb: chipidea: debug: fix sparse non static symbol warnings usb: ci_hdrc_imx doc: fsl,usbphy is required usb: ci_hdrc_imx: Return -EINVAL for missing USB PHY usb: core: allow zero packet flag for interrupt urbs usb: lvstest: Fix sparse warnings generated by kbuild test bot USB: core: hcd-pci: free IRQ before disabling PCI device when shutting down phy: miphy365x: Represent each PHY channel as a DT subnode phy: miphy365x: Provide support for the MiPHY356x Generic PHY phy: miphy365x: Add Device Tree bindings for the MiPHY365x ...
This commit is contained in:
Linus Torvalds
commit
ae9b475ebe
267 changed files with 11206 additions and 5806 deletions
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@ -23,6 +23,7 @@ enum omap_control_phy_type {
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OMAP_CTRL_TYPE_OTGHS = 1, /* Mailbox OTGHS_CONTROL */
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OMAP_CTRL_TYPE_USB2, /* USB2_PHY, power down in CONTROL_DEV_CONF */
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OMAP_CTRL_TYPE_PIPE3, /* PIPE3 PHY, DPLL & seperate Rx/Tx power */
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OMAP_CTRL_TYPE_PCIE, /* RX TX control of ACSPCIE */
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OMAP_CTRL_TYPE_DRA7USB2, /* USB2 PHY, power and power_aux e.g. DRA7 */
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OMAP_CTRL_TYPE_AM437USB2, /* USB2 PHY, power e.g. AM437x */
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};
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@ -33,6 +34,7 @@ struct omap_control_phy {
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u32 __iomem *otghs_control;
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u32 __iomem *power;
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u32 __iomem *power_aux;
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u32 __iomem *pcie_pcs;
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struct clk *sys_clk;
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@ -63,6 +65,9 @@ enum omap_control_usb_mode {
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#define OMAP_CTRL_PIPE3_PHY_TX_RX_POWERON 0x3
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#define OMAP_CTRL_PIPE3_PHY_TX_RX_POWEROFF 0x0
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#define OMAP_CTRL_PCIE_PCS_MASK 0xff
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#define OMAP_CTRL_PCIE_PCS_DELAY_COUNT_SHIFT 0x8
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#define OMAP_CTRL_USB2_PHY_PD BIT(28)
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#define AM437X_CTRL_USB2_PHY_PD BIT(0)
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@ -74,6 +79,7 @@ enum omap_control_usb_mode {
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void omap_control_phy_power(struct device *dev, int on);
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void omap_control_usb_set_mode(struct device *dev,
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enum omap_control_usb_mode mode);
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void omap_control_pcie_pcs(struct device *dev, u8 id, u8 delay);
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#else
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static inline void omap_control_phy_power(struct device *dev, int on)
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@ -84,6 +90,10 @@ static inline void omap_control_usb_set_mode(struct device *dev,
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enum omap_control_usb_mode mode)
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{
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}
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static inline void omap_control_pcie_pcs(struct device *dev, u8 id, u8 delay)
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{
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}
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#endif
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#endif /* __OMAP_CONTROL_PHY_H__ */
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@ -18,6 +18,7 @@
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#include <linux/of.h>
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#include <linux/device.h>
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#include <linux/pm_runtime.h>
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#include <linux/regulator/consumer.h>
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struct phy;
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@ -65,6 +66,7 @@ struct phy {
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int init_count;
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int power_count;
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struct phy_attrs attrs;
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struct regulator *pwr;
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};
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/**
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@ -156,9 +158,10 @@ void devm_phy_put(struct device *dev, struct phy *phy);
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struct phy *of_phy_get(struct device_node *np, const char *con_id);
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struct phy *of_phy_simple_xlate(struct device *dev,
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struct of_phandle_args *args);
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struct phy *phy_create(struct device *dev, const struct phy_ops *ops,
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struct phy_init_data *init_data);
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struct phy *devm_phy_create(struct device *dev,
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struct phy *phy_create(struct device *dev, struct device_node *node,
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const struct phy_ops *ops,
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struct phy_init_data *init_data);
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struct phy *devm_phy_create(struct device *dev, struct device_node *node,
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const struct phy_ops *ops, struct phy_init_data *init_data);
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void phy_destroy(struct phy *phy);
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void devm_phy_destroy(struct device *dev, struct phy *phy);
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@ -297,13 +300,17 @@ static inline struct phy *of_phy_simple_xlate(struct device *dev,
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}
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static inline struct phy *phy_create(struct device *dev,
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const struct phy_ops *ops, struct phy_init_data *init_data)
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struct device_node *node,
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const struct phy_ops *ops,
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struct phy_init_data *init_data)
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{
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return ERR_PTR(-ENOSYS);
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}
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static inline struct phy *devm_phy_create(struct device *dev,
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const struct phy_ops *ops, struct phy_init_data *init_data)
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struct device_node *node,
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const struct phy_ops *ops,
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struct phy_init_data *init_data)
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{
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return ERR_PTR(-ENOSYS);
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}
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@ -386,6 +386,21 @@ struct usb_composite_driver {
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extern int usb_composite_probe(struct usb_composite_driver *driver);
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extern void usb_composite_unregister(struct usb_composite_driver *driver);
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/**
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* module_usb_composite_driver() - Helper macro for registering a USB gadget
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* composite driver
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* @__usb_composite_driver: usb_composite_driver struct
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*
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* Helper macro for USB gadget composite drivers which do not do anything
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* special in module init/exit. This eliminates a lot of boilerplate. Each
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* module may only use this macro once, and calling it replaces module_init()
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* and module_exit()
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*/
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#define module_usb_composite_driver(__usb_composite_driver) \
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module_driver(__usb_composite_driver, usb_composite_probe, \
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usb_composite_unregister)
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extern void usb_composite_setup_continue(struct usb_composite_dev *cdev);
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extern int composite_dev_prepare(struct usb_composite_driver *composite,
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struct usb_composite_dev *cdev);
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@ -30,4 +30,15 @@
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descriptor */
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#define USB_QUIRK_DELAY_INIT 0x00000040
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/*
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* For high speed and super speed interupt endpoints, the USB 2.0 and
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* USB 3.0 spec require the interval in microframes
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* (1 microframe = 125 microseconds) to be calculated as
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* interval = 2 ^ (bInterval-1).
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*
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* Devices with this quirk report their bInterval as the result of this
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* calculation instead of the exponent variable used in the calculation.
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*/
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#define USB_QUIRK_LINEAR_UFRAME_INTR_BINTERVAL 0x00000080
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#endif /* __LINUX_USB_QUIRKS_H */
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@ -153,6 +153,9 @@ struct renesas_usbhs_driver_param {
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*/
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int pio_dma_border; /* default is 64byte */
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u32 type;
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u32 enable_gpio;
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/*
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* option:
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*/
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@ -160,6 +163,9 @@ struct renesas_usbhs_driver_param {
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u32 has_sudmac:1; /* for SUDMAC */
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};
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#define USBHS_TYPE_R8A7790 1
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#define USBHS_TYPE_R8A7791 2
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/*
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* option:
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*
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199
include/linux/usb/usb338x.h
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199
include/linux/usb/usb338x.h
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@ -0,0 +1,199 @@
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/*
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* USB 338x super/high/full speed USB device controller.
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* Unlike many such controllers, this one talks PCI.
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*
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* Copyright (C) 2002 NetChip Technology, Inc. (http://www.netchip.com)
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* Copyright (C) 2003 David Brownell
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* Copyright (C) 2014 Ricardo Ribalda - Qtechnology/AS
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#ifndef __LINUX_USB_USB338X_H
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#define __LINUX_USB_USB338X_H
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#include <linux/usb/net2280.h>
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/*
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* Extra defined bits for net2280 registers
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*/
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#define SCRATCH 0x0b
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#define DEFECT7374_FSM_FIELD 28
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#define SUPER_SPEED 8
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#define DMA_REQUEST_OUTSTANDING 5
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#define DMA_PAUSE_DONE_INTERRUPT 26
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#define SET_ISOCHRONOUS_DELAY 24
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#define SET_SEL 22
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#define SUPER_SPEED_MODE 8
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/*ep_cfg*/
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#define MAX_BURST_SIZE 24
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#define EP_FIFO_BYTE_COUNT 16
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#define IN_ENDPOINT_ENABLE 14
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#define IN_ENDPOINT_TYPE 12
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#define OUT_ENDPOINT_ENABLE 10
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#define OUT_ENDPOINT_TYPE 8
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struct usb338x_usb_ext_regs {
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u32 usbclass;
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#define DEVICE_PROTOCOL 16
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#define DEVICE_SUB_CLASS 8
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#define DEVICE_CLASS 0
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u32 ss_sel;
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#define U2_SYSTEM_EXIT_LATENCY 8
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#define U1_SYSTEM_EXIT_LATENCY 0
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u32 ss_del;
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#define U2_DEVICE_EXIT_LATENCY 8
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#define U1_DEVICE_EXIT_LATENCY 0
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u32 usb2lpm;
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#define USB_L1_LPM_HIRD 2
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#define USB_L1_LPM_REMOTE_WAKE 1
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#define USB_L1_LPM_SUPPORT 0
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u32 usb3belt;
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#define BELT_MULTIPLIER 10
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#define BEST_EFFORT_LATENCY_TOLERANCE 0
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u32 usbctl2;
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#define LTM_ENABLE 7
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#define U2_ENABLE 6
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#define U1_ENABLE 5
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#define FUNCTION_SUSPEND 4
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#define USB3_CORE_ENABLE 3
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#define USB2_CORE_ENABLE 2
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#define SERIAL_NUMBER_STRING_ENABLE 0
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u32 in_timeout;
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#define GPEP3_TIMEOUT 19
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#define GPEP2_TIMEOUT 18
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#define GPEP1_TIMEOUT 17
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#define GPEP0_TIMEOUT 16
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#define GPEP3_TIMEOUT_VALUE 13
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#define GPEP3_TIMEOUT_ENABLE 12
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#define GPEP2_TIMEOUT_VALUE 9
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#define GPEP2_TIMEOUT_ENABLE 8
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#define GPEP1_TIMEOUT_VALUE 5
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#define GPEP1_TIMEOUT_ENABLE 4
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#define GPEP0_TIMEOUT_VALUE 1
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#define GPEP0_TIMEOUT_ENABLE 0
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u32 isodelay;
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#define ISOCHRONOUS_DELAY 0
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} __packed;
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struct usb338x_fifo_regs {
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/* offset 0x0500, 0x0520, 0x0540, 0x0560, 0x0580 */
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u32 ep_fifo_size_base;
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#define IN_FIFO_BASE_ADDRESS 22
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#define IN_FIFO_SIZE 16
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#define OUT_FIFO_BASE_ADDRESS 6
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#define OUT_FIFO_SIZE 0
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u32 ep_fifo_out_wrptr;
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u32 ep_fifo_out_rdptr;
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u32 ep_fifo_in_wrptr;
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u32 ep_fifo_in_rdptr;
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u32 unused[3];
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} __packed;
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/* Link layer */
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struct usb338x_ll_regs {
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/* offset 0x700 */
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u32 ll_ltssm_ctrl1;
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u32 ll_ltssm_ctrl2;
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u32 ll_ltssm_ctrl3;
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u32 unused[2];
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u32 ll_general_ctrl0;
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u32 ll_general_ctrl1;
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#define PM_U3_AUTO_EXIT 29
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#define PM_U2_AUTO_EXIT 28
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#define PM_U1_AUTO_EXIT 27
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#define PM_FORCE_U2_ENTRY 26
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#define PM_FORCE_U1_ENTRY 25
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#define PM_LGO_COLLISION_SEND_LAU 24
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#define PM_DIR_LINK_REJECT 23
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#define PM_FORCE_LINK_ACCEPT 22
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#define PM_DIR_ENTRY_U3 20
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#define PM_DIR_ENTRY_U2 19
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#define PM_DIR_ENTRY_U1 18
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#define PM_U2_ENABLE 17
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#define PM_U1_ENABLE 16
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#define SKP_THRESHOLD_ADJUST_FMW 8
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#define RESEND_DPP_ON_LRTY_FMW 7
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#define DL_BIT_VALUE_FMW 6
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#define FORCE_DL_BIT 5
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u32 ll_general_ctrl2;
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#define SELECT_INVERT_LANE_POLARITY 7
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#define FORCE_INVERT_LANE_POLARITY 6
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u32 ll_general_ctrl3;
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u32 ll_general_ctrl4;
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u32 ll_error_gen;
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} __packed;
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struct usb338x_ll_lfps_regs {
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/* offset 0x748 */
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u32 ll_lfps_5;
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#define TIMER_LFPS_6US 16
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u32 ll_lfps_6;
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#define TIMER_LFPS_80US 0
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} __packed;
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struct usb338x_ll_tsn_regs {
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/* offset 0x77C */
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u32 ll_tsn_counters_2;
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#define HOT_TX_NORESET_TS2 24
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u32 ll_tsn_counters_3;
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#define HOT_RX_RESET_TS2 0
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} __packed;
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struct usb338x_ll_chi_regs {
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/* offset 0x79C */
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u32 ll_tsn_chicken_bit;
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#define RECOVERY_IDLE_TO_RECOVER_FMW 3
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} __packed;
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/* protocol layer */
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struct usb338x_pl_regs {
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/* offset 0x800 */
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u32 pl_reg_1;
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u32 pl_reg_2;
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u32 pl_reg_3;
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u32 pl_reg_4;
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u32 pl_ep_ctrl;
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/* Protocol Layer Endpoint Control*/
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#define PL_EP_CTRL 0x810
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#define ENDPOINT_SELECT 0
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/* [4:0] */
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#define EP_INITIALIZED 16
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#define SEQUENCE_NUMBER_RESET 17
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#define CLEAR_ACK_ERROR_CODE 20
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u32 pl_reg_6;
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u32 pl_reg_7;
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u32 pl_reg_8;
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u32 pl_ep_status_1;
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/* Protocol Layer Endpoint Status 1*/
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#define PL_EP_STATUS_1 0x820
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#define STATE 16
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#define ACK_GOOD_NORMAL 0x11
|
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#define ACK_GOOD_MORE_ACKS_TO_COME 0x16
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u32 pl_ep_status_2;
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u32 pl_ep_status_3;
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/* Protocol Layer Endpoint Status 3*/
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#define PL_EP_STATUS_3 0x828
|
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#define SEQUENCE_NUMBER 0
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u32 pl_ep_status_4;
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/* Protocol Layer Endpoint Status 4*/
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#define PL_EP_STATUS_4 0x82c
|
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u32 pl_ep_cfg_4;
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/* Protocol Layer Endpoint Configuration 4*/
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#define PL_EP_CFG_4 0x830
|
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#define NON_CTRL_IN_TOLERATE_BAD_DIR 6
|
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} __packed;
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#endif /* __LINUX_USB_USB338X_H */
|
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27
include/linux/usb/xhci_pdriver.h
Normal file
27
include/linux/usb/xhci_pdriver.h
Normal file
|
|
@ -0,0 +1,27 @@
|
|||
/*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
|
||||
* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
||||
* for more details.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef __USB_CORE_XHCI_PDRIVER_H
|
||||
#define __USB_CORE_XHCI_PDRIVER_H
|
||||
|
||||
/**
|
||||
* struct usb_xhci_pdata - platform_data for generic xhci platform driver
|
||||
*
|
||||
* @usb3_lpm_capable: determines if this xhci platform supports USB3
|
||||
* LPM capability
|
||||
*
|
||||
*/
|
||||
struct usb_xhci_pdata {
|
||||
unsigned usb3_lpm_capable:1;
|
||||
};
|
||||
|
||||
#endif /* __USB_CORE_XHCI_PDRIVER_H */
|
||||
Loading…
Add table
Add a link
Reference in a new issue