Merge branch 'for-4.4/drivers' of git://git.kernel.dk/linux-block
Pull block driver updates from Jens Axboe:
"Here are the block driver changes for 4.4. This pull request
contains:
- NVMe:
- Refactor and moving of code to prepare for proper target
support. From Christoph and Jay.
- 32-bit nvme warning fix from Arnd.
- Error initialization fix from me.
- Proper namespace removal and reference counting support from
Keith.
- Device resume fix on IO failure, also from Keith.
- Dependency fix from Keith, now that nvme isn't under the
umbrella of the block anymore.
- Target location and maintainers update from Jay.
- From Ming Lei, the long awaited DIO/AIO support for loop.
- Enable BD-RE writeable opens, from Georgios"
* 'for-4.4/drivers' of git://git.kernel.dk/linux-block: (24 commits)
Update target repo for nvme patch contributions
NVMe: initialize error to '0'
nvme: use an integer value to Linux errno values
nvme: fix 32-bit build warning
NVMe: Add explicit block config dependency
nvme: include <linux/types.ĥ> in <linux/nvme.h>
nvme: move to a new drivers/nvme/host directory
nvme.h: add missing nvme_id_ctrl endianess annotations
nvme: move hardware structures out of the uapi version of nvme.h
nvme: add a local nvme.h header
nvme: properly handle partially initialized queues in nvme_create_io_queues
nvme: merge nvme_dev_start, nvme_dev_resume and nvme_async_probe
nvme: factor reset code into a common helper
nvme: merge nvme_dev_reset into nvme_reset_failed_dev
nvme: delete dev from dev_list in nvme_reset
NVMe: Simplify device resume on io queue failure
NVMe: Namespace removal simplifications
NVMe: Reference count open namespaces
cdrom: Random writing support for BD-RE media
block: loop: support DIO & AIO
...
This commit is contained in:
Linus Torvalds
commit
a9aa31cdc2
19 changed files with 1054 additions and 897 deletions
|
|
@ -15,10 +15,7 @@
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|||
#ifndef _LINUX_NVME_H
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#define _LINUX_NVME_H
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#include <uapi/linux/nvme.h>
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#include <linux/pci.h>
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#include <linux/kref.h>
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#include <linux/blk-mq.h>
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#include <linux/types.h>
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struct nvme_bar {
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__u64 cap; /* Controller Capabilities */
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||||
|
|
@ -76,115 +73,528 @@ enum {
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NVME_CSTS_SHST_MASK = 3 << 2,
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};
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extern unsigned char nvme_io_timeout;
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#define NVME_IO_TIMEOUT (nvme_io_timeout * HZ)
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/*
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* Represents an NVM Express device. Each nvme_dev is a PCI function.
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*/
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struct nvme_dev {
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struct list_head node;
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struct nvme_queue **queues;
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struct request_queue *admin_q;
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struct blk_mq_tag_set tagset;
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struct blk_mq_tag_set admin_tagset;
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u32 __iomem *dbs;
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struct device *dev;
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struct dma_pool *prp_page_pool;
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struct dma_pool *prp_small_pool;
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int instance;
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unsigned queue_count;
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unsigned online_queues;
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unsigned max_qid;
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int q_depth;
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u32 db_stride;
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u32 ctrl_config;
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struct msix_entry *entry;
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struct nvme_bar __iomem *bar;
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struct list_head namespaces;
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struct kref kref;
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struct device *device;
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work_func_t reset_workfn;
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struct work_struct reset_work;
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struct work_struct probe_work;
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struct work_struct scan_work;
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char name[12];
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char serial[20];
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char model[40];
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char firmware_rev[8];
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bool subsystem;
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u32 max_hw_sectors;
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u32 stripe_size;
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u32 page_size;
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void __iomem *cmb;
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dma_addr_t cmb_dma_addr;
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u64 cmb_size;
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u32 cmbsz;
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u16 oncs;
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u16 abort_limit;
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u8 event_limit;
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u8 vwc;
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struct nvme_id_power_state {
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__le16 max_power; /* centiwatts */
|
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__u8 rsvd2;
|
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__u8 flags;
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__le32 entry_lat; /* microseconds */
|
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__le32 exit_lat; /* microseconds */
|
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__u8 read_tput;
|
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__u8 read_lat;
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__u8 write_tput;
|
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__u8 write_lat;
|
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__le16 idle_power;
|
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__u8 idle_scale;
|
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__u8 rsvd19;
|
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__le16 active_power;
|
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__u8 active_work_scale;
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__u8 rsvd23[9];
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};
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|
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/*
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* An NVM Express namespace is equivalent to a SCSI LUN
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*/
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struct nvme_ns {
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struct list_head list;
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struct nvme_dev *dev;
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struct request_queue *queue;
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struct gendisk *disk;
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unsigned ns_id;
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int lba_shift;
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u16 ms;
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bool ext;
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u8 pi_type;
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u64 mode_select_num_blocks;
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u32 mode_select_block_len;
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enum {
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NVME_PS_FLAGS_MAX_POWER_SCALE = 1 << 0,
|
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NVME_PS_FLAGS_NON_OP_STATE = 1 << 1,
|
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};
|
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|
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/*
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* The nvme_iod describes the data in an I/O, including the list of PRP
|
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* entries. You can't see it in this data structure because C doesn't let
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* me express that. Use nvme_alloc_iod to ensure there's enough space
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* allocated to store the PRP list.
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*/
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struct nvme_iod {
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unsigned long private; /* For the use of the submitter of the I/O */
|
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int npages; /* In the PRP list. 0 means small pool in use */
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int offset; /* Of PRP list */
|
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int nents; /* Used in scatterlist */
|
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int length; /* Of data, in bytes */
|
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dma_addr_t first_dma;
|
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struct scatterlist meta_sg[1]; /* metadata requires single contiguous buffer */
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struct scatterlist sg[0];
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struct nvme_id_ctrl {
|
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__le16 vid;
|
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__le16 ssvid;
|
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char sn[20];
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char mn[40];
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char fr[8];
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__u8 rab;
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__u8 ieee[3];
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__u8 mic;
|
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__u8 mdts;
|
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__le16 cntlid;
|
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__le32 ver;
|
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__u8 rsvd84[172];
|
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__le16 oacs;
|
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__u8 acl;
|
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__u8 aerl;
|
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__u8 frmw;
|
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__u8 lpa;
|
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__u8 elpe;
|
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__u8 npss;
|
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__u8 avscc;
|
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__u8 apsta;
|
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__le16 wctemp;
|
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__le16 cctemp;
|
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__u8 rsvd270[242];
|
||||
__u8 sqes;
|
||||
__u8 cqes;
|
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__u8 rsvd514[2];
|
||||
__le32 nn;
|
||||
__le16 oncs;
|
||||
__le16 fuses;
|
||||
__u8 fna;
|
||||
__u8 vwc;
|
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__le16 awun;
|
||||
__le16 awupf;
|
||||
__u8 nvscc;
|
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__u8 rsvd531;
|
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__le16 acwu;
|
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__u8 rsvd534[2];
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__le32 sgls;
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__u8 rsvd540[1508];
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struct nvme_id_power_state psd[32];
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__u8 vs[1024];
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};
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static inline u64 nvme_block_nr(struct nvme_ns *ns, sector_t sector)
|
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{
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return (sector >> (ns->lba_shift - 9));
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}
|
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enum {
|
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NVME_CTRL_ONCS_COMPARE = 1 << 0,
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NVME_CTRL_ONCS_WRITE_UNCORRECTABLE = 1 << 1,
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NVME_CTRL_ONCS_DSM = 1 << 2,
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NVME_CTRL_VWC_PRESENT = 1 << 0,
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};
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int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
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void *buf, unsigned bufflen);
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int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
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void *buffer, void __user *ubuffer, unsigned bufflen,
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u32 *result, unsigned timeout);
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int nvme_identify_ctrl(struct nvme_dev *dev, struct nvme_id_ctrl **id);
|
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int nvme_identify_ns(struct nvme_dev *dev, unsigned nsid,
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struct nvme_id_ns **id);
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int nvme_get_log_page(struct nvme_dev *dev, struct nvme_smart_log **log);
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int nvme_get_features(struct nvme_dev *dev, unsigned fid, unsigned nsid,
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dma_addr_t dma_addr, u32 *result);
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int nvme_set_features(struct nvme_dev *dev, unsigned fid, unsigned dword11,
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dma_addr_t dma_addr, u32 *result);
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struct nvme_lbaf {
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__le16 ms;
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__u8 ds;
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__u8 rp;
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};
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struct sg_io_hdr;
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struct nvme_id_ns {
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__le64 nsze;
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__le64 ncap;
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__le64 nuse;
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__u8 nsfeat;
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__u8 nlbaf;
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__u8 flbas;
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__u8 mc;
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__u8 dpc;
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||||
__u8 dps;
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__u8 nmic;
|
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__u8 rescap;
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__u8 fpi;
|
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__u8 rsvd33;
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__le16 nawun;
|
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__le16 nawupf;
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__le16 nacwu;
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__le16 nabsn;
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__le16 nabo;
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__le16 nabspf;
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__u16 rsvd46;
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__le64 nvmcap[2];
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__u8 rsvd64[40];
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__u8 nguid[16];
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__u8 eui64[8];
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struct nvme_lbaf lbaf[16];
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__u8 rsvd192[192];
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__u8 vs[3712];
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};
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int nvme_sg_io(struct nvme_ns *ns, struct sg_io_hdr __user *u_hdr);
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int nvme_sg_io32(struct nvme_ns *ns, unsigned long arg);
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int nvme_sg_get_version_num(int __user *ip);
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enum {
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NVME_NS_FEAT_THIN = 1 << 0,
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NVME_NS_FLBAS_LBA_MASK = 0xf,
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NVME_NS_FLBAS_META_EXT = 0x10,
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NVME_LBAF_RP_BEST = 0,
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NVME_LBAF_RP_BETTER = 1,
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NVME_LBAF_RP_GOOD = 2,
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NVME_LBAF_RP_DEGRADED = 3,
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NVME_NS_DPC_PI_LAST = 1 << 4,
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NVME_NS_DPC_PI_FIRST = 1 << 3,
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NVME_NS_DPC_PI_TYPE3 = 1 << 2,
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NVME_NS_DPC_PI_TYPE2 = 1 << 1,
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NVME_NS_DPC_PI_TYPE1 = 1 << 0,
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NVME_NS_DPS_PI_FIRST = 1 << 3,
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NVME_NS_DPS_PI_MASK = 0x7,
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NVME_NS_DPS_PI_TYPE1 = 1,
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NVME_NS_DPS_PI_TYPE2 = 2,
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NVME_NS_DPS_PI_TYPE3 = 3,
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};
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struct nvme_smart_log {
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__u8 critical_warning;
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__u8 temperature[2];
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__u8 avail_spare;
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__u8 spare_thresh;
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__u8 percent_used;
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__u8 rsvd6[26];
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__u8 data_units_read[16];
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__u8 data_units_written[16];
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__u8 host_reads[16];
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__u8 host_writes[16];
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__u8 ctrl_busy_time[16];
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__u8 power_cycles[16];
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__u8 power_on_hours[16];
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__u8 unsafe_shutdowns[16];
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__u8 media_errors[16];
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__u8 num_err_log_entries[16];
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__le32 warning_temp_time;
|
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__le32 critical_comp_time;
|
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__le16 temp_sensor[8];
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__u8 rsvd216[296];
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};
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enum {
|
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NVME_SMART_CRIT_SPARE = 1 << 0,
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NVME_SMART_CRIT_TEMPERATURE = 1 << 1,
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NVME_SMART_CRIT_RELIABILITY = 1 << 2,
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NVME_SMART_CRIT_MEDIA = 1 << 3,
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NVME_SMART_CRIT_VOLATILE_MEMORY = 1 << 4,
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};
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enum {
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NVME_AER_NOTICE_NS_CHANGED = 0x0002,
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};
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struct nvme_lba_range_type {
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__u8 type;
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__u8 attributes;
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__u8 rsvd2[14];
|
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__u64 slba;
|
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__u64 nlb;
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__u8 guid[16];
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||||
__u8 rsvd48[16];
|
||||
};
|
||||
|
||||
enum {
|
||||
NVME_LBART_TYPE_FS = 0x01,
|
||||
NVME_LBART_TYPE_RAID = 0x02,
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NVME_LBART_TYPE_CACHE = 0x03,
|
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NVME_LBART_TYPE_SWAP = 0x04,
|
||||
|
||||
NVME_LBART_ATTRIB_TEMP = 1 << 0,
|
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NVME_LBART_ATTRIB_HIDE = 1 << 1,
|
||||
};
|
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|
||||
struct nvme_reservation_status {
|
||||
__le32 gen;
|
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__u8 rtype;
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__u8 regctl[2];
|
||||
__u8 resv5[2];
|
||||
__u8 ptpls;
|
||||
__u8 resv10[13];
|
||||
struct {
|
||||
__le16 cntlid;
|
||||
__u8 rcsts;
|
||||
__u8 resv3[5];
|
||||
__le64 hostid;
|
||||
__le64 rkey;
|
||||
} regctl_ds[];
|
||||
};
|
||||
|
||||
/* I/O commands */
|
||||
|
||||
enum nvme_opcode {
|
||||
nvme_cmd_flush = 0x00,
|
||||
nvme_cmd_write = 0x01,
|
||||
nvme_cmd_read = 0x02,
|
||||
nvme_cmd_write_uncor = 0x04,
|
||||
nvme_cmd_compare = 0x05,
|
||||
nvme_cmd_write_zeroes = 0x08,
|
||||
nvme_cmd_dsm = 0x09,
|
||||
nvme_cmd_resv_register = 0x0d,
|
||||
nvme_cmd_resv_report = 0x0e,
|
||||
nvme_cmd_resv_acquire = 0x11,
|
||||
nvme_cmd_resv_release = 0x15,
|
||||
};
|
||||
|
||||
struct nvme_common_command {
|
||||
__u8 opcode;
|
||||
__u8 flags;
|
||||
__u16 command_id;
|
||||
__le32 nsid;
|
||||
__le32 cdw2[2];
|
||||
__le64 metadata;
|
||||
__le64 prp1;
|
||||
__le64 prp2;
|
||||
__le32 cdw10[6];
|
||||
};
|
||||
|
||||
struct nvme_rw_command {
|
||||
__u8 opcode;
|
||||
__u8 flags;
|
||||
__u16 command_id;
|
||||
__le32 nsid;
|
||||
__u64 rsvd2;
|
||||
__le64 metadata;
|
||||
__le64 prp1;
|
||||
__le64 prp2;
|
||||
__le64 slba;
|
||||
__le16 length;
|
||||
__le16 control;
|
||||
__le32 dsmgmt;
|
||||
__le32 reftag;
|
||||
__le16 apptag;
|
||||
__le16 appmask;
|
||||
};
|
||||
|
||||
enum {
|
||||
NVME_RW_LR = 1 << 15,
|
||||
NVME_RW_FUA = 1 << 14,
|
||||
NVME_RW_DSM_FREQ_UNSPEC = 0,
|
||||
NVME_RW_DSM_FREQ_TYPICAL = 1,
|
||||
NVME_RW_DSM_FREQ_RARE = 2,
|
||||
NVME_RW_DSM_FREQ_READS = 3,
|
||||
NVME_RW_DSM_FREQ_WRITES = 4,
|
||||
NVME_RW_DSM_FREQ_RW = 5,
|
||||
NVME_RW_DSM_FREQ_ONCE = 6,
|
||||
NVME_RW_DSM_FREQ_PREFETCH = 7,
|
||||
NVME_RW_DSM_FREQ_TEMP = 8,
|
||||
NVME_RW_DSM_LATENCY_NONE = 0 << 4,
|
||||
NVME_RW_DSM_LATENCY_IDLE = 1 << 4,
|
||||
NVME_RW_DSM_LATENCY_NORM = 2 << 4,
|
||||
NVME_RW_DSM_LATENCY_LOW = 3 << 4,
|
||||
NVME_RW_DSM_SEQ_REQ = 1 << 6,
|
||||
NVME_RW_DSM_COMPRESSED = 1 << 7,
|
||||
NVME_RW_PRINFO_PRCHK_REF = 1 << 10,
|
||||
NVME_RW_PRINFO_PRCHK_APP = 1 << 11,
|
||||
NVME_RW_PRINFO_PRCHK_GUARD = 1 << 12,
|
||||
NVME_RW_PRINFO_PRACT = 1 << 13,
|
||||
};
|
||||
|
||||
struct nvme_dsm_cmd {
|
||||
__u8 opcode;
|
||||
__u8 flags;
|
||||
__u16 command_id;
|
||||
__le32 nsid;
|
||||
__u64 rsvd2[2];
|
||||
__le64 prp1;
|
||||
__le64 prp2;
|
||||
__le32 nr;
|
||||
__le32 attributes;
|
||||
__u32 rsvd12[4];
|
||||
};
|
||||
|
||||
enum {
|
||||
NVME_DSMGMT_IDR = 1 << 0,
|
||||
NVME_DSMGMT_IDW = 1 << 1,
|
||||
NVME_DSMGMT_AD = 1 << 2,
|
||||
};
|
||||
|
||||
struct nvme_dsm_range {
|
||||
__le32 cattr;
|
||||
__le32 nlb;
|
||||
__le64 slba;
|
||||
};
|
||||
|
||||
/* Admin commands */
|
||||
|
||||
enum nvme_admin_opcode {
|
||||
nvme_admin_delete_sq = 0x00,
|
||||
nvme_admin_create_sq = 0x01,
|
||||
nvme_admin_get_log_page = 0x02,
|
||||
nvme_admin_delete_cq = 0x04,
|
||||
nvme_admin_create_cq = 0x05,
|
||||
nvme_admin_identify = 0x06,
|
||||
nvme_admin_abort_cmd = 0x08,
|
||||
nvme_admin_set_features = 0x09,
|
||||
nvme_admin_get_features = 0x0a,
|
||||
nvme_admin_async_event = 0x0c,
|
||||
nvme_admin_activate_fw = 0x10,
|
||||
nvme_admin_download_fw = 0x11,
|
||||
nvme_admin_format_nvm = 0x80,
|
||||
nvme_admin_security_send = 0x81,
|
||||
nvme_admin_security_recv = 0x82,
|
||||
};
|
||||
|
||||
enum {
|
||||
NVME_QUEUE_PHYS_CONTIG = (1 << 0),
|
||||
NVME_CQ_IRQ_ENABLED = (1 << 1),
|
||||
NVME_SQ_PRIO_URGENT = (0 << 1),
|
||||
NVME_SQ_PRIO_HIGH = (1 << 1),
|
||||
NVME_SQ_PRIO_MEDIUM = (2 << 1),
|
||||
NVME_SQ_PRIO_LOW = (3 << 1),
|
||||
NVME_FEAT_ARBITRATION = 0x01,
|
||||
NVME_FEAT_POWER_MGMT = 0x02,
|
||||
NVME_FEAT_LBA_RANGE = 0x03,
|
||||
NVME_FEAT_TEMP_THRESH = 0x04,
|
||||
NVME_FEAT_ERR_RECOVERY = 0x05,
|
||||
NVME_FEAT_VOLATILE_WC = 0x06,
|
||||
NVME_FEAT_NUM_QUEUES = 0x07,
|
||||
NVME_FEAT_IRQ_COALESCE = 0x08,
|
||||
NVME_FEAT_IRQ_CONFIG = 0x09,
|
||||
NVME_FEAT_WRITE_ATOMIC = 0x0a,
|
||||
NVME_FEAT_ASYNC_EVENT = 0x0b,
|
||||
NVME_FEAT_AUTO_PST = 0x0c,
|
||||
NVME_FEAT_SW_PROGRESS = 0x80,
|
||||
NVME_FEAT_HOST_ID = 0x81,
|
||||
NVME_FEAT_RESV_MASK = 0x82,
|
||||
NVME_FEAT_RESV_PERSIST = 0x83,
|
||||
NVME_LOG_ERROR = 0x01,
|
||||
NVME_LOG_SMART = 0x02,
|
||||
NVME_LOG_FW_SLOT = 0x03,
|
||||
NVME_LOG_RESERVATION = 0x80,
|
||||
NVME_FWACT_REPL = (0 << 3),
|
||||
NVME_FWACT_REPL_ACTV = (1 << 3),
|
||||
NVME_FWACT_ACTV = (2 << 3),
|
||||
};
|
||||
|
||||
struct nvme_identify {
|
||||
__u8 opcode;
|
||||
__u8 flags;
|
||||
__u16 command_id;
|
||||
__le32 nsid;
|
||||
__u64 rsvd2[2];
|
||||
__le64 prp1;
|
||||
__le64 prp2;
|
||||
__le32 cns;
|
||||
__u32 rsvd11[5];
|
||||
};
|
||||
|
||||
struct nvme_features {
|
||||
__u8 opcode;
|
||||
__u8 flags;
|
||||
__u16 command_id;
|
||||
__le32 nsid;
|
||||
__u64 rsvd2[2];
|
||||
__le64 prp1;
|
||||
__le64 prp2;
|
||||
__le32 fid;
|
||||
__le32 dword11;
|
||||
__u32 rsvd12[4];
|
||||
};
|
||||
|
||||
struct nvme_create_cq {
|
||||
__u8 opcode;
|
||||
__u8 flags;
|
||||
__u16 command_id;
|
||||
__u32 rsvd1[5];
|
||||
__le64 prp1;
|
||||
__u64 rsvd8;
|
||||
__le16 cqid;
|
||||
__le16 qsize;
|
||||
__le16 cq_flags;
|
||||
__le16 irq_vector;
|
||||
__u32 rsvd12[4];
|
||||
};
|
||||
|
||||
struct nvme_create_sq {
|
||||
__u8 opcode;
|
||||
__u8 flags;
|
||||
__u16 command_id;
|
||||
__u32 rsvd1[5];
|
||||
__le64 prp1;
|
||||
__u64 rsvd8;
|
||||
__le16 sqid;
|
||||
__le16 qsize;
|
||||
__le16 sq_flags;
|
||||
__le16 cqid;
|
||||
__u32 rsvd12[4];
|
||||
};
|
||||
|
||||
struct nvme_delete_queue {
|
||||
__u8 opcode;
|
||||
__u8 flags;
|
||||
__u16 command_id;
|
||||
__u32 rsvd1[9];
|
||||
__le16 qid;
|
||||
__u16 rsvd10;
|
||||
__u32 rsvd11[5];
|
||||
};
|
||||
|
||||
struct nvme_abort_cmd {
|
||||
__u8 opcode;
|
||||
__u8 flags;
|
||||
__u16 command_id;
|
||||
__u32 rsvd1[9];
|
||||
__le16 sqid;
|
||||
__u16 cid;
|
||||
__u32 rsvd11[5];
|
||||
};
|
||||
|
||||
struct nvme_download_firmware {
|
||||
__u8 opcode;
|
||||
__u8 flags;
|
||||
__u16 command_id;
|
||||
__u32 rsvd1[5];
|
||||
__le64 prp1;
|
||||
__le64 prp2;
|
||||
__le32 numd;
|
||||
__le32 offset;
|
||||
__u32 rsvd12[4];
|
||||
};
|
||||
|
||||
struct nvme_format_cmd {
|
||||
__u8 opcode;
|
||||
__u8 flags;
|
||||
__u16 command_id;
|
||||
__le32 nsid;
|
||||
__u64 rsvd2[4];
|
||||
__le32 cdw10;
|
||||
__u32 rsvd11[5];
|
||||
};
|
||||
|
||||
struct nvme_command {
|
||||
union {
|
||||
struct nvme_common_command common;
|
||||
struct nvme_rw_command rw;
|
||||
struct nvme_identify identify;
|
||||
struct nvme_features features;
|
||||
struct nvme_create_cq create_cq;
|
||||
struct nvme_create_sq create_sq;
|
||||
struct nvme_delete_queue delete_queue;
|
||||
struct nvme_download_firmware dlfw;
|
||||
struct nvme_format_cmd format;
|
||||
struct nvme_dsm_cmd dsm;
|
||||
struct nvme_abort_cmd abort;
|
||||
};
|
||||
};
|
||||
|
||||
enum {
|
||||
NVME_SC_SUCCESS = 0x0,
|
||||
NVME_SC_INVALID_OPCODE = 0x1,
|
||||
NVME_SC_INVALID_FIELD = 0x2,
|
||||
NVME_SC_CMDID_CONFLICT = 0x3,
|
||||
NVME_SC_DATA_XFER_ERROR = 0x4,
|
||||
NVME_SC_POWER_LOSS = 0x5,
|
||||
NVME_SC_INTERNAL = 0x6,
|
||||
NVME_SC_ABORT_REQ = 0x7,
|
||||
NVME_SC_ABORT_QUEUE = 0x8,
|
||||
NVME_SC_FUSED_FAIL = 0x9,
|
||||
NVME_SC_FUSED_MISSING = 0xa,
|
||||
NVME_SC_INVALID_NS = 0xb,
|
||||
NVME_SC_CMD_SEQ_ERROR = 0xc,
|
||||
NVME_SC_SGL_INVALID_LAST = 0xd,
|
||||
NVME_SC_SGL_INVALID_COUNT = 0xe,
|
||||
NVME_SC_SGL_INVALID_DATA = 0xf,
|
||||
NVME_SC_SGL_INVALID_METADATA = 0x10,
|
||||
NVME_SC_SGL_INVALID_TYPE = 0x11,
|
||||
NVME_SC_LBA_RANGE = 0x80,
|
||||
NVME_SC_CAP_EXCEEDED = 0x81,
|
||||
NVME_SC_NS_NOT_READY = 0x82,
|
||||
NVME_SC_RESERVATION_CONFLICT = 0x83,
|
||||
NVME_SC_CQ_INVALID = 0x100,
|
||||
NVME_SC_QID_INVALID = 0x101,
|
||||
NVME_SC_QUEUE_SIZE = 0x102,
|
||||
NVME_SC_ABORT_LIMIT = 0x103,
|
||||
NVME_SC_ABORT_MISSING = 0x104,
|
||||
NVME_SC_ASYNC_LIMIT = 0x105,
|
||||
NVME_SC_FIRMWARE_SLOT = 0x106,
|
||||
NVME_SC_FIRMWARE_IMAGE = 0x107,
|
||||
NVME_SC_INVALID_VECTOR = 0x108,
|
||||
NVME_SC_INVALID_LOG_PAGE = 0x109,
|
||||
NVME_SC_INVALID_FORMAT = 0x10a,
|
||||
NVME_SC_FIRMWARE_NEEDS_RESET = 0x10b,
|
||||
NVME_SC_INVALID_QUEUE = 0x10c,
|
||||
NVME_SC_FEATURE_NOT_SAVEABLE = 0x10d,
|
||||
NVME_SC_FEATURE_NOT_CHANGEABLE = 0x10e,
|
||||
NVME_SC_FEATURE_NOT_PER_NS = 0x10f,
|
||||
NVME_SC_FW_NEEDS_RESET_SUBSYS = 0x110,
|
||||
NVME_SC_BAD_ATTRIBUTES = 0x180,
|
||||
NVME_SC_INVALID_PI = 0x181,
|
||||
NVME_SC_READ_ONLY = 0x182,
|
||||
NVME_SC_WRITE_FAULT = 0x280,
|
||||
NVME_SC_READ_ERROR = 0x281,
|
||||
NVME_SC_GUARD_CHECK = 0x282,
|
||||
NVME_SC_APPTAG_CHECK = 0x283,
|
||||
NVME_SC_REFTAG_CHECK = 0x284,
|
||||
NVME_SC_COMPARE_FAILED = 0x285,
|
||||
NVME_SC_ACCESS_DENIED = 0x286,
|
||||
NVME_SC_DNR = 0x4000,
|
||||
};
|
||||
|
||||
struct nvme_completion {
|
||||
__le32 result; /* Used by admin commands to return data */
|
||||
__u32 rsvd;
|
||||
__le16 sq_head; /* how much of this queue may be reclaimed */
|
||||
__le16 sq_id; /* submission queue that generated this entry */
|
||||
__u16 command_id; /* of the command which completed */
|
||||
__le16 status; /* did the command fail, and if so, why? */
|
||||
};
|
||||
|
||||
#define NVME_VS(major, minor) (((major) << 16) | ((minor) << 8))
|
||||
|
||||
#endif /* _LINUX_NVME_H */
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue