parent
8720300aa3
commit
a3e55d753a
2 changed files with 18 additions and 3 deletions
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@ -484,7 +484,7 @@ static const struct wcd9335_reg_mask_val wcd9335_codec_reg_init[] = {
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{WCD9335_RCO_CTRL_2, 0x0F, 0x08},
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{WCD9335_RCO_CTRL_2, 0x0F, 0x08},
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{WCD9335_RX_BIAS_FLYB_MID_RST, 0xF0, 0x10},
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{WCD9335_RX_BIAS_FLYB_MID_RST, 0xF0, 0x10},
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{WCD9335_FLYBACK_CTRL_1, 0x20, 0x20},
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{WCD9335_FLYBACK_CTRL_1, 0x20, 0x20},
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{WCD9335_HPH_OCP_CTL, 0xFF, 0x5A},
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{WCD9335_HPH_OCP_CTL, 0xFF, 0x7A}, /*downstream is ff 7a */
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{WCD9335_HPH_L_TEST, 0x01, 0x01},
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{WCD9335_HPH_L_TEST, 0x01, 0x01},
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{WCD9335_HPH_R_TEST, 0x01, 0x01},
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{WCD9335_HPH_R_TEST, 0x01, 0x01},
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{WCD9335_CDC_BOOST0_BOOST_CFG1, 0x3F, 0x12},
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{WCD9335_CDC_BOOST0_BOOST_CFG1, 0x3F, 0x12},
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@ -497,6 +497,13 @@ static const struct wcd9335_reg_mask_val wcd9335_codec_reg_init[] = {
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{WCD9335_CDC_RX0_RX_PATH_SEC0, 0xFC, 0xF4},
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{WCD9335_CDC_RX0_RX_PATH_SEC0, 0xFC, 0xF4},
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{WCD9335_HPH_REFBUFF_LP_CTL, 0x08, 0x08},
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{WCD9335_HPH_REFBUFF_LP_CTL, 0x08, 0x08},
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{WCD9335_HPH_REFBUFF_LP_CTL, 0x06, 0x02},
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{WCD9335_HPH_REFBUFF_LP_CTL, 0x06, 0x02},
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{WCD9335_DIFF_LO_CORE_OUT_PROG, 0xFC, 0xA0},
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{WCD9335_SE_LO_COM1, 0xFF, 0xC0},
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{WCD9335_CDC_RX3_RX_PATH_SEC0, 0xFC, 0xF4},
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{WCD9335_CDC_RX4_RX_PATH_SEC0, 0xFC, 0xF4},
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{WCD9335_CDC_RX5_RX_PATH_SEC0, 0xFC, 0xF8},
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{WCD9335_CDC_RX6_RX_PATH_SEC0, 0xFC, 0xF8},
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};
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};
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/* Cutoff frequency for high pass filter */
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/* Cutoff frequency for high pass filter */
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@ -3744,11 +3751,12 @@ static int wcd9335_codec_enable_hphl_pa(struct snd_soc_dapm_widget *w,
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struct snd_soc_component *comp = snd_soc_dapm_to_component(w->dapm);
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struct snd_soc_component *comp = snd_soc_dapm_to_component(w->dapm);
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struct wcd9335_codec *wcd = dev_get_drvdata(comp->dev);
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struct wcd9335_codec *wcd = dev_get_drvdata(comp->dev);
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int hph_mode = wcd->hph_mode;
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int hph_mode = wcd->hph_mode;
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pr_err("%s\n", __func__);
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switch (event) {
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switch (event) {
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case SND_SOC_DAPM_PRE_PMU:
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case SND_SOC_DAPM_PRE_PMU:
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break;
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break;
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case SND_SOC_DAPM_POST_PMU:
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case SND_SOC_DAPM_POST_PMU:
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pr_err("%s post pmu\n", __func__);
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/*
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/*
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* 7ms sleep is required after PA is enabled as per
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* 7ms sleep is required after PA is enabled as per
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* HW requirement
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* HW requirement
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@ -3772,6 +3780,7 @@ static int wcd9335_codec_enable_hphl_pa(struct snd_soc_dapm_widget *w,
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break;
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break;
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case SND_SOC_DAPM_PRE_PMD:
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case SND_SOC_DAPM_PRE_PMD:
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pr_err("%s pre pmd\n", __func__);
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wcd9335_codec_hph_post_pa_config(wcd, hph_mode, event);
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wcd9335_codec_hph_post_pa_config(wcd, hph_mode, event);
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break;
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break;
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case SND_SOC_DAPM_POST_PMD:
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case SND_SOC_DAPM_POST_PMD:
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@ -3893,7 +3902,7 @@ static int wcd9335_codec_enable_hphr_pa(struct snd_soc_dapm_widget *w,
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struct snd_soc_component *comp = snd_soc_dapm_to_component(w->dapm);
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struct snd_soc_component *comp = snd_soc_dapm_to_component(w->dapm);
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struct wcd9335_codec *wcd = dev_get_drvdata(comp->dev);
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struct wcd9335_codec *wcd = dev_get_drvdata(comp->dev);
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int hph_mode = wcd->hph_mode;
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int hph_mode = wcd->hph_mode;
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pr_err("%s\n", __func__);
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switch (event) {
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switch (event) {
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case SND_SOC_DAPM_PRE_PMU:
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case SND_SOC_DAPM_PRE_PMU:
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break;
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break;
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@ -368,8 +368,10 @@
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#define WCD9335_EAR_CMBUFF WCD9335_REG(0x06, 0x0e2)
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#define WCD9335_EAR_CMBUFF WCD9335_REG(0x06, 0x0e2)
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#define WCD9335_DIFF_LO_LO2_COMPANDER WCD9335_REG(0x06, 0x0ea)
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#define WCD9335_DIFF_LO_LO2_COMPANDER WCD9335_REG(0x06, 0x0ea)
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#define WCD9335_DIFF_LO_LO1_COMPANDER WCD9335_REG(0x06, 0x0eb)
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#define WCD9335_DIFF_LO_LO1_COMPANDER WCD9335_REG(0x06, 0x0eb)
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#define WCD9335_DIFF_LO_CORE_OUT_PROG WCD9335_REG(0x06, 0x0ef)
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#define WCD9335_DIFF_LO_COM_SWCAP_REFBUF_FREQ WCD9335_REG(0x06, 0x0f1)
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#define WCD9335_DIFF_LO_COM_SWCAP_REFBUF_FREQ WCD9335_REG(0x06, 0x0f1)
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#define WCD9335_DIFF_LO_COM_PA_FREQ WCD9335_REG(0x06, 0x0f2)
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#define WCD9335_DIFF_LO_COM_PA_FREQ WCD9335_REG(0x06, 0x0f2)
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#define WCD9335_SE_LO_COM1 WCD9335_REG(0x06, 0x0f6)
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#define WCD9335_SE_LO_LO3_GAIN WCD9335_REG(0x06, 0x0f8)
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#define WCD9335_SE_LO_LO3_GAIN WCD9335_REG(0x06, 0x0f8)
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#define WCD9335_SE_LO_LO3_CTRL WCD9335_REG(0x06, 0x0f9)
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#define WCD9335_SE_LO_LO3_CTRL WCD9335_REG(0x06, 0x0f9)
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#define WCD9335_SE_LO_LO4_GAIN WCD9335_REG(0x06, 0x0fa)
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#define WCD9335_SE_LO_LO4_GAIN WCD9335_REG(0x06, 0x0fa)
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@ -495,6 +497,7 @@
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#define WCD9335_CDC_RX3_RX_PATH_MIX_CTL WCD9335_REG(0x0b, 0x082)
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#define WCD9335_CDC_RX3_RX_PATH_MIX_CTL WCD9335_REG(0x0b, 0x082)
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#define WCD9335_CDC_RX3_RX_PATH_MIX_CFG WCD9335_REG(0x0b, 0x083)
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#define WCD9335_CDC_RX3_RX_PATH_MIX_CFG WCD9335_REG(0x0b, 0x083)
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#define WCD9335_CDC_RX3_RX_VOL_MIX_CTL WCD9335_REG(0x0b, 0x084)
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#define WCD9335_CDC_RX3_RX_VOL_MIX_CTL WCD9335_REG(0x0b, 0x084)
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#define WCD9335_CDC_RX3_RX_PATH_SEC0 WCD9335_REG(0x0b, 0x085)
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#define WCD9335_CDC_RX4_RX_PATH_CTL WCD9335_REG(0x0b, 0x091)
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#define WCD9335_CDC_RX4_RX_PATH_CTL WCD9335_REG(0x0b, 0x091)
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#define WCD9335_CDC_RX4_RX_PATH_CFG0 WCD9335_REG(0x0b, 0x092)
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#define WCD9335_CDC_RX4_RX_PATH_CFG0 WCD9335_REG(0x0b, 0x092)
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#define WCD9335_CDC_RX4_RX_PATH_CFG2 WCD9335_REG(0x0b, 0x094)
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#define WCD9335_CDC_RX4_RX_PATH_CFG2 WCD9335_REG(0x0b, 0x094)
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@ -502,6 +505,7 @@
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#define WCD9335_CDC_RX4_RX_PATH_MIX_CTL WCD9335_REG(0x0b, 0x096)
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#define WCD9335_CDC_RX4_RX_PATH_MIX_CTL WCD9335_REG(0x0b, 0x096)
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#define WCD9335_CDC_RX4_RX_PATH_MIX_CFG WCD9335_REG(0x0b, 0x097)
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#define WCD9335_CDC_RX4_RX_PATH_MIX_CFG WCD9335_REG(0x0b, 0x097)
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#define WCD9335_CDC_RX4_RX_VOL_MIX_CTL WCD9335_REG(0x0b, 0x098)
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#define WCD9335_CDC_RX4_RX_VOL_MIX_CTL WCD9335_REG(0x0b, 0x098)
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#define WCD9335_CDC_RX4_RX_PATH_SEC0 WCD9335_REG(0x0b, 0x099)
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#define WCD9335_CDC_RX5_RX_PATH_CTL WCD9335_REG(0x0b, 0x0a5)
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#define WCD9335_CDC_RX5_RX_PATH_CTL WCD9335_REG(0x0b, 0x0a5)
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#define WCD9335_CDC_RX5_RX_PATH_CFG0 WCD9335_REG(0x0b, 0x0a6)
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#define WCD9335_CDC_RX5_RX_PATH_CFG0 WCD9335_REG(0x0b, 0x0a6)
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#define WCD9335_CDC_RX5_RX_PATH_CFG2 WCD9335_REG(0x0b, 0x0a8)
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#define WCD9335_CDC_RX5_RX_PATH_CFG2 WCD9335_REG(0x0b, 0x0a8)
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@ -509,6 +513,7 @@
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#define WCD9335_CDC_RX5_RX_PATH_MIX_CTL WCD9335_REG(0x0b, 0x0aa)
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#define WCD9335_CDC_RX5_RX_PATH_MIX_CTL WCD9335_REG(0x0b, 0x0aa)
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#define WCD9335_CDC_RX5_RX_PATH_MIX_CFG WCD9335_REG(0x0b, 0x0ab)
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#define WCD9335_CDC_RX5_RX_PATH_MIX_CFG WCD9335_REG(0x0b, 0x0ab)
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#define WCD9335_CDC_RX5_RX_VOL_MIX_CTL WCD9335_REG(0x0b, 0x0ac)
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#define WCD9335_CDC_RX5_RX_VOL_MIX_CTL WCD9335_REG(0x0b, 0x0ac)
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#define WCD9335_CDC_RX5_RX_PATH_SEC0 WCD9335_REG(0x0b, 0x0ad)
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#define WCD9335_CDC_RX6_RX_PATH_CTL WCD9335_REG(0x0b, 0x0b9)
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#define WCD9335_CDC_RX6_RX_PATH_CTL WCD9335_REG(0x0b, 0x0b9)
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#define WCD9335_CDC_RX6_RX_PATH_CFG0 WCD9335_REG(0x0b, 0x0ba)
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#define WCD9335_CDC_RX6_RX_PATH_CFG0 WCD9335_REG(0x0b, 0x0ba)
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#define WCD9335_CDC_RX6_RX_PATH_CFG2 WCD9335_REG(0x0b, 0x0bc)
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#define WCD9335_CDC_RX6_RX_PATH_CFG2 WCD9335_REG(0x0b, 0x0bc)
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@ -516,6 +521,7 @@
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#define WCD9335_CDC_RX6_RX_PATH_MIX_CTL WCD9335_REG(0x0b, 0x0be)
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#define WCD9335_CDC_RX6_RX_PATH_MIX_CTL WCD9335_REG(0x0b, 0x0be)
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#define WCD9335_CDC_RX6_RX_PATH_MIX_CFG WCD9335_REG(0x0b, 0x0bf)
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#define WCD9335_CDC_RX6_RX_PATH_MIX_CFG WCD9335_REG(0x0b, 0x0bf)
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#define WCD9335_CDC_RX6_RX_VOL_MIX_CTL WCD9335_REG(0x0b, 0x0c0)
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#define WCD9335_CDC_RX6_RX_VOL_MIX_CTL WCD9335_REG(0x0b, 0x0c0)
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#define WCD9335_CDC_RX6_RX_PATH_SEC0 WCD9335_REG(0x0b, 0x0c1)
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#define WCD9335_CDC_RX7_RX_PATH_CTL WCD9335_REG(0x0b, 0x0cd)
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#define WCD9335_CDC_RX7_RX_PATH_CTL WCD9335_REG(0x0b, 0x0cd)
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#define WCD9335_CDC_RX7_RX_PATH_CFG0 WCD9335_REG(0x0b, 0x0ce)
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#define WCD9335_CDC_RX7_RX_PATH_CFG0 WCD9335_REG(0x0b, 0x0ce)
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#define WCD9335_CDC_RX7_RX_PATH_CFG1 WCD9335_REG(0x0b, 0x0cf)
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#define WCD9335_CDC_RX7_RX_PATH_CFG1 WCD9335_REG(0x0b, 0x0cf)
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