staging: iio: cdc: ad7746: Break up use of chan->address and use FIELD_PREP etc
Instead of encoding several different fields into chan->address use an indirection to a separate per channel structure where the various fields can be expressed in a more readable form. This also allows the register values to be constructed at runtime using FIELD_PREP(). Drop the now redundant _SHIFT macros. Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20220626122938.582107-9-jic23@kernel.org
This commit is contained in:
Jonathan Cameron
parent
b1f567bde7
commit
9eee2fc4a6
1 changed files with 99 additions and 53 deletions
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@ -5,6 +5,7 @@
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* Copyright 2011 Analog Devices Inc.
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*/
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#include <linux/bitfield.h>
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <linux/i2c.h>
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@ -50,11 +51,12 @@
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#define AD7746_CAPSETUP_CACHOP BIT(0)
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/* Voltage/Temperature Setup Register Bit Designations (AD7746_REG_VT_SETUP) */
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#define AD7746_VTSETUP_VTEN (1 << 7)
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#define AD7746_VTSETUP_VTMD_INT_TEMP (0 << 5)
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#define AD7746_VTSETUP_VTMD_EXT_TEMP (1 << 5)
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#define AD7746_VTSETUP_VTMD_VDD_MON (2 << 5)
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#define AD7746_VTSETUP_VTMD_EXT_VIN (3 << 5)
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#define AD7746_VTSETUP_VTEN BIT(7)
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#define AD7746_VTSETUP_VTMD_MASK GENMASK(6, 5)
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#define AD7746_VTSETUP_VTMD_INT_TEMP 0
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#define AD7746_VTSETUP_VTMD_EXT_TEMP 1
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#define AD7746_VTSETUP_VTMD_VDD_MON 2
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#define AD7746_VTSETUP_VTMD_EXT_VIN 3
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#define AD7746_VTSETUP_EXTREF BIT(4)
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#define AD7746_VTSETUP_VTSHORT BIT(1)
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#define AD7746_VTSETUP_VTCHOP BIT(0)
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@ -66,23 +68,22 @@
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#define AD7746_EXCSETUP_NEXCB BIT(4)
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#define AD7746_EXCSETUP_EXCA BIT(3)
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#define AD7746_EXCSETUP_NEXCA BIT(2)
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#define AD7746_EXCSETUP_EXCLVL(x) (((x) & 0x3) << 0)
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#define AD7746_EXCSETUP_EXCLVL_MASK GENMASK(1, 0)
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/* Config Register Bit Designations (AD7746_REG_CFG) */
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#define AD7746_CONF_VTFS_SHIFT 6
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#define AD7746_CONF_CAPFS_SHIFT 3
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#define AD7746_CONF_VTFS_MASK GENMASK(7, 6)
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#define AD7746_CONF_CAPFS_MASK GENMASK(5, 3)
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#define AD7746_CONF_MODE_IDLE (0 << 0)
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#define AD7746_CONF_MODE_CONT_CONV (1 << 0)
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#define AD7746_CONF_MODE_SINGLE_CONV (2 << 0)
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#define AD7746_CONF_MODE_PWRDN (3 << 0)
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#define AD7746_CONF_MODE_OFFS_CAL (5 << 0)
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#define AD7746_CONF_MODE_GAIN_CAL (6 << 0)
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#define AD7746_CONF_MODE_MASK GENMASK(2, 0)
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#define AD7746_CONF_MODE_IDLE 0
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#define AD7746_CONF_MODE_CONT_CONV 1
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#define AD7746_CONF_MODE_SINGLE_CONV 2
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#define AD7746_CONF_MODE_PWRDN 3
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#define AD7746_CONF_MODE_OFFS_CAL 5
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#define AD7746_CONF_MODE_GAIN_CAL 6
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/* CAPDAC Register Bit Designations (AD7746_REG_CAPDACx) */
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#define AD7746_CAPDAC_DACEN BIT(7)
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#define AD7746_CAPDAC_DACP(x) ((x) & 0x7F)
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#define AD7746_CAPDAC_DACP_MASK GENMASK(6, 0)
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struct ad7746_chip_info {
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struct i2c_client *client;
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@ -109,6 +110,52 @@ enum ad7746_chan {
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CIN2_DIFF,
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};
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struct ad7746_chan_info {
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u8 addr;
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union {
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u8 vtmd;
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struct { /* CAP SETUP fields */
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unsigned int cin2 : 1;
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unsigned int capdiff : 1;
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};
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};
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};
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static const struct ad7746_chan_info ad7746_chan_info[] = {
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[VIN] = {
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.addr = AD7746_REG_VT_DATA_HIGH,
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.vtmd = AD7746_VTSETUP_VTMD_EXT_VIN,
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},
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[VIN_VDD] = {
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.addr = AD7746_REG_VT_DATA_HIGH,
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.vtmd = AD7746_VTSETUP_VTMD_VDD_MON,
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},
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[TEMP_INT] = {
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.addr = AD7746_REG_VT_DATA_HIGH,
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.vtmd = AD7746_VTSETUP_VTMD_INT_TEMP,
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},
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[TEMP_EXT] = {
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.addr = AD7746_REG_VT_DATA_HIGH,
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.vtmd = AD7746_VTSETUP_VTMD_EXT_TEMP,
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},
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[CIN1] = {
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.addr = AD7746_REG_CAP_DATA_HIGH,
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},
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[CIN1_DIFF] = {
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.addr = AD7746_REG_CAP_DATA_HIGH,
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.capdiff = 1,
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},
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[CIN2] = {
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.addr = AD7746_REG_CAP_DATA_HIGH,
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.cin2 = 1,
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},
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[CIN2_DIFF] = {
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.addr = AD7746_REG_CAP_DATA_HIGH,
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.cin2 = 1,
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.capdiff = 1,
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},
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};
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static const struct iio_chan_spec ad7746_channels[] = {
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[VIN] = {
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.type = IIO_VOLTAGE,
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@ -116,8 +163,7 @@ static const struct iio_chan_spec ad7746_channels[] = {
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.channel = 0,
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
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.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ),
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.address = AD7746_REG_VT_DATA_HIGH << 8 |
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AD7746_VTSETUP_VTMD_EXT_VIN,
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.address = VIN,
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},
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[VIN_VDD] = {
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.type = IIO_VOLTAGE,
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@ -126,24 +172,21 @@ static const struct iio_chan_spec ad7746_channels[] = {
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.extend_name = "supply",
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
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.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ),
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.address = AD7746_REG_VT_DATA_HIGH << 8 |
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AD7746_VTSETUP_VTMD_VDD_MON,
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.address = VIN_VDD,
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},
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[TEMP_INT] = {
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.type = IIO_TEMP,
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.indexed = 1,
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.channel = 0,
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.info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED),
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.address = AD7746_REG_VT_DATA_HIGH << 8 |
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AD7746_VTSETUP_VTMD_INT_TEMP,
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.address = TEMP_INT,
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},
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[TEMP_EXT] = {
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.type = IIO_TEMP,
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.indexed = 1,
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.channel = 1,
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.info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED),
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.address = AD7746_REG_VT_DATA_HIGH << 8 |
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AD7746_VTSETUP_VTMD_EXT_TEMP,
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.address = TEMP_EXT,
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},
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[CIN1] = {
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.type = IIO_CAPACITANCE,
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@ -153,7 +196,7 @@ static const struct iio_chan_spec ad7746_channels[] = {
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BIT(IIO_CHAN_INFO_CALIBSCALE) | BIT(IIO_CHAN_INFO_OFFSET),
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.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_CALIBBIAS) |
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BIT(IIO_CHAN_INFO_SCALE) | BIT(IIO_CHAN_INFO_SAMP_FREQ),
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.address = AD7746_REG_CAP_DATA_HIGH << 8,
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.address = CIN1,
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},
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[CIN1_DIFF] = {
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.type = IIO_CAPACITANCE,
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@ -165,8 +208,7 @@ static const struct iio_chan_spec ad7746_channels[] = {
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BIT(IIO_CHAN_INFO_CALIBSCALE) | BIT(IIO_CHAN_INFO_OFFSET),
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.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_CALIBBIAS) |
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BIT(IIO_CHAN_INFO_SCALE) | BIT(IIO_CHAN_INFO_SAMP_FREQ),
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.address = AD7746_REG_CAP_DATA_HIGH << 8 |
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AD7746_CAPSETUP_CAPDIFF
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.address = CIN1_DIFF,
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},
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[CIN2] = {
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.type = IIO_CAPACITANCE,
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@ -176,8 +218,7 @@ static const struct iio_chan_spec ad7746_channels[] = {
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BIT(IIO_CHAN_INFO_CALIBSCALE) | BIT(IIO_CHAN_INFO_OFFSET),
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.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_CALIBBIAS) |
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BIT(IIO_CHAN_INFO_SCALE) | BIT(IIO_CHAN_INFO_SAMP_FREQ),
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.address = AD7746_REG_CAP_DATA_HIGH << 8 |
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AD7746_CAPSETUP_CIN2,
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.address = CIN2,
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},
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[CIN2_DIFF] = {
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.type = IIO_CAPACITANCE,
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@ -189,8 +230,7 @@ static const struct iio_chan_spec ad7746_channels[] = {
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BIT(IIO_CHAN_INFO_CALIBSCALE) | BIT(IIO_CHAN_INFO_OFFSET),
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.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_CALIBBIAS) |
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BIT(IIO_CHAN_INFO_SCALE) | BIT(IIO_CHAN_INFO_SAMP_FREQ),
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.address = AD7746_REG_CAP_DATA_HIGH << 8 |
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AD7746_CAPSETUP_CAPDIFF | AD7746_CAPSETUP_CIN2,
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.address = CIN2_DIFF,
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}
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};
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@ -226,10 +266,13 @@ static int ad7746_select_channel(struct iio_dev *indio_dev,
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switch (chan->type) {
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case IIO_CAPACITANCE:
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cap_setup = (chan->address & 0xFF) | AD7746_CAPSETUP_CAPEN;
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cap_setup = FIELD_PREP(AD7746_CAPSETUP_CIN2,
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ad7746_chan_info[chan->address].cin2) |
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FIELD_PREP(AD7746_CAPSETUP_CAPDIFF,
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ad7746_chan_info[chan->address].capdiff) |
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FIELD_PREP(AD7746_CAPSETUP_CAPEN, 1);
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vt_setup = chip->vt_setup & ~AD7746_VTSETUP_VTEN;
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idx = (chip->config & AD7746_CONF_CAPFS_MASK) >>
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AD7746_CONF_CAPFS_SHIFT;
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idx = FIELD_GET(AD7746_CONF_CAPFS_MASK, chip->config);
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delay = ad7746_cap_filter_rate_table[idx][1];
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ret = ad7746_set_capdac(chip, chan->channel);
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@ -241,10 +284,11 @@ static int ad7746_select_channel(struct iio_dev *indio_dev,
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break;
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case IIO_VOLTAGE:
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case IIO_TEMP:
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vt_setup = (chan->address & 0xFF) | AD7746_VTSETUP_VTEN;
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vt_setup = FIELD_PREP(AD7746_VTSETUP_VTMD_MASK,
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ad7746_chan_info[chan->address].vtmd) |
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FIELD_PREP(AD7746_VTSETUP_VTEN, 1);
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cap_setup = chip->cap_setup & ~AD7746_CAPSETUP_CAPEN;
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idx = (chip->config & AD7746_CONF_VTFS_MASK) >>
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AD7746_CONF_VTFS_SHIFT;
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idx = FIELD_GET(AD7746_CONF_VTFS_MASK, chip->config);
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delay = ad7746_cap_filter_rate_table[idx][1];
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break;
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default:
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@ -327,7 +371,8 @@ static ssize_t ad7746_start_offset_calib(struct device *dev,
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return ret;
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return ad7746_start_calib(dev, attr, buf, len,
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AD7746_CONF_MODE_OFFS_CAL);
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FIELD_PREP(AD7746_CONF_MODE_MASK,
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AD7746_CONF_MODE_OFFS_CAL));
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}
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static ssize_t ad7746_start_gain_calib(struct device *dev,
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@ -342,7 +387,8 @@ static ssize_t ad7746_start_gain_calib(struct device *dev,
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return ret;
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return ad7746_start_calib(dev, attr, buf, len,
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AD7746_CONF_MODE_GAIN_CAL);
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FIELD_PREP(AD7746_CONF_MODE_MASK,
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AD7746_CONF_MODE_GAIN_CAL));
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}
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static IIO_DEVICE_ATTR(in_capacitance0_calibbias_calibration,
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@ -369,7 +415,7 @@ static int ad7746_store_cap_filter_rate_setup(struct ad7746_chip_info *chip,
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i = ARRAY_SIZE(ad7746_cap_filter_rate_table) - 1;
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chip->config &= ~AD7746_CONF_CAPFS_MASK;
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chip->config |= i << AD7746_CONF_CAPFS_SHIFT;
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chip->config |= FIELD_PREP(AD7746_CONF_CAPFS_MASK, i);
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return 0;
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}
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@ -387,7 +433,7 @@ static int ad7746_store_vt_filter_rate_setup(struct ad7746_chip_info *chip,
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i = ARRAY_SIZE(ad7746_vt_filter_rate_table) - 1;
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chip->config &= ~AD7746_CONF_VTFS_MASK;
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chip->config |= i << AD7746_CONF_VTFS_SHIFT;
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chip->config |= FIELD_PREP(AD7746_CONF_VTFS_MASK, i);
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return 0;
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}
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@ -470,7 +516,7 @@ static int ad7746_write_raw(struct iio_dev *indio_dev,
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val /= 338646;
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mutex_lock(&chip->lock);
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chip->capdac[chan->channel][chan->differential] = val > 0 ?
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AD7746_CAPDAC_DACP(val) | AD7746_CAPDAC_DACEN : 0;
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FIELD_PREP(AD7746_CAPDAC_DACP_MASK, val) | AD7746_CAPDAC_DACEN : 0;
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ret = ad7746_set_capdac(chip, chan->channel);
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if (ret < 0) {
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@ -519,14 +565,16 @@ static int ad7746_read_channel(struct iio_dev *indio_dev,
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return ret;
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delay = ret;
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regval = chip->config | AD7746_CONF_MODE_SINGLE_CONV;
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regval = chip->config | FIELD_PREP(AD7746_CONF_MODE_MASK,
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AD7746_CONF_MODE_SINGLE_CONV);
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ret = i2c_smbus_write_byte_data(chip->client, AD7746_REG_CFG, regval);
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if (ret < 0)
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return ret;
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msleep(delay);
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/* Now read the actual register */
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ret = i2c_smbus_read_i2c_block_data(chip->client, chan->address >> 8,
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ret = i2c_smbus_read_i2c_block_data(chip->client,
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ad7746_chan_info[chan->address].addr,
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sizeof(data), data);
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if (ret < 0)
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return ret;
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@ -600,8 +648,8 @@ static int ad7746_read_raw(struct iio_dev *indio_dev,
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_OFFSET:
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*val = AD7746_CAPDAC_DACP(chip->capdac[chan->channel]
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[chan->differential]) * 338646;
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*val = FIELD_GET(AD7746_CAPDAC_DACP_MASK,
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chip->capdac[chan->channel][chan->differential]) * 338646;
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_SCALE:
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@ -624,13 +672,11 @@ static int ad7746_read_raw(struct iio_dev *indio_dev,
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case IIO_CHAN_INFO_SAMP_FREQ:
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switch (chan->type) {
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case IIO_CAPACITANCE:
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idx = (chip->config & AD7746_CONF_CAPFS_MASK) >>
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AD7746_CONF_CAPFS_SHIFT;
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idx = FIELD_GET(AD7746_CONF_CAPFS_MASK, chip->config);
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*val = ad7746_cap_filter_rate_table[idx][0];
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return IIO_VAL_INT;
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case IIO_VOLTAGE:
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idx = (chip->config & AD7746_CONF_VTFS_MASK) >>
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AD7746_CONF_VTFS_SHIFT;
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idx = FIELD_GET(AD7746_CONF_VTFS_MASK, chip->config);
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*val = ad7746_vt_filter_rate_table[idx][0];
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return IIO_VAL_INT;
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default:
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@ -696,16 +742,16 @@ static int ad7746_probe(struct i2c_client *client,
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if (!ret) {
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switch (vdd_permille) {
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case 125:
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regval |= AD7746_EXCSETUP_EXCLVL(0);
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regval |= FIELD_PREP(AD7746_EXCSETUP_EXCLVL_MASK, 0);
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break;
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case 250:
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regval |= AD7746_EXCSETUP_EXCLVL(1);
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regval |= FIELD_PREP(AD7746_EXCSETUP_EXCLVL_MASK, 1);
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break;
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case 375:
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regval |= AD7746_EXCSETUP_EXCLVL(2);
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regval |= FIELD_PREP(AD7746_EXCSETUP_EXCLVL_MASK, 2);
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break;
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case 500:
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regval |= AD7746_EXCSETUP_EXCLVL(3);
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regval |= FIELD_PREP(AD7746_EXCSETUP_EXCLVL_MASK, 3);
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break;
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default:
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break;
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