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ARM: 32-bit SoC platform updates

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Most of the SoC updates in this cycle are cleanups and moves to more
 modern infrastructure:
  - Davinci was moved to common clock framework
  - OMAP1-based Amstrad E3 "Superphone" saw a bunch of cleanups to the
    keyboard interface (bitbanged AT keyboard via GPIO).
  - Removal of some stale code for Renesas platforms
  - Power management improvements for i.MX6LL
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Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM 32-bit SoC platform updates from Olof Johansson:
 "Most of the SoC updates in this cycle are cleanups and moves to more
  modern infrastructure:

   - Davinci was moved to common clock framework

   - OMAP1-based Amstrad E3 "Superphone" saw a bunch of cleanups to the
     keyboard interface (bitbanged AT keyboard via GPIO).

   - Removal of some stale code for Renesas platforms

   - Power management improvements for i.MX6LL"

* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (112 commits)
  ARM: uniphier: select RESET_CONTROLLER
  arm64: uniphier: select RESET_CONTROLLER
  ARM: uniphier: remove empty Makefile
  ARM: exynos: Clear global variable on init error path
  ARM: exynos: Remove outdated maintainer information
  ARM: shmobile: Always enable ARCH_TIMER on SoCs with A7 and/or A15
  ARM: shmobile: r8a7779: hide unused r8a7779_platform_cpu_kill
  soc: r9a06g032: don't build SMP files for non-SMP config
  ARM: shmobile: Add the R9A06G032 SMP enabler driver
  ARM: at91: pm: configure wakeup sources for ULP1 mode
  ARM: at91: pm: add PMC fast startup registers defines
  ARM: at91: pm: Add ULP1 mode support
  ARM: at91: pm: Use ULP0 naming instead of slow clock
  ARM: hisi: handle of_iomap and fix missing of_node_put
  ARM: hisi: check of_iomap and fix missing of_node_put
  ARM: hisi: fix error handling and missing of_node_put
  ARM: mx5: Set the DBGEN bit in ARM_GPC register
  ARM: imx51: Configure M4IF to avoid visual artifacts
  ARM: imx: call imx6sx_cpuidle_init() conditionally for 6sll
  ARM: imx: fix i.MX6SLL build
  ...
This commit is contained in:
Linus Torvalds 2018-08-23 13:44:43 -07:00
commit 9e259f9352
133 changed files with 2446 additions and 5321 deletions
Download patch file Download diff file Expand all files Collapse all files

58
include/linux/platform_data/ams-delta-fiq.h Normal file
View file

@ -0,0 +1,58 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* include/linux/platform_data/ams-delta-fiq.h
*
* Taken from the original Amstrad modifications to fiq.h
*
* Copyright (c) 2004 Amstrad Plc
* Copyright (c) 2006 Matt Callow
* Copyright (c) 2010 Janusz Krzysztofik
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __LINUX_PLATFORM_DATA_AMS_DELTA_FIQ_H
#define __LINUX_PLATFORM_DATA_AMS_DELTA_FIQ_H
/*
* These are the offsets from the beginning of the fiq_buffer. They are put here
* since the buffer and header need to be accessed by drivers servicing devices
* which generate GPIO interrupts - e.g. keyboard, modem, hook switch.
*/
#define FIQ_MASK 0
#define FIQ_STATE 1
#define FIQ_KEYS_CNT 2
#define FIQ_TAIL_OFFSET 3
#define FIQ_HEAD_OFFSET 4
#define FIQ_BUF_LEN 5
#define FIQ_KEY 6
#define FIQ_MISSED_KEYS 7
#define FIQ_BUFFER_START 8
#define FIQ_GPIO_INT_MASK 9
#define FIQ_KEYS_HICNT 10
#define FIQ_IRQ_PEND 11
#define FIQ_SIR_CODE_L1 12
#define IRQ_SIR_CODE_L2 13
#define FIQ_CNT_INT_00 14
#define FIQ_CNT_INT_KEY 15
#define FIQ_CNT_INT_MDM 16
#define FIQ_CNT_INT_03 17
#define FIQ_CNT_INT_HSW 18
#define FIQ_CNT_INT_05 19
#define FIQ_CNT_INT_06 20
#define FIQ_CNT_INT_07 21
#define FIQ_CNT_INT_08 22
#define FIQ_CNT_INT_09 23
#define FIQ_CNT_INT_10 24
#define FIQ_CNT_INT_11 25
#define FIQ_CNT_INT_12 26
#define FIQ_CNT_INT_13 27
#define FIQ_CNT_INT_14 28
#define FIQ_CNT_INT_15 29
#define FIQ_CIRC_BUFF 30 /*Start of circular buffer */
#endif

1
include/linux/platform_data/mtd-davinci-aemif.h
View file

@ -33,5 +33,4 @@ struct davinci_aemif_timing {
u8 ta;
};
int davinci_aemif_setup(struct platform_device *pdev);
#endif

29
include/linux/platform_data/pm33xx.h
View file

@ -12,6 +12,29 @@
#include <linux/kbuild.h>
#include <linux/types.h>
/*
* WFI Flags for sleep code control
*
* These flags allow PM code to exclude certain operations from happening
* in the low level ASM code found in sleep33xx.S and sleep43xx.S
*
* WFI_FLAG_FLUSH_CACHE: Flush the ARM caches and disable caching. Only
* needed when MPU will lose context.
* WFI_FLAG_SELF_REFRESH: Let EMIF place DDR memory into self-refresh and
* disable EMIF.
* WFI_FLAG_SAVE_EMIF: Save context of all EMIF registers and restore in
* resume path. Only needed if PER domain loses context
* and must also have WFI_FLAG_SELF_REFRESH set.
* WFI_FLAG_WAKE_M3: Disable MPU clock or clockdomain to cause wkup_m3 to
* execute when WFI instruction executes.
* WFI_FLAG_RTC_ONLY: Configure the RTC to enter RTC+DDR mode.
*/
#define WFI_FLAG_FLUSH_CACHE BIT(0)
#define WFI_FLAG_SELF_REFRESH BIT(1)
#define WFI_FLAG_SAVE_EMIF BIT(2)
#define WFI_FLAG_WAKE_M3 BIT(3)
#define WFI_FLAG_RTC_ONLY BIT(4)
#ifndef __ASSEMBLER__
struct am33xx_pm_sram_addr {
void (*do_wfi)(void);
@ -19,12 +42,15 @@ struct am33xx_pm_sram_addr {
unsigned long *resume_offset;
unsigned long *emif_sram_table;
unsigned long *ro_sram_data;
unsigned long resume_address;
};
struct am33xx_pm_platform_data {
int (*init)(void);
int (*soc_suspend)(unsigned int state, int (*fn)(unsigned long));
int (*soc_suspend)(unsigned int state, int (*fn)(unsigned long),
unsigned long args);
struct am33xx_pm_sram_addr *(*get_sram_addrs)(void);
void __iomem *(*get_rtc_base_addr)(void);
};
struct am33xx_pm_sram_data {
@ -36,6 +62,7 @@ struct am33xx_pm_sram_data {
struct am33xx_pm_ro_sram_data {
u32 amx3_pm_sram_data_virt;
u32 amx3_pm_sram_data_phys;
void __iomem *rtc_base_virt;
} __packed __aligned(8);
#endif /* __ASSEMBLER__ */