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PCI changes for the v3.10 merge window:

Browse source 
PCI device hotplug
     - Remove ACPI PCI subdrivers (Jiang Liu, Myron Stowe)
     - Make acpiphp builtin only, not modular (Jiang Liu)
     - Add acpiphp mutual exclusion (Jiang Liu)
 
   Power management
     - Skip "PME enabled/disabled" messages when not supported (Rafael Wysocki)
     - Fix fallback to PCI_D0 (Rafael Wysocki)
 
   Miscellaneous
     - Factor quirk_io_region (Yinghai Lu)
     - Cache MSI capability offsets & cleanup (Gavin Shan, Bjorn Helgaas)
     - Clean up EISA resource initialization and logging (Bjorn Helgaas)
     - Fix prototype warnings (Andy Shevchenko, Bjorn Helgaas)
     - MIPS: Initialize of_node before scanning bus (Gabor Juhos)
     - Fix pcibios_get_phb_of_node() declaration "weak" annotation (Gabor Juhos)
     - Add MSI INTX_DISABLE quirks for AR8161/AR8162/etc (Xiong Huang)
     - Fix aer_inject return values (Prarit Bhargava)
     - Remove PME/ACPI dependency (Andrew Murray)
     - Use shared PCI_BUS_NUM() and PCI_DEVID() (Shuah Khan)
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Merge tag 'pci-v3.10-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci

Pull PCI updates from Bjorn Helgaas:
 "PCI changes for the v3.10 merge window:

  PCI device hotplug
   - Remove ACPI PCI subdrivers (Jiang Liu, Myron Stowe)
   - Make acpiphp builtin only, not modular (Jiang Liu)
   - Add acpiphp mutual exclusion (Jiang Liu)

  Power management
   - Skip "PME enabled/disabled" messages when not supported (Rafael
     Wysocki)
   - Fix fallback to PCI_D0 (Rafael Wysocki)

  Miscellaneous
   - Factor quirk_io_region (Yinghai Lu)
   - Cache MSI capability offsets & cleanup (Gavin Shan, Bjorn Helgaas)
   - Clean up EISA resource initialization and logging (Bjorn Helgaas)
   - Fix prototype warnings (Andy Shevchenko, Bjorn Helgaas)
   - MIPS: Initialize of_node before scanning bus (Gabor Juhos)
   - Fix pcibios_get_phb_of_node() declaration "weak" annotation (Gabor
     Juhos)
   - Add MSI INTX_DISABLE quirks for AR8161/AR8162/etc (Xiong Huang)
   - Fix aer_inject return values (Prarit Bhargava)
   - Remove PME/ACPI dependency (Andrew Murray)
   - Use shared PCI_BUS_NUM() and PCI_DEVID() (Shuah Khan)"

* tag 'pci-v3.10-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (63 commits)
  vfio-pci: Use cached MSI/MSI-X capabilities
  vfio-pci: Use PCI_MSIX_TABLE_BIR, not PCI_MSIX_FLAGS_BIRMASK
  PCI: Remove "extern" from function declarations
  PCI: Use PCI_MSIX_TABLE_BIR, not PCI_MSIX_FLAGS_BIRMASK
  PCI: Drop msi_mask_reg() and remove drivers/pci/msi.h
  PCI: Use msix_table_size() directly, drop multi_msix_capable()
  PCI: Drop msix_table_offset_reg() and msix_pba_offset_reg() macros
  PCI: Drop is_64bit_address() and is_mask_bit_support() macros
  PCI: Drop msi_data_reg() macro
  PCI: Drop msi_lower_address_reg() and msi_upper_address_reg() macros
  PCI: Drop msi_control_reg() macro and use PCI_MSI_FLAGS directly
  PCI: Use cached MSI/MSI-X offsets from dev, not from msi_desc
  PCI: Clean up MSI/MSI-X capability #defines
  PCI: Use cached MSI-X cap while enabling MSI-X
  PCI: Use cached MSI cap while enabling MSI interrupts
  PCI: Remove MSI/MSI-X cap check in pci_msi_check_device()
  PCI: Cache MSI/MSI-X capability offsets in struct pci_dev
  PCI: Use u8, not int, for PM capability offset
  [SCSI] megaraid_sas: Use correct #define for MSI-X capability
  PCI: Remove "extern" from function declarations
  ...
This commit is contained in:
Linus Torvalds 2013-04-29 09:30:25 -07:00
commit 96a3e8af5a
64 changed files with 888 additions and 1212 deletions
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30
include/uapi/linux/pci_regs.h
View file

@ -292,12 +292,12 @@
/* Message Signalled Interrupts registers */
#define PCI_MSI_FLAGS 2 /* Various flags */
#define PCI_MSI_FLAGS_64BIT 0x80 /* 64-bit addresses allowed */
#define PCI_MSI_FLAGS_QSIZE 0x70 /* Message queue size configured */
#define PCI_MSI_FLAGS_QMASK 0x0e /* Maximum queue size available */
#define PCI_MSI_FLAGS_ENABLE 0x01 /* MSI feature enabled */
#define PCI_MSI_FLAGS_MASKBIT 0x100 /* 64-bit mask bits allowed */
#define PCI_MSI_FLAGS 2 /* Message Control */
#define PCI_MSI_FLAGS_ENABLE 0x0001 /* MSI feature enabled */
#define PCI_MSI_FLAGS_QMASK 0x000e /* Maximum queue size available */
#define PCI_MSI_FLAGS_QSIZE 0x0070 /* Message queue size configured */
#define PCI_MSI_FLAGS_64BIT 0x0080 /* 64-bit addresses allowed */
#define PCI_MSI_FLAGS_MASKBIT 0x0100 /* Per-vector masking capable */
#define PCI_MSI_RFU 3 /* Rest of capability flags */
#define PCI_MSI_ADDRESS_LO 4 /* Lower 32 bits */
#define PCI_MSI_ADDRESS_HI 8 /* Upper 32 bits (if PCI_MSI_FLAGS_64BIT set) */
@ -309,13 +309,17 @@
#define PCI_MSI_PENDING_64 20 /* Pending intrs for 64-bit devices */
/* MSI-X registers */
#define PCI_MSIX_FLAGS 2
#define PCI_MSIX_FLAGS_QSIZE 0x7FF
#define PCI_MSIX_FLAGS_ENABLE (1 << 15)
#define PCI_MSIX_FLAGS_MASKALL (1 << 14)
#define PCI_MSIX_TABLE 4
#define PCI_MSIX_PBA 8
#define PCI_MSIX_FLAGS_BIRMASK (7 << 0)
#define PCI_MSIX_FLAGS 2 /* Message Control */
#define PCI_MSIX_FLAGS_QSIZE 0x07FF /* Table size */
#define PCI_MSIX_FLAGS_MASKALL 0x4000 /* Mask all vectors for this function */
#define PCI_MSIX_FLAGS_ENABLE 0x8000 /* MSI-X enable */
#define PCI_MSIX_TABLE 4 /* Table offset */
#define PCI_MSIX_TABLE_BIR 0x00000007 /* BAR index */
#define PCI_MSIX_TABLE_OFFSET 0xfffffff8 /* Offset into specified BAR */
#define PCI_MSIX_PBA 8 /* Pending Bit Array offset */
#define PCI_MSIX_PBA_BIR 0x00000007 /* BAR index */
#define PCI_MSIX_PBA_OFFSET 0xfffffff8 /* Offset into specified BAR */
#define PCI_MSIX_FLAGS_BIRMASK (7 << 0) /* deprecated */
#define PCI_CAP_MSIX_SIZEOF 12 /* size of MSIX registers */
/* MSI-X entry's format */