New AMD PCI ID for NTB, and a number of bug fixes for ntb_hw_switchtec

for Linux v5.17
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEoE9b9c3U2JxX98mqbmZLrHqL0iMFAmHd/AYACgkQbmZLrHqL
 0iMyRA/+KnlvCJMxDdeZ7dcK2s86BuvWESfkRbJYAMBNX6HiuH3SHll/UNF8UvLU
 CIl12cqALKwu618J37gbF9HHuVu+VVk1Dl9ib+mdoqGL/kPqX0SqtyP4lCyKg6HK
 POnOgjZWd0YR9tNjBukRx5JnLH1KtjaLVLWPxTmb0WgwQjcNqXWtRIWjHovLRThJ
 938P02JQQv4TUcFuazXmdgiF0vUm+KPLpBP4urgPSSTPmdKLHvQY5ScJr+Do7OS5
 51mxPkgF1JBnvJiuCWdZOXFpoA/o8UG3REVoGPMzIBStc+1vnFWu1eo80DIfXbz/
 zYPYj+Foq4/ZsAJU5j4FHzVs9SkP8VKClENa8BNDoUiSEyYbDMFbmw4D+VOV0Z/n
 CmQiOQqZh5cshQL7V0v+6pNYYyQBGK2JpCC8EvTWIlYWohmYvu/WLCpVwk4PCjBX
 caM0l9f99dTdzgPcRMC2CnKiqrAutIcCoaefyqVNIyMLiI0SyoYaBcbDeXNmujLV
 w5JGjaeCiv8AJYo6/XvqCrizYC5ETwNy+Rt4nyXH5gTGSGFH0hJ+Ip/8DPVQ1e/K
 DEEVZACh6uPP/ySSjZZEGagqI7YetSu3TEU1+8n1j4IA/ugP7XBwG1ZZQ9rEMcfw
 kG+VJwOil8VeRaL+osXsfU8xxRNIB6zuBajT0FG0eCpkAAIZWqw=
 =TMHM
 -----END PGP SIGNATURE-----

Merge tag 'ntb-5.17' of git://github.com/jonmason/ntb

Pull NTB updates from Jon Mason:
 "New AMD PCI ID for NTB, and a number of bug fixes for ntb_hw_switchtec
  for Linux v5.17"

* tag 'ntb-5.17' of git://github.com/jonmason/ntb:
  ntb_hw_switchtec: Fix a minor issue in config_req_id_table()
  ntb_hw_switchtec: Remove code for disabling ID protection
  ntb_hw_switchtec: Update the way of getting VEP instance ID
  ntb_hw_switchtec: AND with the part_map for a valid tpart_vec
  ntb_hw_switchtec: Fix bug with more than 32 partitions
  ntb_hw_switchtec: Fix pff ioread to read into mmio_part_cfg_all
  ntb_hw_switchtec: fix the spelling of "its"
  NTB/msi: Fix ntbm_msi_request_threaded_irq() kernel-doc comment
  ntb_hw_amd: Add NTB PCI ID for new gen CPU

include/linux/switchtec.h

@@ -337,8 +337,6 @@ enum {
 	NTB_CTRL_REQ_ID_EN = 1 << 0,
 
 	NTB_CTRL_LUT_EN = 1 << 0,
-
-	NTB_PART_CTRL_ID_PROT_DIS = 1 << 0,
 };
 
 struct ntb_ctrl_regs {