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The common clock framework changes for 3.11 include new clock drivers

Browse source 
across several different platforms and architectures, fixes to existing
 drivers, a MAINTAINERS file fix and improvements to the basic clock
 types that allow them to be of use to more platforms than before. Only a
 few fixes to the core framework are included with most all of the
 changes landing in the various clock drivers themselves.
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Merge tag 'clk-for-linus-3.11' of git://git.linaro.org/people/mturquette/linux

Pull clock framework updates from Mike Turquette:
 "The common clock framework changes for 3.11 include new clock drivers
  across several different platforms and architectures, fixes to
  existing drivers, a MAINTAINERS file fix and improvements to the basic
  clock types that allow them to be of use to more platforms than before.

  Only a few fixes to the core framework are included with most all of
  the changes landing in the various clock drivers themselves."

* tag 'clk-for-linus-3.11' of git://git.linaro.org/people/mturquette/linux: (55 commits)
  clk: tegra: fix ifdef for tegra_periph_reset_assert inline
  clk: tegra: provide tegra_periph_reset_assert alternative
  clk: exynos4: Fix clock aliases for cpufreq related clocks
  clk: samsung: Add MUX_FA macro to pass flag and alias
  clk: add support for Rockchip gate clocks
  clk: vexpress: Make the clock drivers directly available for arm64
  clk: vexpress: Use full node name to identify individual clocks
  clk: tegra: T114: add DFLL DVCO reset control
  clk: tegra: T114: add DFLL source clocks
  clk: tegra: T114: add FCPU clock shaper programming, needed by the DFLL
  clk: gate: add CLK_GATE_HIWORD_MASK
  clk: divider: add CLK_DIVIDER_HIWORD_MASK flag
  clk: mux: add CLK_MUX_HIWORD_MASK
  clk: Always notify whole subtree when reparenting
  MAINTAINERS: make drivers/clk entry match subdirs
  clk: honor CLK_GET_RATE_NOCACHE in clk_set_rate
  clk: use clk_get_rate() for debugfs
  clk: tegra: Use override bits when needed
  clk: tegra: override bits for Tegra30 PLLM
  clk: tegra: override bits for Tegra114 PLLM
  ...
This commit is contained in:
Linus Torvalds 2013-07-03 11:54:50 -07:00
commit 92295f632c
47 changed files with 2259 additions and 413 deletions
Download patch file Download diff file Expand all files Collapse all files

6
include/linux/platform_data/clk-ux500.h
View file

@ -12,7 +12,9 @@
void u8500_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base,
u32 clkrst5_base, u32 clkrst6_base);
void u9540_clk_init(void);
void u8540_clk_init(void);
void u9540_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base,
u32 clkrst5_base, u32 clkrst6_base);
void u8540_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base,
u32 clkrst5_base, u32 clkrst6_base);
#endif /* __CLK_UX500_H */

18
include/linux/platform_data/si5351.h
View file

@ -78,6 +78,23 @@ enum si5351_drive_strength {
SI5351_DRIVE_8MA = 8,
};
/**
* enum si5351_disable_state - Si5351 clock output disable state
* @SI5351_DISABLE_DEFAULT: default, do not change eeprom config
* @SI5351_DISABLE_LOW: CLKx is set to a LOW state when disabled
* @SI5351_DISABLE_HIGH: CLKx is set to a HIGH state when disabled
* @SI5351_DISABLE_FLOATING: CLKx is set to a FLOATING state when
* disabled
* @SI5351_DISABLE_NEVER: CLKx is NEVER disabled
*/
enum si5351_disable_state {
SI5351_DISABLE_DEFAULT = 0,
SI5351_DISABLE_LOW,
SI5351_DISABLE_HIGH,
SI5351_DISABLE_FLOATING,
SI5351_DISABLE_NEVER,
};
/**
* struct si5351_clkout_config - Si5351 clock output configuration
* @clkout: clkout number
@ -91,6 +108,7 @@ struct si5351_clkout_config {
enum si5351_multisynth_src multisynth_src;
enum si5351_clkout_src clkout_src;
enum si5351_drive_strength drive;
enum si5351_disable_state disable_state;
bool pll_master;
unsigned long rate;
};