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cpufreq: qcom-hw: Allow getting the maximum transition latency for OPPs

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In order to fine-tune the frequency scaling from various governors,
allow to set a maximum transition latency from OPPs, which may be
different depending on the SoC.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
[Fixup for 5.18 by Jami]
This commit is contained in:
AngeloGioacchino Del Regno 2021-01-19 13:03:11 +01:00 • committed by Jami Kettunen
parent 9a1c992448
commit 8fe59fda3f
1 changed files with 30 additions and 13 deletions
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43
drivers/cpufreq/qcom-cpufreq-hw.c
View file

@ -1529,6 +1529,7 @@ static int qcom_cpufreq_hw_cpu_init(struct cpufreq_policy *policy)
void __iomem *base;
struct qcom_cpufreq_data *data;
char fdom_resname[] = "freq-domainX";
unsigned int transition_latency;
int cpu_count, index, ret;
cpu_dev = get_cpu_device(policy->cpu);
@ -1579,6 +1580,28 @@ static int qcom_cpufreq_hw_cpu_init(struct cpufreq_policy *policy)
data->soc_data = of_device_get_match_data(&pdev->dev);
data->base = base;
data->res = res;
policy->driver_data = data;
if (readl_relaxed(base + data->soc_data->reg_dcvs_ctrl) & 0x1)
data->per_core_dcvs = true;
cpu_count = qcom_get_related_cpus(index, policy->cpus);
if (cpumask_empty(policy->cpus)) {
dev_err(dev, "Domain-%d failed to get related CPUs\n", index);
ret = -ENOENT;
goto error;
}
policy->dvfs_possible_from_any_cpu = true;
if (!data->soc_data->uses_tz) {
ret = qcom_cpufreq_hw_osm_setup(cpu_dev, policy,
cpu_count, index);
if (ret) {
dev_err(dev, "Cannot setup the OSM for CPU%d: %d\n",
policy->cpu, ret);
goto error;
}
}
/* HW should be in enabled state to proceed */
if (!(readl_relaxed(base + data->soc_data->reg_enable) & 0x1)) {
@ -1587,19 +1610,6 @@ static int qcom_cpufreq_hw_cpu_init(struct cpufreq_policy *policy)
goto error;
}
if (readl_relaxed(base + data->soc_data->reg_dcvs_ctrl) & 0x1)
data->per_core_dcvs = true;
qcom_get_related_cpus(index, policy->cpus);
if (cpumask_empty(policy->cpus)) {
dev_err(dev, "Domain-%d failed to get related CPUs\n", index);
ret = -ENOENT;
goto error;
}
policy->driver_data = data;
policy->dvfs_possible_from_any_cpu = true;
ret = qcom_cpufreq_hw_read_lut(cpu_dev, policy);
if (ret) {
dev_err(dev, "Domain-%d failed to read LUT\n", index);
@ -1613,6 +1623,12 @@ static int qcom_cpufreq_hw_cpu_init(struct cpufreq_policy *policy)
goto error;
}
transition_latency = dev_pm_opp_get_max_transition_latency(cpu_dev);
if (!transition_latency)
transition_latency = CPUFREQ_ETERNAL;
policy->cpuinfo.transition_latency = transition_latency;
if (policy_has_boost_freq(policy)) {
ret = cpufreq_enable_boost_support();
if (ret)
@ -1625,6 +1641,7 @@ static int qcom_cpufreq_hw_cpu_init(struct cpufreq_policy *policy)
return 0;
error:
policy->driver_data = NULL;
kfree(data);
unmap_base:
iounmap(base);