Merge branch 'asoc-5.5' into asoc-next
This commit is contained in:
Mark Brown
commit
8c4d2a0bfb
228 changed files with 12500 additions and 3812 deletions
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@ -556,6 +556,9 @@ enum host_event_code {
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/* Keyboard recovery combo with hardware reinitialization */
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EC_HOST_EVENT_KEYBOARD_RECOVERY_HW_REINIT = 30,
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/* WoV */
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EC_HOST_EVENT_WOV = 31,
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/*
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* The high bit of the event mask is not used as a host event code. If
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* it reads back as set, then the entire event mask should be
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@ -1277,8 +1280,6 @@ enum ec_feature_code {
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* MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE.
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*/
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EC_FEATURE_REFINED_TABLET_MODE_HYSTERESIS = 37,
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/* EC supports audio codec. */
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EC_FEATURE_AUDIO_CODEC = 38,
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/* The MCU is a System Companion Processor (SCP). */
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EC_FEATURE_SCP = 39,
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/* The MCU is an Integrated Sensor Hub */
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@ -4468,92 +4469,246 @@ enum mkbp_cec_event {
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/*****************************************************************************/
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/* Commands for I2S recording on audio codec. */
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/* Commands for audio codec. */
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#define EC_CMD_EC_CODEC 0x00BC
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#define EC_CMD_CODEC_I2S 0x00BC
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#define EC_WOV_I2S_SAMPLE_RATE 48000
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enum ec_codec_i2s_subcmd {
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EC_CODEC_SET_SAMPLE_DEPTH = 0x0,
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EC_CODEC_SET_GAIN = 0x1,
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EC_CODEC_GET_GAIN = 0x2,
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EC_CODEC_I2S_ENABLE = 0x3,
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EC_CODEC_I2S_SET_CONFIG = 0x4,
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EC_CODEC_I2S_SET_TDM_CONFIG = 0x5,
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EC_CODEC_I2S_SET_BCLK = 0x6,
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EC_CODEC_I2S_SUBCMD_COUNT = 0x7,
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enum ec_codec_subcmd {
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EC_CODEC_GET_CAPABILITIES = 0x0,
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EC_CODEC_GET_SHM_ADDR = 0x1,
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EC_CODEC_SET_SHM_ADDR = 0x2,
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EC_CODEC_SUBCMD_COUNT,
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};
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enum ec_sample_depth_value {
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EC_CODEC_SAMPLE_DEPTH_16 = 0,
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EC_CODEC_SAMPLE_DEPTH_24 = 1,
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enum ec_codec_cap {
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EC_CODEC_CAP_WOV_AUDIO_SHM = 0,
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EC_CODEC_CAP_WOV_LANG_SHM = 1,
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EC_CODEC_CAP_LAST = 32,
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};
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enum ec_i2s_config {
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EC_DAI_FMT_I2S = 0,
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EC_DAI_FMT_RIGHT_J = 1,
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EC_DAI_FMT_LEFT_J = 2,
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EC_DAI_FMT_PCM_A = 3,
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EC_DAI_FMT_PCM_B = 4,
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EC_DAI_FMT_PCM_TDM = 5,
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enum ec_codec_shm_id {
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EC_CODEC_SHM_ID_WOV_AUDIO = 0x0,
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EC_CODEC_SHM_ID_WOV_LANG = 0x1,
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EC_CODEC_SHM_ID_LAST,
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};
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/*
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* For subcommand EC_CODEC_GET_GAIN.
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*/
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struct __ec_align1 ec_codec_i2s_gain {
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uint8_t left;
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uint8_t right;
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enum ec_codec_shm_type {
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EC_CODEC_SHM_TYPE_EC_RAM = 0x0,
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EC_CODEC_SHM_TYPE_SYSTEM_RAM = 0x1,
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};
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struct __ec_todo_unpacked ec_param_codec_i2s_tdm {
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int16_t ch0_delay; /* 0 to 496 */
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int16_t ch1_delay; /* -1 to 496 */
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uint8_t adjacent_to_ch0;
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uint8_t adjacent_to_ch1;
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struct __ec_align1 ec_param_ec_codec_get_shm_addr {
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uint8_t shm_id;
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uint8_t reserved[3];
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};
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struct __ec_todo_packed ec_param_codec_i2s {
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/* enum ec_codec_i2s_subcmd */
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uint8_t cmd;
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struct __ec_align4 ec_param_ec_codec_set_shm_addr {
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uint64_t phys_addr;
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uint32_t len;
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uint8_t shm_id;
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uint8_t reserved[3];
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};
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struct __ec_align4 ec_param_ec_codec {
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uint8_t cmd; /* enum ec_codec_subcmd */
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uint8_t reserved[3];
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union {
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/*
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* EC_CODEC_SET_SAMPLE_DEPTH
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* Value should be one of ec_sample_depth_value.
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*/
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uint8_t depth;
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/*
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* EC_CODEC_SET_GAIN
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* Value should be 0~43 for both channels.
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*/
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struct ec_codec_i2s_gain gain;
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/*
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* EC_CODEC_I2S_ENABLE
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* 1 to enable, 0 to disable.
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*/
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uint8_t i2s_enable;
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/*
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* EC_CODEC_I2S_SET_CONFIG
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* Value should be one of ec_i2s_config.
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*/
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uint8_t i2s_config;
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/*
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* EC_CODEC_I2S_SET_TDM_CONFIG
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* Value should be one of ec_i2s_config.
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*/
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struct ec_param_codec_i2s_tdm tdm_param;
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/*
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* EC_CODEC_I2S_SET_BCLK
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*/
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uint32_t bclk;
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struct ec_param_ec_codec_get_shm_addr
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get_shm_addr_param;
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struct ec_param_ec_codec_set_shm_addr
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set_shm_addr_param;
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};
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};
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struct __ec_align4 ec_response_ec_codec_get_capabilities {
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uint32_t capabilities;
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};
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struct __ec_align4 ec_response_ec_codec_get_shm_addr {
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uint64_t phys_addr;
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uint32_t len;
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uint8_t type;
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uint8_t reserved[3];
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};
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/*****************************************************************************/
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/* Commands for DMIC on audio codec. */
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#define EC_CMD_EC_CODEC_DMIC 0x00BD
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enum ec_codec_dmic_subcmd {
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EC_CODEC_DMIC_GET_MAX_GAIN = 0x0,
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EC_CODEC_DMIC_SET_GAIN_IDX = 0x1,
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EC_CODEC_DMIC_GET_GAIN_IDX = 0x2,
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EC_CODEC_DMIC_SUBCMD_COUNT,
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};
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enum ec_codec_dmic_channel {
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EC_CODEC_DMIC_CHANNEL_0 = 0x0,
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EC_CODEC_DMIC_CHANNEL_1 = 0x1,
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EC_CODEC_DMIC_CHANNEL_2 = 0x2,
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EC_CODEC_DMIC_CHANNEL_3 = 0x3,
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EC_CODEC_DMIC_CHANNEL_4 = 0x4,
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EC_CODEC_DMIC_CHANNEL_5 = 0x5,
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EC_CODEC_DMIC_CHANNEL_6 = 0x6,
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EC_CODEC_DMIC_CHANNEL_7 = 0x7,
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EC_CODEC_DMIC_CHANNEL_COUNT,
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};
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struct __ec_align1 ec_param_ec_codec_dmic_set_gain_idx {
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uint8_t channel; /* enum ec_codec_dmic_channel */
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uint8_t gain;
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uint8_t reserved[2];
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};
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struct __ec_align1 ec_param_ec_codec_dmic_get_gain_idx {
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uint8_t channel; /* enum ec_codec_dmic_channel */
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uint8_t reserved[3];
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};
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struct __ec_align4 ec_param_ec_codec_dmic {
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uint8_t cmd; /* enum ec_codec_dmic_subcmd */
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uint8_t reserved[3];
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union {
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struct ec_param_ec_codec_dmic_set_gain_idx
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set_gain_idx_param;
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struct ec_param_ec_codec_dmic_get_gain_idx
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get_gain_idx_param;
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};
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};
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struct __ec_align1 ec_response_ec_codec_dmic_get_max_gain {
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uint8_t max_gain;
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};
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struct __ec_align1 ec_response_ec_codec_dmic_get_gain_idx {
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uint8_t gain;
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};
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/*****************************************************************************/
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/* Commands for I2S RX on audio codec. */
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#define EC_CMD_EC_CODEC_I2S_RX 0x00BE
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enum ec_codec_i2s_rx_subcmd {
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EC_CODEC_I2S_RX_ENABLE = 0x0,
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EC_CODEC_I2S_RX_DISABLE = 0x1,
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EC_CODEC_I2S_RX_SET_SAMPLE_DEPTH = 0x2,
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EC_CODEC_I2S_RX_SET_DAIFMT = 0x3,
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EC_CODEC_I2S_RX_SET_BCLK = 0x4,
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EC_CODEC_I2S_RX_SUBCMD_COUNT,
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};
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enum ec_codec_i2s_rx_sample_depth {
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EC_CODEC_I2S_RX_SAMPLE_DEPTH_16 = 0x0,
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EC_CODEC_I2S_RX_SAMPLE_DEPTH_24 = 0x1,
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EC_CODEC_I2S_RX_SAMPLE_DEPTH_COUNT,
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};
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enum ec_codec_i2s_rx_daifmt {
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EC_CODEC_I2S_RX_DAIFMT_I2S = 0x0,
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EC_CODEC_I2S_RX_DAIFMT_RIGHT_J = 0x1,
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EC_CODEC_I2S_RX_DAIFMT_LEFT_J = 0x2,
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EC_CODEC_I2S_RX_DAIFMT_COUNT,
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};
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struct __ec_align1 ec_param_ec_codec_i2s_rx_set_sample_depth {
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uint8_t depth;
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uint8_t reserved[3];
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};
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struct __ec_align1 ec_param_ec_codec_i2s_rx_set_gain {
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uint8_t left;
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uint8_t right;
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uint8_t reserved[2];
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};
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struct __ec_align1 ec_param_ec_codec_i2s_rx_set_daifmt {
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uint8_t daifmt;
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uint8_t reserved[3];
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};
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struct __ec_align4 ec_param_ec_codec_i2s_rx_set_bclk {
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uint32_t bclk;
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};
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struct __ec_align4 ec_param_ec_codec_i2s_rx {
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uint8_t cmd; /* enum ec_codec_i2s_rx_subcmd */
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uint8_t reserved[3];
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union {
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struct ec_param_ec_codec_i2s_rx_set_sample_depth
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set_sample_depth_param;
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struct ec_param_ec_codec_i2s_rx_set_daifmt
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set_daifmt_param;
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struct ec_param_ec_codec_i2s_rx_set_bclk
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set_bclk_param;
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};
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};
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/*****************************************************************************/
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/* Commands for WoV on audio codec. */
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#define EC_CMD_EC_CODEC_WOV 0x00BF
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enum ec_codec_wov_subcmd {
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EC_CODEC_WOV_SET_LANG = 0x0,
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EC_CODEC_WOV_SET_LANG_SHM = 0x1,
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EC_CODEC_WOV_GET_LANG = 0x2,
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EC_CODEC_WOV_ENABLE = 0x3,
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EC_CODEC_WOV_DISABLE = 0x4,
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EC_CODEC_WOV_READ_AUDIO = 0x5,
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EC_CODEC_WOV_READ_AUDIO_SHM = 0x6,
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EC_CODEC_WOV_SUBCMD_COUNT,
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};
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/*
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* @hash is SHA256 of the whole language model.
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* @total_len indicates the length of whole language model.
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* @offset is the cursor from the beginning of the model.
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* @buf is the packet buffer.
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* @len denotes how many bytes in the buf.
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*/
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struct __ec_align4 ec_param_ec_codec_wov_set_lang {
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uint8_t hash[32];
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uint32_t total_len;
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uint32_t offset;
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uint8_t buf[128];
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uint32_t len;
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};
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struct __ec_align4 ec_param_ec_codec_wov_set_lang_shm {
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uint8_t hash[32];
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uint32_t total_len;
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};
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struct __ec_align4 ec_param_ec_codec_wov {
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uint8_t cmd; /* enum ec_codec_wov_subcmd */
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uint8_t reserved[3];
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union {
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struct ec_param_ec_codec_wov_set_lang
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set_lang_param;
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struct ec_param_ec_codec_wov_set_lang_shm
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set_lang_shm_param;
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};
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};
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struct __ec_align4 ec_response_ec_codec_wov_get_lang {
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uint8_t hash[32];
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};
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struct __ec_align4 ec_response_ec_codec_wov_read_audio {
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uint8_t buf[128];
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uint32_t len;
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};
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struct __ec_align4 ec_response_ec_codec_wov_read_audio_shm {
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uint32_t offset;
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uint32_t len;
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};
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/*****************************************************************************/
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/* System commands */
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