coresight: Changes for v6.1

Coresight trace subsystem updates for v6.1 includes:
   - Support for HiSilicon PTT trace
   - Coresight cleanup of sysfs accessor functions, reduced
     code size.
   - Expose coresight timestamp source for ETMv4+
   - DT binding updates to include missing properties
   - Minor documentation, Kconfig text fixes.
 
 Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEEuFy0byloRoXZHaWBxcXRZPKyBqEFAmMpf/UACgkQxcXRZPKy
 BqE58g//cxM7TR4QNsI0IQxHxfDjFxWyiDVLfLxpZK8HHQYbpWZSMq/8Da+BJMNC
 UtxaDIPdpMJy1oPcNuLE6tyvhlpK+Mp1BII934LpqvQp14YIjaghWCikYyHy0Awi
 Fz1UG46bjcq3L8VA2kg3ShzUmW/SJH4/Lh5yGvnGmQPGP/Kc4Fr/PdY1NNcE+wC4
 HeIRCla5rt6LXvNMGWL747pYPwwrG6moIb9JfYiebeD/vmAG1tTubSZFkvEKYTzE
 zZRHWJVQaKEAvrP4Ra4/m3ZavvQ6lqrs8GiuwZNsiVvIL+CThIg7/uJDxrJt9X+9
 J0qoPP8UmSQYTbFOAfGerrTkRGjk+eb+CAtY3vIN99TMsCVsDCfUN0sOLLKNmHKD
 JAO7od8hgPMON4V/B3bKUKU1j66Ufw4v3G3T0QkjGfspMxOfUA7fbr7XXxQ6Dtxf
 608OgOG8T2Xww+k5XJMTBXJchM5/SH3gSQwmqoMe5oq6YYN2DNjzf+/M6+uSwQFi
 Yy7ONu6mm7OU6XrCvccYQgc33ZY6kUkELKqH3/zPqObx5xLl9zKjX4tFBcy1/CWe
 D7tk0+ofPRuistyMV6ECCaIAVj5pWv8hiW7FDfI4okbSM5ah5spONrcaM6lwddPF
 B1kVRcYCjZBmVhANsqtMmLxARX2qXgRnHJ6h5TH13C/hmEnoEls=
 =rg+8
 -----END PGP SIGNATURE-----

Merge tag 'coresight-next-v6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/coresight/linux into char-misc-next

Suzuki writes:
  "coresight: Changes for v6.1

   Coresight trace subsystem updates for v6.1 includes:
     - Support for HiSilicon PTT trace
     - Coresight cleanup of sysfs accessor functions, reduced
       code size.
     - Expose coresight timestamp source for ETMv4+
     - DT binding updates to include missing properties
     - Minor documentation, Kconfig text fixes.

   Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>"

* tag 'coresight-next-v6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/coresight/linux:
  hwtracing: hisi_ptt: Fix up for "iommu/dma: Make header private"
  MAINTAINERS: Add maintainer for HiSilicon PTT driver
  docs: trace: Add HiSilicon PTT device driver documentation
  hwtracing: hisi_ptt: Add tune function support for HiSilicon PCIe Tune and Trace device
  hwtracing: hisi_ptt: Add trace function support for HiSilicon PCIe Tune and Trace device
  iommu/arm-smmu-v3: Make default domain type of HiSilicon PTT device to identity
  coresight: cti-sysfs: Mark coresight_cti_reg_store() as __maybe_unused
  coresight: Make new csdev_access offsets unsigned
  coresight: cti-sysfs: Re-use same functions for similar sysfs register accessors
  coresight: Re-use same function for similar sysfs register accessors
  coresight: Simplify sysfs accessors by using csdev_access abstraction
  coresight: Remove unused function parameter
  coresight: etm4x: docs: Add documentation for 'ts_source' sysfs interface
  coresight: etm4x: Expose default timestamp source in sysfs
  dt-bindings: arm: coresight-tmc: Add 'iommu' property
  dt-bindings: arm: coresight: Add 'power-domains' property
  coresight: docs: Fix a broken reference
  coresight: trbe: fix Kconfig "its" grammar
This commit is contained in:
Greg Kroah-Hartman 2022-09-21 16:16:03 +02:00
commit 8be7dfc6a8
41 changed files with 1973 additions and 312 deletions

View file

@ -372,6 +372,29 @@ static inline u32 csdev_access_relaxed_read32(struct csdev_access *csa,
return csa->read(offset, true, false);
}
static inline u64 csdev_access_relaxed_read_pair(struct csdev_access *csa,
u32 lo_offset, u32 hi_offset)
{
if (likely(csa->io_mem)) {
return readl_relaxed(csa->base + lo_offset) |
((u64)readl_relaxed(csa->base + hi_offset) << 32);
}
return csa->read(lo_offset, true, false) | (csa->read(hi_offset, true, false) << 32);
}
static inline void csdev_access_relaxed_write_pair(struct csdev_access *csa, u64 val,
u32 lo_offset, u32 hi_offset)
{
if (likely(csa->io_mem)) {
writel_relaxed((u32)val, csa->base + lo_offset);
writel_relaxed((u32)(val >> 32), csa->base + hi_offset);
} else {
csa->write((u32)val, lo_offset, true, false);
csa->write((u32)(val >> 32), hi_offset, true, false);
}
}
static inline u32 csdev_access_read32(struct csdev_access *csa, u32 offset)
{
if (likely(csa->io_mem))