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drm/amd/display: Add DMUB support for DCN316

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Initialize DMUB for DCN316. Use same funcs as DCN31 for
DCN316.

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Prike Liang <Prike.Liang@amd.com>
Signed-off-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Leo Li 2022-01-27 14:29:31 -05:00 • committed by Alex Deucher
parent de7cc1b48f
commit 868f4357ed
6 changed files with 103 additions and 1 deletions
Download patch file Download diff file Expand all files Collapse all files

2
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
View file

@ -1920,7 +1920,7 @@ static int dm_dmub_sw_init(struct amdgpu_device *adev)
fw_name_dmub = FIRMWARE_YELLOW_CARP_DMUB;
break;
case IP_VERSION(3, 1, 6):
dmub_asic = DMUB_ASIC_DCN31B;
dmub_asic = DMUB_ASIC_DCN316;
fw_name_dmub = FIRMWARE_DCN316_DMUB;
break;

1
drivers/gpu/drm/amd/display/dmub/dmub_srv.h
View file

@ -98,6 +98,7 @@ enum dmub_asic {
DMUB_ASIC_DCN303,
DMUB_ASIC_DCN31,
DMUB_ASIC_DCN31B,
DMUB_ASIC_DCN316,
DMUB_ASIC_MAX,
};

2
drivers/gpu/drm/amd/display/dmub/src/Makefile
View file

@ -22,7 +22,9 @@
DMUB = dmub_srv.o dmub_srv_stat.o dmub_reg.o dmub_dcn20.o dmub_dcn21.o
DMUB += dmub_dcn30.o dmub_dcn301.o dmub_dcn302.o dmub_dcn303.o
DMUB += dmub_dcn31.o
DMUB += dmub_dcn316.o
AMD_DAL_DMUB = $(addprefix $(AMDDALPATH)/dmub/src/,$(DMUB))

62
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn316.c Normal file
View file

@ -0,0 +1,62 @@
/*
* Copyright 2021 Advanced Micro Devices, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: AMD
*
*/
#include "../dmub_srv.h"
#include "dmub_reg.h"
#include "dmub_dcn316.h"
#include "dcn/dcn_3_1_6_offset.h"
#include "dcn/dcn_3_1_6_sh_mask.h"
#define DCN_BASE__INST0_SEG0 0x00000012
#define DCN_BASE__INST0_SEG1 0x000000C0
#define DCN_BASE__INST0_SEG2 0x000034C0
#define DCN_BASE__INST0_SEG3 0x00009000
#define DCN_BASE__INST0_SEG4 0x02403C00
#define DCN_BASE__INST0_SEG5 0
#define BASE_INNER(seg) DCN_BASE__INST0_SEG##seg
#define CTX dmub
#define REGS dmub->regs_dcn31
#define REG_OFFSET_EXP(reg_name) (BASE(reg##reg_name##_BASE_IDX) + reg##reg_name)
/* Registers. */
const struct dmub_srv_dcn31_regs dmub_srv_dcn316_regs = {
#define DMUB_SR(reg) REG_OFFSET_EXP(reg),
{
DMUB_DCN31_REGS()
DMCUB_INTERNAL_REGS()
},
#undef DMUB_SR
#define DMUB_SF(reg, field) FD_MASK(reg, field),
{ DMUB_DCN31_FIELDS() },
#undef DMUB_SF
#define DMUB_SF(reg, field) FD_SHIFT(reg, field),
{ DMUB_DCN31_FIELDS() },
#undef DMUB_SF
};

33
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn316.h Normal file
View file

@ -0,0 +1,33 @@
/*
* Copyright 2021 Advanced Micro Devices, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: AMD
*
*/
#ifndef _DMUB_DCN316_H_
#define _DMUB_DCN316_H_
#include "dmub_dcn31.h"
extern const struct dmub_srv_dcn31_regs dmub_srv_dcn316_regs;
#endif /* _DMUB_DCN316_H_ */

4
drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c
View file

@ -32,6 +32,7 @@
#include "dmub_dcn302.h"
#include "dmub_dcn303.h"
#include "dmub_dcn31.h"
#include "dmub_dcn316.h"
#include "os_types.h"
/*
* Note: the DMUB service is standalone. No additional headers should be
@ -220,7 +221,10 @@ static bool dmub_srv_hw_setup(struct dmub_srv *dmub, enum dmub_asic asic)
case DMUB_ASIC_DCN31:
case DMUB_ASIC_DCN31B:
case DMUB_ASIC_DCN316:
dmub->regs_dcn31 = &dmub_srv_dcn31_regs;
if (asic == DMUB_ASIC_DCN316)
dmub->regs_dcn31 = &dmub_srv_dcn316_regs;
funcs->reset = dmub_dcn31_reset;
funcs->reset_release = dmub_dcn31_reset_release;
funcs->backdoor_load = dmub_dcn31_backdoor_load;