SPI NOR core changes:
- introduce 'struct spi_nor_controller_ops', - clean the Register Operations methods, - use dev_dbg insted of dev_err for low level info, - fix retlen handling in sst_write(), - fix silent truncations in spi_nor_read and spi_nor_read_raw(), - fix the clearing of QE bit on lock()/unlock(), - rework the disabling of the block write protection, - rework the Quad Enable methods, - make sure nor->spimem and nor->controller_ops are mutually exclusive, - set default Quad Enable method for ISSI flashes, - add support for few flashes. SPI NOR controller drivers changes: - intel-spi: - support chips without software sequencer, - add support for Intel Cannon Lake and Intel Comet Lake-H flashes. -----BEGIN PGP SIGNATURE----- iQEzBAABCAAdFiEEHUIqys8OyG1eHf7fS1VPR6WNFOkFAl3Kep8ACgkQS1VPR6WN FOn9kgf/aKPgU6LR84YpwUKRZ4S+6K1H8SdDUt8v0FYSQ6oaTjF13fApg43WDja5 Zk0l5tlX7WIvlcRC6XKPhryZTXOKWojW1X8sguPYIZGzo7q82Eyda23jkw1QptWr VO9L/tdK4yVUbdtp6VS/FUF31PC0DtDoCzsfBSUgrZP2srFF1BtOJNUgyuDceoxo y3hEmINDnkaOvDDl/kbJjdEHG4PV8Vi4k0KE8deLpqlp8GDG1nkTeA1Sim7WjBPA ZZOdg9fmGI8H8+umQEnn06H4O95T2+fX+kDMCYo4RbgWyWlGv5TidgRREmC/cSbl YEPu6LCQoUZPVEvgolr/8Akf968ZiQ== =i15M -----END PGP SIGNATURE----- Merge tag 'spi-nor/for-5.5' into mtd/next SPI NOR core changes: - introduce 'struct spi_nor_controller_ops', - clean the Register Operations methods, - use dev_dbg insted of dev_err for low level info, - fix retlen handling in sst_write(), - fix silent truncations in spi_nor_read and spi_nor_read_raw(), - fix the clearing of QE bit on lock()/unlock(), - rework the disabling of the block write protection, - rework the Quad Enable methods, - make sure nor->spimem and nor->controller_ops are mutually exclusive, - set default Quad Enable method for ISSI flashes, - add support for few flashes. SPI NOR controller drivers changes: - intel-spi: - support chips without software sequencer, - add support for Intel Cannon Lake and Intel Comet Lake-H flashes.
This commit is contained in:
Miquel Raynal
commit
8389a7b909
986 changed files with 10363 additions and 9080 deletions
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@ -85,4 +85,5 @@ examples:
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<&pd IMX_SC_R_DSP_RAM>;
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mbox-names = "txdb0", "txdb1", "rxdb0", "rxdb1";
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mboxes = <&lsio_mu13 2 0>, <&lsio_mu13 2 1>, <&lsio_mu13 3 0>, <&lsio_mu13 3 1>;
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memory-region = <&dsp_reserved>;
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};
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@ -43,13 +43,9 @@ properties:
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dvdd-supply:
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description: DVdd voltage supply
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items:
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- const: dvdd
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avdd-supply:
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description: AVdd voltage supply
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items:
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- const: avdd
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adi,rejection-60-Hz-enable:
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description: |
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@ -99,6 +95,9 @@ required:
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examples:
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- |
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spi0 {
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#address-cells = <1>;
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#size-cells = <0>;
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adc@0 {
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compatible = "adi,ad7192";
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reg = <0>;
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@ -1,8 +1,11 @@
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* Advanced Interrupt Controller (AIC)
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Required properties:
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- compatible: Should be "atmel,<chip>-aic"
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<chip> can be "at91rm9200", "sama5d2", "sama5d3" or "sama5d4"
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- compatible: Should be:
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- "atmel,<chip>-aic" where <chip> can be "at91rm9200", "sama5d2",
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"sama5d3" or "sama5d4"
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- "microchip,<chip>-aic" where <chip> can be "sam9x60"
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- interrupt-controller: Identifies the node as an interrupt controller.
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- #interrupt-cells: The number of cells to define the interrupts. It should be 3.
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The first cell is the IRQ number (aka "Peripheral IDentifier" on datasheet).
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@ -73,7 +73,6 @@ properties:
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- rc-genius-tvgo-a11mce
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- rc-gotview7135
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- rc-hauppauge
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- rc-hauppauge
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- rc-hisi-poplar
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- rc-hisi-tv-demo
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- rc-imon-mce
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@ -37,7 +37,7 @@ properties:
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- description: exclusive PHY reset line
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- description: shared reset line between the PCIe PHY and PCIe controller
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resets-names:
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reset-names:
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items:
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- const: phy
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- const: pcie
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@ -26,6 +26,8 @@ Required properties:
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- "renesas,hscif-r8a77470" for R8A77470 (RZ/G1C) HSCIF compatible UART.
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- "renesas,scif-r8a774a1" for R8A774A1 (RZ/G2M) SCIF compatible UART.
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- "renesas,hscif-r8a774a1" for R8A774A1 (RZ/G2M) HSCIF compatible UART.
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- "renesas,scif-r8a774b1" for R8A774B1 (RZ/G2N) SCIF compatible UART.
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- "renesas,hscif-r8a774b1" for R8A774B1 (RZ/G2N) HSCIF compatible UART.
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- "renesas,scif-r8a774c0" for R8A774C0 (RZ/G2E) SCIF compatible UART.
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- "renesas,hscif-r8a774c0" for R8A774C0 (RZ/G2E) HSCIF compatible UART.
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- "renesas,scif-r8a7778" for R8A7778 (R-Car M1) SCIF compatible UART.
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@ -85,8 +85,8 @@ A child node must exist to represent the core DWC2 IP block. The name of
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the node is not important. The content of the node is defined in dwc2.txt.
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PHY documentation is provided in the following places:
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- Documentation/devicetree/bindings/phy/meson-g12a-usb2-phy.txt
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- Documentation/devicetree/bindings/phy/meson-g12a-usb3-pcie-phy.txt
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- Documentation/devicetree/bindings/phy/amlogic,meson-g12a-usb2-phy.yaml
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- Documentation/devicetree/bindings/phy/amlogic,meson-g12a-usb3-pcie-phy.yaml
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Example device nodes:
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usb: usb@ffe09000 {
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@ -63,7 +63,11 @@ properties:
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description:
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Set this flag to force EHCI reset after resume.
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phys: true
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phys:
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description: PHY specifier for the USB PHY
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phy-names:
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const: usb
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required:
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- compatible
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interrupts = <39>;
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clocks = <&ahb_gates 1>;
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phys = <&usbphy 1>;
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phy-names = "usb";
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};
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...
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@ -67,7 +67,11 @@ properties:
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description:
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Overrides the detected port count
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phys: true
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phys:
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description: PHY specifier for the USB PHY
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phy-names:
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const: usb
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required:
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- compatible
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interrupts = <64>;
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clocks = <&usb_clk 6>, <&ahb_gates 2>;
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phys = <&usbphy 1>;
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phy-names = "usb";
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};
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...
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@ -33,7 +33,7 @@ Required properties:
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"dma_ck": dma_bus clock for data transfer by DMA,
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"xhci_ck": controller clock
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- phys : see usb-hcd.txt in the current directory
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- phys : see usb-hcd.yaml in the current directory
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Optional properties:
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- wakeup-source : enable USB remote wakeup;
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See: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
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- imod-interval-ns: default interrupt moderation interval is 5000ns
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additionally the properties from usb-hcd.txt (in the current directory) are
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additionally the properties from usb-hcd.yaml (in the current directory) are
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supported.
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Example:
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- clock-names : must contain "sys_ck" for clock of controller,
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the following clocks are optional:
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"ref_ck", "mcu_ck" and "dma_ck";
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- phys : see usb-hcd.txt in the current directory
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- phys : see usb-hcd.yaml in the current directory
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- dr_mode : should be one of "host", "peripheral" or "otg",
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refer to usb/generic.txt
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@ -60,7 +60,7 @@ Optional properties:
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- mediatek,u3p-dis-msk : mask to disable u3ports, bit0 for u3port0,
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bit1 for u3port1, ... etc;
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additionally the properties from usb-hcd.txt (in the current directory) are
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additionally the properties from usb-hcd.yaml (in the current directory) are
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supported.
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Sub-nodes:
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@ -18,8 +18,13 @@ properties:
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description:
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List of all the USB PHYs on this HCD
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phy-names:
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description:
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Name specifier for the USB PHY
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examples:
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- |
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usb {
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phys = <&usb2_phy1>, <&usb3_phy1>;
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phy-names = "usb";
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};
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@ -6,7 +6,7 @@ Required properties:
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- reg : Should contain 1 register ranges(address and length)
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- interrupts : UHCI controller interrupt
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additionally the properties from usb-hcd.txt (in the current directory) are
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additionally the properties from usb-hcd.yaml (in the current directory) are
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supported.
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Example:
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@ -41,9 +41,9 @@ Optional properties:
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- usb3-lpm-capable: determines if platform is USB3 LPM capable
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- quirk-broken-port-ped: set if the controller has broken port disable mechanism
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- imod-interval-ns: default interrupt moderation interval is 5000ns
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- phys : see usb-hcd.txt in the current directory
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- phys : see usb-hcd.yaml in the current directory
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additionally the properties from usb-hcd.txt (in the current directory) are
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additionally the properties from usb-hcd.yaml (in the current directory) are
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supported.
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