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Merge branch 'master' of /home/trondmy/kernel/linux-2.6/

Browse source 
Conflicts:

	fs/nfs/inode.c
	fs/super.c

Fix conflicts between patch 'NFS: Split fs/nfs/inode.c' and patch
'VFS: Permit filesystem to override root dentry on mount'
This commit is contained in:
Trond Myklebust 2006-06-24 08:41:41 -04:00
commit 816724e65c
1993 changed files with 83871 additions and 82966 deletions
Download patch file Download diff file Expand all files Collapse all files

18
include/acpi/acconfig.h
View file

@ -63,7 +63,7 @@
/* Current ACPICA subsystem version in YYYYMMDD format */
#define ACPI_CA_VERSION 0x20060127
#define ACPI_CA_VERSION 0x20060608
/*
* OS name, used for the _OS object. The _OS object is essentially obsolete,
@ -81,6 +81,7 @@
#define ACPI_MAX_PARSE_CACHE_DEPTH 96 /* Parse tree objects */
#define ACPI_MAX_EXTPARSE_CACHE_DEPTH 96 /* Parse tree objects */
#define ACPI_MAX_OBJECT_CACHE_DEPTH 96 /* Interpreter operand objects */
#define ACPI_MAX_NAMESPACE_CACHE_DEPTH 96 /* Namespace objects */
/*
* Should the subsystem abort the loading of an ACPI table if the
@ -102,9 +103,9 @@
#define ACPI_MAX_SEMAPHORE_COUNT 256
/* Max reference count (for debug only) */
/* Maximum object reference count (detects object deletion issues) */
#define ACPI_MAX_REFERENCE_COUNT 0x400
#define ACPI_MAX_REFERENCE_COUNT 0x800
/* Size of cached memory mapping for system memory operation region */
@ -171,12 +172,7 @@
/* Array sizes. Used for range checking also */
#define ACPI_NUM_ACCESS_TYPES 6
#define ACPI_NUM_UPDATE_RULES 3
#define ACPI_NUM_LOCK_RULES 2
#define ACPI_NUM_MATCH_OPS 6
#define ACPI_NUM_OPCODES 256
#define ACPI_NUM_FIELD_NAMES 2
#define ACPI_MAX_MATCH_OPCODE 5
/* RSDP checksums */
@ -187,10 +183,6 @@
#define ACPI_SMBUS_BUFFER_SIZE 34
/* Number of strings associated with the _OSI reserved method */
#define ACPI_NUM_OSI_STRINGS 10
/******************************************************************************
*
* ACPI AML Debugger

173
include/acpi/acdisasm.h
View file

@ -50,26 +50,72 @@
#define BLOCK_PAREN 1
#define BLOCK_BRACE 2
#define BLOCK_COMMA_LIST 4
#define ACPI_DEFAULT_RESNAME *(u32 *) "__RD"
struct acpi_external_list {
char *path;
char *internal_path;
struct acpi_external_list *next;
u32 value;
u16 length;
u8 type;
};
extern struct acpi_external_list *acpi_gbl_external_list;
/* Strings used for decoding flags to ASL keywords */
typedef const struct acpi_dmtable_info {
u8 opcode;
u8 offset;
char *name;
extern const char *acpi_gbl_word_decode[4];
extern const char *acpi_gbl_irq_decode[2];
extern const char *acpi_gbl_lock_rule[ACPI_NUM_LOCK_RULES];
extern const char *acpi_gbl_access_types[ACPI_NUM_ACCESS_TYPES];
extern const char *acpi_gbl_update_rules[ACPI_NUM_UPDATE_RULES];
extern const char *acpi_gbl_match_ops[ACPI_NUM_MATCH_OPS];
} acpi_dmtable_info;
/*
* Values for Opcode above.
* Note: 0-7 must not change, used as a flag shift value
*/
#define ACPI_DMT_FLAG0 0
#define ACPI_DMT_FLAG1 1
#define ACPI_DMT_FLAG2 2
#define ACPI_DMT_FLAG3 3
#define ACPI_DMT_FLAG4 4
#define ACPI_DMT_FLAG5 5
#define ACPI_DMT_FLAG6 6
#define ACPI_DMT_FLAG7 7
#define ACPI_DMT_FLAGS0 8
#define ACPI_DMT_FLAGS2 9
#define ACPI_DMT_UINT8 10
#define ACPI_DMT_UINT16 11
#define ACPI_DMT_UINT24 12
#define ACPI_DMT_UINT32 13
#define ACPI_DMT_UINT56 14
#define ACPI_DMT_UINT64 15
#define ACPI_DMT_STRING 16
#define ACPI_DMT_NAME4 17
#define ACPI_DMT_NAME6 18
#define ACPI_DMT_NAME8 19
#define ACPI_DMT_CHKSUM 20
#define ACPI_DMT_SPACEID 21
#define ACPI_DMT_GAS 22
#define ACPI_DMT_MADT 23
#define ACPI_DMT_SRAT 24
#define ACPI_DMT_EXIT 25
typedef
void (*ACPI_TABLE_HANDLER) (struct acpi_table_header * table);
struct acpi_dmtable_data {
char *signature;
struct acpi_dmtable_info *table_info;
ACPI_TABLE_HANDLER table_handler;
};
struct acpi_op_walk_info {
u32 level;
u32 last_level;
u32 count;
u32 bit_offset;
u32 flags;
struct acpi_walk_state *walk_state;
};
@ -77,6 +123,100 @@ typedef
acpi_status(*asl_walk_callback) (union acpi_parse_object * op,
u32 level, void *context);
struct acpi_resource_tag {
u32 bit_index;
char *tag;
};
/* Strings used for decoding flags to ASL keywords */
extern const char *acpi_gbl_word_decode[];
extern const char *acpi_gbl_irq_decode[];
extern const char *acpi_gbl_lock_rule[];
extern const char *acpi_gbl_access_types[];
extern const char *acpi_gbl_update_rules[];
extern const char *acpi_gbl_match_ops[];
extern struct acpi_dmtable_info acpi_dm_table_info_asf0[];
extern struct acpi_dmtable_info acpi_dm_table_info_asf1[];
extern struct acpi_dmtable_info acpi_dm_table_info_asf2[];
extern struct acpi_dmtable_info acpi_dm_table_info_asf3[];
extern struct acpi_dmtable_info acpi_dm_table_info_asf4[];
extern struct acpi_dmtable_info acpi_dm_table_info_asf_hdr[];
extern struct acpi_dmtable_info acpi_dm_table_info_boot[];
extern struct acpi_dmtable_info acpi_dm_table_info_cpep[];
extern struct acpi_dmtable_info acpi_dm_table_info_cpep0[];
extern struct acpi_dmtable_info acpi_dm_table_info_dbgp[];
extern struct acpi_dmtable_info acpi_dm_table_info_ecdt[];
extern struct acpi_dmtable_info acpi_dm_table_info_facs[];
extern struct acpi_dmtable_info acpi_dm_table_info_fadt1[];
extern struct acpi_dmtable_info acpi_dm_table_info_fadt2[];
extern struct acpi_dmtable_info acpi_dm_table_info_gas[];
extern struct acpi_dmtable_info acpi_dm_table_info_header[];
extern struct acpi_dmtable_info acpi_dm_table_info_hpet[];
extern struct acpi_dmtable_info acpi_dm_table_info_madt[];
extern struct acpi_dmtable_info acpi_dm_table_info_madt0[];
extern struct acpi_dmtable_info acpi_dm_table_info_madt1[];
extern struct acpi_dmtable_info acpi_dm_table_info_madt2[];
extern struct acpi_dmtable_info acpi_dm_table_info_madt3[];
extern struct acpi_dmtable_info acpi_dm_table_info_madt4[];
extern struct acpi_dmtable_info acpi_dm_table_info_madt5[];
extern struct acpi_dmtable_info acpi_dm_table_info_madt6[];
extern struct acpi_dmtable_info acpi_dm_table_info_madt7[];
extern struct acpi_dmtable_info acpi_dm_table_info_madt8[];
extern struct acpi_dmtable_info acpi_dm_table_info_madt_hdr[];
extern struct acpi_dmtable_info acpi_dm_table_info_mcfg[];
extern struct acpi_dmtable_info acpi_dm_table_info_mcfg0[];
extern struct acpi_dmtable_info acpi_dm_table_info_rsdp1[];
extern struct acpi_dmtable_info acpi_dm_table_info_rsdp2[];
extern struct acpi_dmtable_info acpi_dm_table_info_sbst[];
extern struct acpi_dmtable_info acpi_dm_table_info_slit[];
extern struct acpi_dmtable_info acpi_dm_table_info_spcr[];
extern struct acpi_dmtable_info acpi_dm_table_info_spmi[];
extern struct acpi_dmtable_info acpi_dm_table_info_srat[];
extern struct acpi_dmtable_info acpi_dm_table_info_srat0[];
extern struct acpi_dmtable_info acpi_dm_table_info_srat1[];
extern struct acpi_dmtable_info acpi_dm_table_info_tcpa[];
extern struct acpi_dmtable_info acpi_dm_table_info_wdrt[];
/*
* dmtable
*/
void acpi_dm_dump_data_table(struct acpi_table_header *table);
void
acpi_dm_dump_table(u32 table_length,
u32 table_offset,
void *table,
u32 sub_table_length, struct acpi_dmtable_info *info);
void acpi_dm_line_header(u32 offset, u32 byte_length, char *name);
void acpi_dm_line_header2(u32 offset, u32 byte_length, char *name, u32 value);
/*
* dmtbdump
*/
void acpi_dm_dump_asf(struct acpi_table_header *table);
void acpi_dm_dump_cpep(struct acpi_table_header *table);
void acpi_dm_dump_fadt(struct acpi_table_header *table);
void acpi_dm_dump_srat(struct acpi_table_header *table);
void acpi_dm_dump_mcfg(struct acpi_table_header *table);
void acpi_dm_dump_madt(struct acpi_table_header *table);
u32 acpi_dm_dump_rsdp(struct acpi_table_header *table);
void acpi_dm_dump_rsdt(struct acpi_table_header *table);
void acpi_dm_dump_slit(struct acpi_table_header *table);
void acpi_dm_dump_xsdt(struct acpi_table_header *table);
/*
* dmwalk
*/
@ -84,6 +224,11 @@ void
acpi_dm_disassemble(struct acpi_walk_state *walk_state,
union acpi_parse_object *origin, u32 num_opcodes);
void
acpi_dm_walk_parse_tree(union acpi_parse_object *op,
asl_walk_callback descending_callback,
asl_walk_callback ascending_callback, void *context);
/*
* dmopcode
*/
@ -166,6 +311,7 @@ void acpi_dm_dump_integer64(u64 value, char *name);
void
acpi_dm_resource_template(struct acpi_op_walk_info *info,
union acpi_parse_object *op,
u8 * byte_data, u32 byte_count);
u8 acpi_dm_is_resource_template(union acpi_parse_object *op);
@ -176,6 +322,8 @@ void acpi_dm_bit_list(u16 mask);
void acpi_dm_decode_attribute(u8 attribute);
void acpi_dm_descriptor_name(void);
/*
* dmresrcl
*/
@ -248,6 +396,15 @@ acpi_dm_vendor_small_descriptor(union aml_resource *resource,
/*
* dmutils
*/
void acpi_dm_add_to_external_list(char *path);
void acpi_dm_add_to_external_list(char *path, u8 type, u32 value);
/*
* dmrestag
*/
void acpi_dm_find_resources(union acpi_parse_object *root);
void
acpi_dm_check_resource_reference(union acpi_parse_object *op,
struct acpi_walk_state *walk_state);
#endif /* __ACDISASM_H__ */

6
include/acpi/acdispat.h
View file

@ -194,7 +194,9 @@ acpi_status
acpi_ds_restart_control_method(struct acpi_walk_state *walk_state,
union acpi_operand_object *return_desc);
void acpi_ds_terminate_control_method(struct acpi_walk_state *walk_state);
void
acpi_ds_terminate_control_method(union acpi_operand_object *method_desc,
struct acpi_walk_state *walk_state);
acpi_status
acpi_ds_begin_method_execution(struct acpi_namespace_node *method_node,
@ -302,7 +304,7 @@ acpi_ds_init_aml_walk(struct acpi_walk_state *walk_state,
struct acpi_namespace_node *method_node,
u8 * aml_start,
u32 aml_length,
struct acpi_parameter_info *info, u8 pass_number);
struct acpi_evaluate_info *info, u8 pass_number);
acpi_status
acpi_ds_obj_stack_pop_and_delete(u32 pop_count,

4
include/acpi/acevents.h
View file

@ -93,7 +93,7 @@ struct acpi_gpe_event_info *acpi_ev_get_gpe_event_info(acpi_handle gpe_device,
*/
u8 acpi_ev_valid_gpe_event(struct acpi_gpe_event_info *gpe_event_info);
acpi_status acpi_ev_walk_gpe_list(ACPI_GPE_CALLBACK gpe_walk_callback);
acpi_status acpi_ev_walk_gpe_list(acpi_gpe_callback gpe_walk_callback);
acpi_status
acpi_ev_delete_gpe_handlers(struct acpi_gpe_xrupt_info *gpe_xrupt_info,
@ -138,7 +138,7 @@ acpi_status
acpi_ev_address_space_dispatch(union acpi_operand_object *region_obj,
u32 function,
acpi_physical_address address,
u32 bit_width, void *value);
u32 bit_width, acpi_integer * value);
acpi_status
acpi_ev_attach_region(union acpi_operand_object *handler_obj,

6
include/acpi/acexcep.h
View file

@ -160,8 +160,9 @@
#define AE_AML_BAD_RESOURCE_VALUE (acpi_status) (0x001F | AE_CODE_AML)
#define AE_AML_CIRCULAR_REFERENCE (acpi_status) (0x0020 | AE_CODE_AML)
#define AE_AML_BAD_RESOURCE_LENGTH (acpi_status) (0x0021 | AE_CODE_AML)
#define AE_AML_ILLEGAL_ADDRESS (acpi_status) (0x0022 | AE_CODE_AML)
#define AE_CODE_AML_MAX 0x0021
#define AE_CODE_AML_MAX 0x0022
/*
* Internal exceptions used for control
@ -275,7 +276,8 @@ char const *acpi_gbl_exception_names_aml[] = {
"AE_AML_NO_RESOURCE_END_TAG",
"AE_AML_BAD_RESOURCE_VALUE",
"AE_AML_CIRCULAR_REFERENCE",
"AE_AML_BAD_RESOURCE_LENGTH"
"AE_AML_BAD_RESOURCE_LENGTH",
"AE_AML_ILLEGAL_ADDRESS"
};
char const *acpi_gbl_exception_names_ctrl[] = {

29
include/acpi/acglobal.h
View file

@ -107,6 +107,7 @@ ACPI_EXTERN u32 acpi_gbl_trace_flags;
* 3) Allow access to uninitialized locals/args (auto-init to integer 0)
* 4) Allow ANY object type to be a source operand for the Store() operator
* 5) Allow unresolved references (invalid target name) in package objects
* 6) Enable warning messages for behavior that is not ACPI spec compliant
*/
ACPI_EXTERN u8 ACPI_INIT_GLOBAL(acpi_gbl_enable_interpreter_slack, FALSE);
@ -114,7 +115,7 @@ ACPI_EXTERN u8 ACPI_INIT_GLOBAL(acpi_gbl_enable_interpreter_slack, FALSE);
* Automatically serialize ALL control methods? Default is FALSE, meaning
* to use the Serialized/not_serialized method flags on a per method basis.
* Only change this if the ASL code is poorly written and cannot handle
* reentrancy even though methods are marked "not_serialized".
* reentrancy even though methods are marked "NotSerialized".
*/
ACPI_EXTERN u8 ACPI_INIT_GLOBAL(acpi_gbl_all_methods_serialized, FALSE);
@ -149,10 +150,10 @@ ACPI_EXTERN u8 ACPI_INIT_GLOBAL(acpi_gbl_leave_wake_gpes_disabled, TRUE);
ACPI_EXTERN u32 acpi_gbl_table_flags;
ACPI_EXTERN u32 acpi_gbl_rsdt_table_count;
ACPI_EXTERN struct rsdp_descriptor *acpi_gbl_RSDP;
ACPI_EXTERN XSDT_DESCRIPTOR *acpi_gbl_XSDT;
ACPI_EXTERN FADT_DESCRIPTOR *acpi_gbl_FADT;
ACPI_EXTERN struct xsdt_descriptor *acpi_gbl_XSDT;
ACPI_EXTERN struct fadt_descriptor *acpi_gbl_FADT;
ACPI_EXTERN struct acpi_table_header *acpi_gbl_DSDT;
ACPI_EXTERN FACS_DESCRIPTOR *acpi_gbl_FACS;
ACPI_EXTERN struct facs_descriptor *acpi_gbl_FACS;
ACPI_EXTERN struct acpi_common_facs acpi_gbl_common_fACS;
/*
* Since there may be multiple SSDTs and PSDTs, a single pointer is not
@ -177,15 +178,15 @@ ACPI_EXTERN u8 acpi_gbl_integer_nybble_width;
/*
* ACPI Table info arrays
*/
extern struct acpi_table_list acpi_gbl_table_lists[NUM_ACPI_TABLE_TYPES];
extern struct acpi_table_support acpi_gbl_table_data[NUM_ACPI_TABLE_TYPES];
extern struct acpi_table_list acpi_gbl_table_lists[ACPI_TABLE_ID_MAX + 1];
extern struct acpi_table_support acpi_gbl_table_data[ACPI_TABLE_ID_MAX + 1];
/*
* Predefined mutex objects. This array contains the
* actual OS mutex handles, indexed by the local ACPI_MUTEX_HANDLEs.
* (The table maps local handles to the real OS handles)
*/
ACPI_EXTERN struct acpi_mutex_info acpi_gbl_mutex_info[NUM_MUTEX];
ACPI_EXTERN struct acpi_mutex_info acpi_gbl_mutex_info[ACPI_NUM_MUTEX];
/*****************************************************************************
*
@ -203,6 +204,7 @@ ACPI_EXTERN struct acpi_memory_list *acpi_gbl_ns_node_list;
/* Object caches */
ACPI_EXTERN acpi_cache_t *acpi_gbl_namespace_cache;
ACPI_EXTERN acpi_cache_t *acpi_gbl_state_cache;
ACPI_EXTERN acpi_cache_t *acpi_gbl_ps_node_cache;
ACPI_EXTERN acpi_cache_t *acpi_gbl_ps_node_ext_cache;
@ -244,7 +246,6 @@ extern const char *acpi_gbl_sleep_state_names[ACPI_S_STATE_COUNT];
extern const char *acpi_gbl_highest_dstate_names[4];
extern const struct acpi_opcode_info acpi_gbl_aml_op_info[AML_NUM_OPCODES];
extern const char *acpi_gbl_region_types[ACPI_NUM_PREDEFINED_REGIONS];
extern const char *acpi_gbl_valid_osi_strings[ACPI_NUM_OSI_STRINGS];
/*****************************************************************************
*
@ -289,14 +290,6 @@ ACPI_EXTERN struct acpi_thread_state *acpi_gbl_current_walk_list;
ACPI_EXTERN u8 acpi_gbl_cm_single_step;
/*****************************************************************************
*
* Parser globals
*
****************************************************************************/
ACPI_EXTERN union acpi_parse_object *acpi_gbl_parsed_namespace_root;
/*****************************************************************************
*
* Hardware globals
@ -321,7 +314,11 @@ ACPI_EXTERN struct acpi_fixed_event_handler
ACPI_EXTERN struct acpi_gpe_xrupt_info *acpi_gbl_gpe_xrupt_list_head;
ACPI_EXTERN struct acpi_gpe_block_info
*acpi_gbl_gpe_fadt_blocks[ACPI_MAX_GPE_BLOCKS];
/* Spinlocks */
ACPI_EXTERN acpi_handle acpi_gbl_gpe_lock;
ACPI_EXTERN acpi_handle acpi_gbl_hardware_lock;
/*****************************************************************************
*

280
include/acpi/aclocal.h
View file

@ -44,7 +44,10 @@
#ifndef __ACLOCAL_H__
#define __ACLOCAL_H__
/* acpisrc:struct_defs -- for acpisrc conversion */
#define ACPI_WAIT_FOREVER 0xFFFF /* u16, as per ACPI spec */
#define ACPI_INFINITE_CONCURRENCY 0xFF
typedef void *acpi_mutex;
typedef u32 acpi_mutex_handle;
@ -69,52 +72,55 @@ union acpi_parse_object;
* Predefined handles for the mutex objects used within the subsystem
* All mutex objects are automatically created by acpi_ut_mutex_initialize.
*
* The acquire/release ordering protocol is implied via this list. Mutexes
* The acquire/release ordering protocol is implied via this list. Mutexes
* with a lower value must be acquired before mutexes with a higher value.
*
* NOTE: any changes here must be reflected in the acpi_gbl_mutex_names table also!
* NOTE: any changes here must be reflected in the acpi_gbl_mutex_names
* table below also!
*/
#define ACPI_MTX_EXECUTE 0
#define ACPI_MTX_INTERPRETER 1
#define ACPI_MTX_PARSER 2
#define ACPI_MTX_DISPATCHER 3
#define ACPI_MTX_TABLES 4
#define ACPI_MTX_OP_REGIONS 5
#define ACPI_MTX_NAMESPACE 6
#define ACPI_MTX_EVENTS 7
#define ACPI_MTX_HARDWARE 8
#define ACPI_MTX_CACHES 9
#define ACPI_MTX_MEMORY 10
#define ACPI_MTX_DEBUG_CMD_COMPLETE 11
#define ACPI_MTX_DEBUG_CMD_READY 12
#define ACPI_MTX_INTERPRETER 0 /* AML Interpreter, main lock */
#define ACPI_MTX_CONTROL_METHOD 1 /* Control method termination [TBD: may no longer be necessary] */
#define ACPI_MTX_TABLES 2 /* Data for ACPI tables */
#define ACPI_MTX_NAMESPACE 3 /* ACPI Namespace */
#define ACPI_MTX_EVENTS 4 /* Data for ACPI events */
#define ACPI_MTX_CACHES 5 /* Internal caches, general purposes */
#define ACPI_MTX_MEMORY 6 /* Debug memory tracking lists */
#define ACPI_MTX_DEBUG_CMD_COMPLETE 7 /* AML debugger */
#define ACPI_MTX_DEBUG_CMD_READY 8 /* AML debugger */
#define MAX_MUTEX 12
#define NUM_MUTEX MAX_MUTEX+1
#define ACPI_MAX_MUTEX 8
#define ACPI_NUM_MUTEX ACPI_MAX_MUTEX+1
#if defined(ACPI_DEBUG_OUTPUT) || defined(ACPI_DEBUGGER)
#ifdef DEFINE_ACPI_GLOBALS
/* Names for the mutexes used in the subsystem */
/* Debug names for the mutexes above */
static char *acpi_gbl_mutex_names[] = {
"ACPI_MTX_Execute",
static char *acpi_gbl_mutex_names[ACPI_NUM_MUTEX] = {
"ACPI_MTX_Interpreter",
"ACPI_MTX_Parser",
"ACPI_MTX_Dispatcher",
"ACPI_MTX_Method",
"ACPI_MTX_Tables",
"ACPI_MTX_op_regions",
"ACPI_MTX_Namespace",
"ACPI_MTX_Events",
"ACPI_MTX_Hardware",
"ACPI_MTX_Caches",
"ACPI_MTX_Memory",
"ACPI_MTX_debug_cmd_complete",
"ACPI_MTX_debug_cmd_ready",
"ACPI_MTX_DebugCmdComplete",
"ACPI_MTX_DebugCmdReady"
};
#endif
#endif
/*
* Predefined handles for spinlocks used within the subsystem.
* These spinlocks are created by acpi_ut_mutex_initialize
*/
#define ACPI_LOCK_GPES 0
#define ACPI_LOCK_HARDWARE 1
#define ACPI_MAX_LOCK 1
#define ACPI_NUM_LOCK ACPI_MAX_LOCK+1
/* Owner IDs are used to track namespace nodes for selective deletion */
typedef u8 acpi_owner_id;
@ -129,7 +135,7 @@ typedef u8 acpi_owner_id;
struct acpi_mutex_info {
acpi_mutex mutex;
u32 use_count;
u32 thread_id;
acpi_thread_id thread_id;
};
/* Lock flag parameter for various interfaces */
@ -144,6 +150,8 @@ struct acpi_mutex_info {
#define ACPI_FIELD_DWORD_GRANULARITY 4
#define ACPI_FIELD_QWORD_GRANULARITY 8
#define ACPI_ENTRY_NOT_FOUND NULL
/*****************************************************************************
*
* Namespace typedefs and structs
@ -158,49 +166,55 @@ typedef enum {
ACPI_IMODE_EXECUTE = 0x0E
} acpi_interpreter_mode;
/*
* The Node describes a named object that appears in the AML
* An acpi_node is used to store Nodes.
*
* data_type is used to differentiate between internal descriptors, and MUST
* be the first byte in this structure.
*/
union acpi_name_union {
u32 integer;
char ascii[4];
};
/*
* The Namespace Node describes a named object that appears in the AML.
* descriptor_type is used to differentiate between internal descriptors.
*
* The node is optimized for both 32-bit and 64-bit platforms:
* 20 bytes for the 32-bit case, 32 bytes for the 64-bit case.
*
* Note: The descriptor_type and Type fields must appear in the identical
* position in both the struct acpi_namespace_node and union acpi_operand_object
* structures.
*/
struct acpi_namespace_node {
u8 descriptor; /* Used to differentiate object descriptor types */
u8 type; /* Type associated with this name */
u16 reference_count; /* Current count of references and children */
union acpi_operand_object *object; /* Interpreter object */
u8 descriptor_type; /* Differentiate object descriptor types */
u8 type; /* ACPI Type associated with this name */
u8 flags; /* Miscellaneous flags */
acpi_owner_id owner_id; /* Node creator */
union acpi_name_union name; /* ACPI Name, always 4 chars per ACPI spec */
union acpi_operand_object *object; /* Pointer to attached ACPI object (optional) */
struct acpi_namespace_node *child; /* First child */
struct acpi_namespace_node *peer; /* Next peer */
u8 owner_id; /* Who created this node */
u8 flags;
struct acpi_namespace_node *peer; /* Peer. Parent if ANOBJ_END_OF_PEER_LIST set */
/* Fields used by the ASL compiler only */
#ifdef ACPI_ASL_COMPILER
u32 value;
/*
* The following fields are used by the ASL compiler and disassembler only
*/
#ifdef ACPI_LARGE_NAMESPACE_NODE
union acpi_parse_object *op;
u32 value;
u32 length;
#endif
};
#define ACPI_ENTRY_NOT_FOUND NULL
/* Namespace Node flags */
/* Node flags */
#define ANOBJ_END_OF_PEER_LIST 0x01 /* End-of-list, Peer field points to parent */
#define ANOBJ_DATA_WIDTH_32 0x02 /* Parent table uses 32-bit math */
#define ANOBJ_METHOD_ARG 0x04 /* Node is a method argument */
#define ANOBJ_METHOD_LOCAL 0x08 /* Node is a method local */
#define ANOBJ_SUBTREE_HAS_INI 0x10 /* Used to optimize device initialization */
#define ANOBJ_RESERVED 0x01
#define ANOBJ_END_OF_PEER_LIST 0x02
#define ANOBJ_DATA_WIDTH_32 0x04 /* Parent table is 64-bits */
#define ANOBJ_METHOD_ARG 0x08
#define ANOBJ_METHOD_LOCAL 0x10
#define ANOBJ_METHOD_NO_RETVAL 0x20
#define ANOBJ_METHOD_SOME_NO_RETVAL 0x40
#define ANOBJ_IS_BIT_OFFSET 0x80
#define ANOBJ_IS_EXTERNAL 0x08 /* i_aSL only: This object created via External() */
#define ANOBJ_METHOD_NO_RETVAL 0x10 /* i_aSL only: Method has no return value */
#define ANOBJ_METHOD_SOME_NO_RETVAL 0x20 /* i_aSL only: Method has at least one return value */
#define ANOBJ_IS_BIT_OFFSET 0x40 /* i_aSL only: Reference is a bit offset */
#define ANOBJ_IS_REFERENCED 0x80 /* i_aSL only: Object was referenced */
/*
* ACPI Table Descriptor. One per ACPI table
@ -212,8 +226,8 @@ struct acpi_table_desc {
struct acpi_table_header *pointer;
u8 *aml_start;
u64 physical_address;
u32 aml_length;
acpi_size length;
u32 aml_length;
acpi_owner_id owner_id;
u8 type;
u8 allocation;
@ -276,6 +290,9 @@ struct acpi_create_field_info {
u8 field_type;
};
typedef
acpi_status(*ACPI_INTERNAL_METHOD) (struct acpi_walk_state * walk_state);
/*
* Bitmapped ACPI types. Used internally only
*/
@ -377,7 +394,7 @@ struct acpi_gpe_walk_info {
struct acpi_gpe_block_info *gpe_block;
};
typedef acpi_status(*ACPI_GPE_CALLBACK) (struct acpi_gpe_xrupt_info *
typedef acpi_status(*acpi_gpe_callback) (struct acpi_gpe_xrupt_info *
gpe_xrupt_info,
struct acpi_gpe_block_info *
gpe_block);
@ -416,13 +433,14 @@ struct acpi_field_info {
#define ACPI_CONTROL_PREDICATE_FALSE 0xC3
#define ACPI_CONTROL_PREDICATE_TRUE 0xC4
#define ACPI_STATE_COMMON /* Two 32-bit fields and a pointer */\
u8 data_type; /* To differentiate various internal objs */\
u8 flags; \
u16 value; \
u16 state; \
u16 reserved; \
void *next;
#define ACPI_STATE_COMMON \
void *next; \
u8 descriptor_type; /* To differentiate various internal objs */\
u8 flags; \
u16 value; \
u16 state;
/* There are 2 bytes available here until the next natural alignment boundary */
struct acpi_common_state {
ACPI_STATE_COMMON};
@ -438,12 +456,12 @@ struct acpi_update_state {
* Pkg state - used to traverse nested package structures
*/
struct acpi_pkg_state {
ACPI_STATE_COMMON union acpi_operand_object *source_object;
ACPI_STATE_COMMON u16 index;
union acpi_operand_object *source_object;
union acpi_operand_object *dest_object;
struct acpi_walk_state *walk_state;
void *this_target_obj;
u32 num_packages;
u16 index;
};
/*
@ -451,10 +469,10 @@ struct acpi_pkg_state {
* Allows nesting of these constructs
*/
struct acpi_control_state {
ACPI_STATE_COMMON union acpi_parse_object *predicate_op;
ACPI_STATE_COMMON u16 opcode;
union acpi_parse_object *predicate_op;
u8 *aml_predicate_start; /* Start of if/while predicate */
u8 *package_end; /* End of if/while block */
u16 opcode;
};
/*
@ -465,11 +483,11 @@ struct acpi_scope_state {
};
struct acpi_pscope_state {
ACPI_STATE_COMMON union acpi_parse_object *op; /* Current op being parsed */
ACPI_STATE_COMMON u32 arg_count; /* Number of fixed arguments */
union acpi_parse_object *op; /* Current op being parsed */
u8 *arg_end; /* Current argument end */
u8 *pkg_end; /* Current package end */
u32 arg_list; /* Next argument to parse */
u32 arg_count; /* Number of fixed arguments */
};
/*
@ -477,10 +495,10 @@ struct acpi_pscope_state {
* states are created when there are nested control methods executing.
*/
struct acpi_thread_state {
ACPI_STATE_COMMON struct acpi_walk_state *walk_state_list; /* Head of list of walk_states for this thread */
ACPI_STATE_COMMON u8 current_sync_level; /* Mutex Sync (nested acquire) level */
struct acpi_walk_state *walk_state_list; /* Head of list of walk_states for this thread */
union acpi_operand_object *acquired_mutex_list; /* List of all currently acquired mutexes */
u32 thread_id; /* Running thread ID */
u8 current_sync_level; /* Mutex Sync (nested acquire) level */
acpi_thread_id thread_id; /* Running thread ID */
};
/*
@ -488,10 +506,9 @@ struct acpi_thread_state {
* AML arguments
*/
struct acpi_result_values {
ACPI_STATE_COMMON
union acpi_operand_object *obj_desc[ACPI_OBJ_NUM_OPERANDS];
u8 num_results;
ACPI_STATE_COMMON u8 num_results;
u8 last_insert;
union acpi_operand_object *obj_desc[ACPI_OBJ_NUM_OPERANDS];
};
typedef
@ -546,7 +563,7 @@ struct acpi_opcode_info {
#endif
u32 parse_args; /* Grammar/Parse time arguments */
u32 runtime_args; /* Interpret time arguments */
u32 flags; /* Misc flags */
u16 flags; /* Misc flags */
u8 object_type; /* Corresponding internal object type */
u8 class; /* Opcode class */
u8 type; /* Opcode type */
@ -563,29 +580,31 @@ union acpi_parse_value {
};
#define ACPI_PARSE_COMMON \
u8 data_type; /* To differentiate various internal objs */\
u8 flags; /* Type of Op */\
u16 aml_opcode; /* AML opcode */\
u32 aml_offset; /* Offset of declaration in AML */\
union acpi_parse_object *parent; /* Parent op */\
union acpi_parse_object *next; /* Next op */\
union acpi_parse_object *parent; /* Parent op */\
u8 descriptor_type; /* To differentiate various internal objs */\
u8 flags; /* Type of Op */\
u16 aml_opcode; /* AML opcode */\
u32 aml_offset; /* Offset of declaration in AML */\
union acpi_parse_object *next; /* Next op */\
struct acpi_namespace_node *node; /* For use by interpreter */\
union acpi_parse_value value; /* Value or args associated with the opcode */\
ACPI_DISASM_ONLY_MEMBERS (\
u8 disasm_flags; /* Used during AML disassembly */\
u8 disasm_opcode; /* Subtype used for disassembly */\
char aml_op_name[16]) /* Op name (debug only) */\
/* NON-DEBUG members below: */\
struct acpi_namespace_node *node; /* For use by interpreter */\
union acpi_parse_value value; /* Value or args associated with the opcode */
u8 disasm_flags; /* Used during AML disassembly */\
u8 disasm_opcode; /* Subtype used for disassembly */\
char aml_op_name[16]) /* Op name (debug only) */
#define ACPI_DASM_BUFFER 0x00
#define ACPI_DASM_RESOURCE 0x01
#define ACPI_DASM_STRING 0x02
#define ACPI_DASM_UNICODE 0x03
#define ACPI_DASM_EISAID 0x04
#define ACPI_DASM_MATCHOP 0x05
#define ACPI_DASM_BUFFER 0x00
#define ACPI_DASM_RESOURCE 0x01
#define ACPI_DASM_STRING 0x02
#define ACPI_DASM_UNICODE 0x03
#define ACPI_DASM_EISAID 0x04
#define ACPI_DASM_MATCHOP 0x05
#define ACPI_DASM_LNOT_PREFIX 0x06
#define ACPI_DASM_LNOT_SUFFIX 0x07
#define ACPI_DASM_IGNORE 0x08
/*
* generic operation (for example: If, While, Store)
* Generic operation (for example: If, While, Store)
*/
struct acpi_parse_obj_common {
ACPI_PARSE_COMMON};
@ -601,7 +620,7 @@ struct acpi_parse_obj_named {
u32 name; /* 4-byte name or zero if no name */
};
/* The parse node is the fundamental element of the parse tree */
/* This version is used by the i_aSL compiler only */
#define ACPI_MAX_PARSEOP_NAME 20
@ -643,7 +662,6 @@ union acpi_parse_object {
* method.
*/
struct acpi_parse_state {
u32 aml_size;
u8 *aml_start; /* First AML byte */
u8 *aml; /* Next AML byte */
u8 *aml_end; /* (last + 1) AML byte */
@ -653,22 +671,23 @@ struct acpi_parse_state {
struct acpi_namespace_node *start_node;
union acpi_generic_state *scope; /* Current scope */
union acpi_parse_object *start_scope;
u32 aml_size;
};
/* Parse object flags */
#define ACPI_PARSEOP_GENERIC 0x01
#define ACPI_PARSEOP_NAMED 0x02
#define ACPI_PARSEOP_DEFERRED 0x04
#define ACPI_PARSEOP_BYTELIST 0x08
#define ACPI_PARSEOP_IN_CACHE 0x80
#define ACPI_PARSEOP_GENERIC 0x01
#define ACPI_PARSEOP_NAMED 0x02
#define ACPI_PARSEOP_DEFERRED 0x04
#define ACPI_PARSEOP_BYTELIST 0x08
#define ACPI_PARSEOP_IN_CACHE 0x80
/* Parse object disasm_flags */
#define ACPI_PARSEOP_IGNORE 0x01
#define ACPI_PARSEOP_PARAMLIST 0x02
#define ACPI_PARSEOP_EMPTY_TERMLIST 0x04
#define ACPI_PARSEOP_SPECIAL 0x10
#define ACPI_PARSEOP_IGNORE 0x01
#define ACPI_PARSEOP_PARAMLIST 0x02
#define ACPI_PARSEOP_EMPTY_TERMLIST 0x04
#define ACPI_PARSEOP_SPECIAL 0x10
/*****************************************************************************
*
@ -676,8 +695,8 @@ struct acpi_parse_state {
*
****************************************************************************/
#define PCI_ROOT_HID_STRING "PNP0A03"
#define PCI_EXPRESS_ROOT_HID_STRING "PNP0A08"
#define PCI_ROOT_HID_STRING "PNP0A03"
#define PCI_EXPRESS_ROOT_HID_STRING "PNP0A08"
struct acpi_bit_register_info {
u8 parent_register;
@ -710,13 +729,14 @@ struct acpi_bit_register_info {
#define ACPI_BITMASK_PCIEXP_WAKE_STATUS 0x4000 /* ACPI 3.0 */
#define ACPI_BITMASK_WAKE_STATUS 0x8000
#define ACPI_BITMASK_ALL_FIXED_STATUS (ACPI_BITMASK_TIMER_STATUS | \
ACPI_BITMASK_BUS_MASTER_STATUS | \
ACPI_BITMASK_GLOBAL_LOCK_STATUS | \
ACPI_BITMASK_POWER_BUTTON_STATUS | \
ACPI_BITMASK_SLEEP_BUTTON_STATUS | \
ACPI_BITMASK_RT_CLOCK_STATUS | \
ACPI_BITMASK_WAKE_STATUS)
#define ACPI_BITMASK_ALL_FIXED_STATUS (\
ACPI_BITMASK_TIMER_STATUS | \
ACPI_BITMASK_BUS_MASTER_STATUS | \
ACPI_BITMASK_GLOBAL_LOCK_STATUS | \
ACPI_BITMASK_POWER_BUTTON_STATUS | \
ACPI_BITMASK_SLEEP_BUTTON_STATUS | \
ACPI_BITMASK_RT_CLOCK_STATUS | \
ACPI_BITMASK_WAKE_STATUS)
#define ACPI_BITMASK_TIMER_ENABLE 0x0001
#define ACPI_BITMASK_GLOBAL_LOCK_ENABLE 0x0020
@ -820,7 +840,7 @@ struct acpi_bit_register_info {
*
****************************************************************************/
#define ACPI_ASCII_ZERO 0x30
#define ACPI_ASCII_ZERO 0x30
/*****************************************************************************
*
@ -842,9 +862,9 @@ struct acpi_integrity_info {
u32 objects;
};
#define ACPI_DB_REDIRECTABLE_OUTPUT 0x01
#define ACPI_DB_CONSOLE_OUTPUT 0x02
#define ACPI_DB_DUPLICATE_OUTPUT 0x03
#define ACPI_DB_REDIRECTABLE_OUTPUT 0x01
#define ACPI_DB_CONSOLE_OUTPUT 0x02
#define ACPI_DB_DUPLICATE_OUTPUT 0x03
/*****************************************************************************
*
@ -854,18 +874,18 @@ struct acpi_integrity_info {
/* Entry for a memory allocation (debug only) */
#define ACPI_MEM_MALLOC 0
#define ACPI_MEM_CALLOC 1
#define ACPI_MAX_MODULE_NAME 16
#define ACPI_MEM_MALLOC 0
#define ACPI_MEM_CALLOC 1
#define ACPI_MAX_MODULE_NAME 16
#define ACPI_COMMON_DEBUG_MEM_HEADER \
struct acpi_debug_mem_block *previous; \
struct acpi_debug_mem_block *next; \
u32 size; \
u32 component; \
u32 line; \
char module[ACPI_MAX_MODULE_NAME]; \
u8 alloc_type;
struct acpi_debug_mem_block *previous; \
struct acpi_debug_mem_block *next; \
u32 size; \
u32 component; \
u32 line; \
char module[ACPI_MAX_MODULE_NAME]; \
u8 alloc_type;
struct acpi_debug_mem_header {
ACPI_COMMON_DEBUG_MEM_HEADER};

81
include/acpi/acmacros.h
View file

@ -56,6 +56,10 @@
#define ACPI_CLEAR_BIT(target,bit) ((target) &= ~(bit))
#define ACPI_MIN(a,b) (((a)<(b))?(a):(b))
/* Size calculation */
#define ACPI_ARRAY_LENGTH(x) (sizeof(x) / sizeof((x)[0]))
#if ACPI_MACHINE_WIDTH == 16
/*
@ -99,7 +103,7 @@
* printf() format helpers
*/
/* Split 64-bit integer into two 32-bit values. Use with %8.8X%8.8X */
/* Split 64-bit integer into two 32-bit values. Use with %8.8_x%8.8_x */
#define ACPI_FORMAT_UINT64(i) ACPI_HIDWORD(i),ACPI_LODWORD(i)
@ -130,7 +134,6 @@
#define ACPI_TO_POINTER(i) ACPI_ADD_PTR (void,(void *) NULL,(acpi_native_uint) i)
#define ACPI_TO_INTEGER(p) ACPI_PTR_DIFF (p,(void *) NULL)
#define ACPI_OFFSET(d,f) (acpi_size) ACPI_PTR_DIFF (&(((d *)0)->f),(void *) NULL)
#define ACPI_FADT_OFFSET(f) ACPI_OFFSET (FADT_DESCRIPTOR, f)
#if ACPI_MACHINE_WIDTH == 16
#define ACPI_STORE_POINTER(d,s) ACPI_MOVE_32_TO_32(d,s)
@ -141,6 +144,12 @@
#define ACPI_PTR_TO_PHYSADDR(i) ACPI_TO_INTEGER(i)
#endif
#ifndef ACPI_MISALIGNMENT_NOT_SUPPORTED
#define ACPI_COMPARE_NAME(a,b) (*ACPI_CAST_PTR (u32,(a)) == *ACPI_CAST_PTR (u32,(b)))
#else
#define ACPI_COMPARE_NAME(a,b) (!ACPI_STRNCMP (ACPI_CAST_PTR (char,(a)), ACPI_CAST_PTR (char,(b)), ACPI_NAME_SIZE))
#endif
/*
* Macros for moving data around to/from buffers that are possibly unaligned.
* If the hardware supports the transfer of unaligned data, just do the store.
@ -341,29 +350,33 @@
/*
* Rounding macros (Power of two boundaries only)
*/
#define ACPI_ROUND_DOWN(value,boundary) (((acpi_native_uint)(value)) & \
#define ACPI_ROUND_DOWN(value,boundary) (((acpi_native_uint)(value)) & \
(~(((acpi_native_uint) boundary)-1)))
#define ACPI_ROUND_UP(value,boundary) ((((acpi_native_uint)(value)) + \
#define ACPI_ROUND_UP(value,boundary) ((((acpi_native_uint)(value)) + \
(((acpi_native_uint) boundary)-1)) & \
(~(((acpi_native_uint) boundary)-1)))
#define ACPI_ROUND_DOWN_TO_32_BITS(a) ACPI_ROUND_DOWN(a,4)
#define ACPI_ROUND_DOWN_TO_64_BITS(a) ACPI_ROUND_DOWN(a,8)
#define ACPI_ROUND_DOWN_TO_NATIVE_WORD(a) ACPI_ROUND_DOWN(a,ALIGNED_ADDRESS_BOUNDARY)
/* Note: sizeof(acpi_native_uint) evaluates to either 2, 4, or 8 */
#define ACPI_ROUND_UP_to_32_bITS(a) ACPI_ROUND_UP(a,4)
#define ACPI_ROUND_UP_to_64_bITS(a) ACPI_ROUND_UP(a,8)
#define ACPI_ROUND_UP_TO_NATIVE_WORD(a) ACPI_ROUND_UP(a,ALIGNED_ADDRESS_BOUNDARY)
#define ACPI_ROUND_DOWN_TO_32BIT(a) ACPI_ROUND_DOWN(a,4)
#define ACPI_ROUND_DOWN_TO_64BIT(a) ACPI_ROUND_DOWN(a,8)
#define ACPI_ROUND_DOWN_TO_NATIVE_WORD(a) ACPI_ROUND_DOWN(a,sizeof(acpi_native_uint))
#define ACPI_ROUND_BITS_UP_TO_BYTES(a) ACPI_DIV_8((a) + 7)
#define ACPI_ROUND_BITS_DOWN_TO_BYTES(a) ACPI_DIV_8((a))
#define ACPI_ROUND_UP_TO_32BIT(a) ACPI_ROUND_UP(a,4)
#define ACPI_ROUND_UP_TO_64BIT(a) ACPI_ROUND_UP(a,8)
#define ACPI_ROUND_UP_TO_NATIVE_WORD(a) ACPI_ROUND_UP(a,sizeof(acpi_native_uint))
#define ACPI_ROUND_UP_TO_1K(a) (((a) + 1023) >> 10)
#define ACPI_ROUND_BITS_UP_TO_BYTES(a) ACPI_DIV_8((a) + 7)
#define ACPI_ROUND_BITS_DOWN_TO_BYTES(a) ACPI_DIV_8((a))
#define ACPI_ROUND_UP_TO_1K(a) (((a) + 1023) >> 10)
/* Generic (non-power-of-two) rounding */
#define ACPI_ROUND_UP_TO(value,boundary) (((value) + ((boundary)-1)) / (boundary))
#define ACPI_ROUND_UP_TO(value,boundary) (((value) + ((boundary)-1)) / (boundary))
#define ACPI_IS_MISALIGNED(value) (((acpi_native_uint)value) & (sizeof(acpi_native_uint)-1))
/*
* Bitmask creation
@ -371,10 +384,10 @@
* MASK_BITS_ABOVE creates a mask starting AT the position and above
* MASK_BITS_BELOW creates a mask starting one bit BELOW the position
*/
#define ACPI_MASK_BITS_ABOVE(position) (~((ACPI_INTEGER_MAX) << ((u32) (position))))
#define ACPI_MASK_BITS_BELOW(position) ((ACPI_INTEGER_MAX) << ((u32) (position)))
#define ACPI_MASK_BITS_ABOVE(position) (~((ACPI_INTEGER_MAX) << ((u32) (position))))
#define ACPI_MASK_BITS_BELOW(position) ((ACPI_INTEGER_MAX) << ((u32) (position)))
#define ACPI_IS_OCTAL_DIGIT(d) (((char)(d) >= '0') && ((char)(d) <= '7'))
#define ACPI_IS_OCTAL_DIGIT(d) (((char)(d) >= '0') && ((char)(d) <= '7'))
/* Bitfields within ACPI registers */
@ -396,8 +409,8 @@
*
* The "Descriptor" field is the first field in both structures.
*/
#define ACPI_GET_DESCRIPTOR_TYPE(d) (((union acpi_descriptor *)(void *)(d))->descriptor_id)
#define ACPI_SET_DESCRIPTOR_TYPE(d,t) (((union acpi_descriptor *)(void *)(d))->descriptor_id = t)
#define ACPI_GET_DESCRIPTOR_TYPE(d) (((union acpi_descriptor *)(void *)(d))->common.descriptor_type)
#define ACPI_SET_DESCRIPTOR_TYPE(d,t) (((union acpi_descriptor *)(void *)(d))->common.descriptor_type = t)
/* Macro to test the object type */
@ -486,7 +499,6 @@
#define ACPI_ERROR(plist)
#define ACPI_ERROR_NAMESPACE(s,e)
#define ACPI_ERROR_METHOD(s,n,p,e)
#endif
/*
@ -514,12 +526,12 @@
#define ACPI_GET_FUNCTION_NAME _acpi_function_name
/*
* The Name parameter should be the procedure name as a quoted string.
* This is declared as a local string ("my_function_name") so that it can
* This is declared as a local string ("MyFunctionName") so that it can
* be also used by the function exit macros below.
* Note: (const char) is used to be compatible with the debug interfaces
* and macros such as __FUNCTION__.
*/
#define ACPI_FUNCTION_NAME(name) const char *_acpi_function_name = name;
#define ACPI_FUNCTION_NAME(name) const char *_acpi_function_name = #name;
#else
/* Compiler supports __FUNCTION__ (or equivalent) -- Ignore this macro */
@ -528,13 +540,13 @@
#endif
#define ACPI_FUNCTION_TRACE(a) ACPI_FUNCTION_NAME(a) \
acpi_ut_trace(ACPI_DEBUG_PARAMETERS)
acpi_ut_trace(ACPI_DEBUG_PARAMETERS)
#define ACPI_FUNCTION_TRACE_PTR(a,b) ACPI_FUNCTION_NAME(a) \
acpi_ut_trace_ptr(ACPI_DEBUG_PARAMETERS,(void *)b)
acpi_ut_trace_ptr(ACPI_DEBUG_PARAMETERS,(void *)b)
#define ACPI_FUNCTION_TRACE_U32(a,b) ACPI_FUNCTION_NAME(a) \
acpi_ut_trace_u32(ACPI_DEBUG_PARAMETERS,(u32)b)
acpi_ut_trace_u32(ACPI_DEBUG_PARAMETERS,(u32)b)
#define ACPI_FUNCTION_TRACE_STR(a,b) ACPI_FUNCTION_NAME(a) \
acpi_ut_trace_str(ACPI_DEBUG_PARAMETERS,(char *)b)
acpi_ut_trace_str(ACPI_DEBUG_PARAMETERS,(char *)b)
#define ACPI_FUNCTION_ENTRY() acpi_ut_track_stack_ptr()
@ -543,7 +555,7 @@
* WARNING: These macros include a return statement. This is usually considered
* bad form, but having a separate exit macro is very ugly and difficult to maintain.
* One of the FUNCTION_TRACE macros above must be used in conjunction with these macros
* so that "_acpi_function_name" is defined.
* so that "_AcpiFunctionName" is defined.
*
* Note: the DO_WHILE0 macro is used to prevent some compilers from complaining
* about these constructs.
@ -654,6 +666,7 @@
#define ACPI_DUMP_STACK_ENTRY(a)
#define ACPI_DUMP_OPERANDS(a,b,c,d,e)
#define ACPI_DUMP_ENTRY(a,b)
#define ACPI_DUMP_TABLES(a,b)
#define ACPI_DUMP_PATHNAME(a,b,c,d)
#define ACPI_DUMP_RESOURCE_LIST(a)
#define ACPI_DUMP_BUFFER(a,b)
@ -709,19 +722,19 @@
/* Memory allocation */
#define ACPI_MEM_ALLOCATE(a) acpi_ut_allocate((acpi_size)(a),_COMPONENT,_acpi_module_name,__LINE__)
#define ACPI_MEM_CALLOCATE(a) acpi_ut_callocate((acpi_size)(a), _COMPONENT,_acpi_module_name,__LINE__)
#define ACPI_MEM_FREE(a) acpi_os_free(a)
#define ACPI_ALLOCATE(a) acpi_ut_allocate((acpi_size)(a),_COMPONENT,_acpi_module_name,__LINE__)
#define ACPI_ALLOCATE_ZEROED(a) acpi_ut_allocate_zeroed((acpi_size)(a), _COMPONENT,_acpi_module_name,__LINE__)
#define ACPI_FREE(a) acpi_os_free(a)
#define ACPI_MEM_TRACKING(a)
#else
/* Memory allocation */
#define ACPI_MEM_ALLOCATE(a) acpi_ut_allocate_and_track((acpi_size)(a),_COMPONENT,_acpi_module_name,__LINE__)
#define ACPI_MEM_CALLOCATE(a) acpi_ut_callocate_and_track((acpi_size)(a), _COMPONENT,_acpi_module_name,__LINE__)
#define ACPI_MEM_FREE(a) acpi_ut_free_and_track(a,_COMPONENT,_acpi_module_name,__LINE__)
#define ACPI_MEM_TRACKING(a) a
#define ACPI_ALLOCATE(a) acpi_ut_allocate_and_track((acpi_size)(a),_COMPONENT,_acpi_module_name,__LINE__)
#define ACPI_ALLOCATE_ZEROED(a) acpi_ut_allocate_zeroed_and_track((acpi_size)(a), _COMPONENT,_acpi_module_name,__LINE__)
#define ACPI_FREE(a) acpi_ut_free_and_track(a,_COMPONENT,_acpi_module_name,__LINE__)
#define ACPI_MEM_TRACKING(a) a
#endif /* ACPI_DBG_TRACK_ALLOCATIONS */

28
include/acpi/acnamesp.h
View file

@ -63,6 +63,8 @@
#define ACPI_NS_DONT_OPEN_SCOPE 0x02
#define ACPI_NS_NO_PEER_SEARCH 0x04
#define ACPI_NS_ERROR_IF_FOUND 0x08
#define ACPI_NS_PREFIX_IS_SCOPE 0x10
#define ACPI_NS_EXTERNAL 0x20
#define ACPI_NS_WALK_UNLOCK TRUE
#define ACPI_NS_WALK_NO_UNLOCK FALSE
@ -171,19 +173,17 @@ acpi_ns_dump_objects(acpi_object_type type,
/*
* nseval - Namespace evaluation functions
*/
acpi_status acpi_ns_evaluate_by_handle(struct acpi_parameter_info *info);
acpi_status
acpi_ns_evaluate_by_name(char *pathname, struct acpi_parameter_info *info);
acpi_status
acpi_ns_evaluate_relative(char *pathname, struct acpi_parameter_info *info);
acpi_status acpi_ns_evaluate(struct acpi_evaluate_info *info);
/*
* nsnames - Name and Scope manipulation
*/
u32 acpi_ns_opens_scope(acpi_object_type type);
void
acpi_ns_build_external_path(struct acpi_namespace_node *node,
acpi_size size, char *name_buffer);
char *acpi_ns_get_external_pathname(struct acpi_namespace_node *node);
char *acpi_ns_name_of_current_scope(struct acpi_walk_state *walk_state);
@ -196,9 +196,9 @@ u8
acpi_ns_pattern_match(struct acpi_namespace_node *obj_node, char *search_for);
acpi_status
acpi_ns_get_node_by_path(char *external_pathname,
struct acpi_namespace_node *in_prefix_node,
u32 flags, struct acpi_namespace_node **out_node);
acpi_ns_get_node(struct acpi_namespace_node *prefix_node,
char *external_pathname,
u32 flags, struct acpi_namespace_node **out_node);
acpi_size acpi_ns_get_pathname_length(struct acpi_namespace_node *node);
@ -241,10 +241,10 @@ acpi_ns_search_and_enter(u32 entry_name,
u32 flags, struct acpi_namespace_node **ret_node);
acpi_status
acpi_ns_search_node(u32 entry_name,
struct acpi_namespace_node *node,
acpi_object_type type,
struct acpi_namespace_node **ret_node);
acpi_ns_search_one_scope(u32 entry_name,
struct acpi_namespace_node *node,
acpi_object_type type,
struct acpi_namespace_node **ret_node);
void
acpi_ns_install_node(struct acpi_walk_state *walk_state,

186
include/acpi/acobject.h
View file

@ -1,7 +1,7 @@
/******************************************************************************
*
* Name: acobject.h - Definition of union acpi_operand_object (Internal object only)
* Name: acobject.h - Definition of union acpi_operand_object (Internal object only)
*
*****************************************************************************/
@ -45,10 +45,12 @@
#ifndef _ACOBJECT_H
#define _ACOBJECT_H
/* acpisrc:struct_defs -- for acpisrc conversion */
/*
* The union acpi_operand_object is used to pass AML operands from the dispatcher
* The union acpi_operand_object is used to pass AML operands from the dispatcher
* to the interpreter, and to keep track of the various handlers such as
* address space handlers and notify handlers. The object is a constant
* address space handlers and notify handlers. The object is a constant
* size in order to allow it to be cached and reused.
*/
@ -61,17 +63,25 @@
/*
* Common area for all objects.
*
* data_type is used to differentiate between internal descriptors, and MUST
* be the first byte in this structure.
* descriptor_type is used to differentiate between internal descriptors, and
* must be in the same place across all descriptors
*
* Note: The descriptor_type and Type fields must appear in the identical
* position in both the struct acpi_namespace_node and union acpi_operand_object
* structures.
*/
#define ACPI_OBJECT_COMMON_HEADER /* SIZE/ALIGNMENT: 32 bits, one ptr plus trailing 8-bit flag */\
u8 descriptor; /* To differentiate various internal objs */\
u8 type; /* acpi_object_type */\
u16 reference_count; /* For object deletion management */\
union acpi_operand_object *next_object; /* Objects linked to parent NS node */\
u8 flags;
#define ACPI_OBJECT_COMMON_HEADER \
union acpi_operand_object *next_object; /* Objects linked to parent NS node */\
u8 descriptor_type; /* To differentiate various internal objs */\
u8 type; /* acpi_object_type */\
u16 reference_count; /* For object deletion management */\
u8 flags;
/*
* Note: There are 3 bytes available here before the
* next natural alignment boundary (for both 32/64 cases)
*/
/* Values for flag byte above */
/* Values for Flag byte above */
#define AOPOBJ_AML_CONSTANT 0x01
#define AOPOBJ_STATIC_POINTER 0x02
@ -79,36 +89,7 @@
#define AOPOBJ_OBJECT_INITIALIZED 0x08
#define AOPOBJ_SETUP_COMPLETE 0x10
#define AOPOBJ_SINGLE_DATUM 0x20
/*
* Common bitfield for the field objects
* "Field Datum" -- a datum from the actual field object
* "Buffer Datum" -- a datum from a user buffer, read from or to be written to the field
*/
#define ACPI_COMMON_FIELD_INFO /* SIZE/ALIGNMENT: 24 bits + three 32-bit values */\
u8 field_flags; /* Access, update, and lock bits */\
u8 attribute; /* From access_as keyword */\
u8 access_byte_width; /* Read/Write size in bytes */\
u32 bit_length; /* Length of field in bits */\
u32 base_byte_offset; /* Byte offset within containing object */\
u8 start_field_bit_offset;/* Bit offset within first field datum (0-63) */\
u8 access_bit_width; /* Read/Write size in bits (8-64) */\
u32 value; /* Value to store into the Bank or Index register */\
struct acpi_namespace_node *node; /* Link back to parent node */
/*
* Fields common to both Strings and Buffers
*/
#define ACPI_COMMON_BUFFER_INFO \
u32 length;
/*
* Common fields for objects that support ASL notifications
*/
#define ACPI_COMMON_NOTIFY_INFO \
union acpi_operand_object *system_notify; /* Handler for system notifies */\
union acpi_operand_object *device_notify; /* Handler for driver notifies */\
union acpi_operand_object *handler; /* Handler for Address space */
#define AOPOBJ_INVALID 0x40 /* Used if host OS won't allow an op_region address */
/******************************************************************************
*
@ -125,25 +106,31 @@ struct acpi_object_integer {
/*
* Note: The String and Buffer object must be identical through the Pointer
* element. There is code that depends on this.
* and length elements. There is code that depends on this.
*
* Fields common to both Strings and Buffers
*/
#define ACPI_COMMON_BUFFER_INFO(_type) \
_type *pointer; \
u32 length;
struct acpi_object_string { /* Null terminated, ASCII characters only */
ACPI_OBJECT_COMMON_HEADER ACPI_COMMON_BUFFER_INFO char *pointer; /* String in AML stream or allocated string */
ACPI_OBJECT_COMMON_HEADER ACPI_COMMON_BUFFER_INFO(char) /* String in AML stream or allocated string */
};
struct acpi_object_buffer {
ACPI_OBJECT_COMMON_HEADER ACPI_COMMON_BUFFER_INFO u8 * pointer; /* Buffer in AML stream or allocated buffer */
struct acpi_namespace_node *node; /* Link back to parent node */
u8 *aml_start;
ACPI_OBJECT_COMMON_HEADER ACPI_COMMON_BUFFER_INFO(u8) /* Buffer in AML stream or allocated buffer */
u32 aml_length;
u8 *aml_start;
struct acpi_namespace_node *node; /* Link back to parent node */
};
struct acpi_object_package {
ACPI_OBJECT_COMMON_HEADER u32 count; /* # of elements in package */
u32 aml_length;
u8 *aml_start;
struct acpi_namespace_node *node; /* Link back to parent node */
ACPI_OBJECT_COMMON_HEADER struct acpi_namespace_node *node; /* Link back to parent node */
union acpi_operand_object **elements; /* Array of pointers to acpi_objects */
u8 *aml_start;
u32 aml_length;
u32 count; /* # of elements in package */
};
/******************************************************************************
@ -156,23 +143,6 @@ struct acpi_object_event {
ACPI_OBJECT_COMMON_HEADER void *semaphore;
};
#define ACPI_INFINITE_CONCURRENCY 0xFF
typedef
acpi_status(*ACPI_INTERNAL_METHOD) (struct acpi_walk_state * walk_state);
struct acpi_object_method {
ACPI_OBJECT_COMMON_HEADER u8 method_flags;
u8 param_count;
u32 aml_length;
void *semaphore;
u8 *aml_start;
ACPI_INTERNAL_METHOD implementation;
u8 concurrency;
u8 thread_count;
acpi_owner_id owner_id;
};
struct acpi_object_mutex {
ACPI_OBJECT_COMMON_HEADER u8 sync_level; /* 0-15, specified in Mutex() call */
u16 acquisition_depth; /* Allow multiple Acquires, same thread */
@ -186,11 +156,23 @@ struct acpi_object_mutex {
struct acpi_object_region {
ACPI_OBJECT_COMMON_HEADER u8 space_id;
union acpi_operand_object *handler; /* Handler for region access */
struct acpi_namespace_node *node; /* Containing namespace node */
union acpi_operand_object *handler; /* Handler for region access */
union acpi_operand_object *next;
u32 length;
acpi_physical_address address;
u32 length;
};
struct acpi_object_method {
ACPI_OBJECT_COMMON_HEADER u8 method_flags;
u8 param_count;
u8 concurrency;
void *semaphore;
u8 *aml_start;
ACPI_INTERNAL_METHOD implementation;
u32 aml_length;
u8 thread_count;
acpi_owner_id owner_id;
};
/******************************************************************************
@ -199,6 +181,14 @@ struct acpi_object_region {
*
*****************************************************************************/
/*
* Common fields for objects that support ASL notifications
*/
#define ACPI_COMMON_NOTIFY_INFO \
union acpi_operand_object *system_notify; /* Handler for system notifies */\
union acpi_operand_object *device_notify; /* Handler for driver notifies */\
union acpi_operand_object *handler; /* Handler for Address space */
struct acpi_object_notify_common { /* COMMON NOTIFY for POWER, PROCESSOR, DEVICE, and THERMAL */
ACPI_OBJECT_COMMON_HEADER ACPI_COMMON_NOTIFY_INFO};
@ -213,9 +203,9 @@ struct acpi_object_power_resource {
};
struct acpi_object_processor {
ACPI_OBJECT_COMMON_HEADER ACPI_COMMON_NOTIFY_INFO u32 proc_id;
u32 length;
acpi_io_address address;
ACPI_OBJECT_COMMON_HEADER u8 proc_id;
u8 length;
ACPI_COMMON_NOTIFY_INFO acpi_io_address address;
};
struct acpi_object_thermal_zone {
@ -227,9 +217,24 @@ ACPI_OBJECT_COMMON_HEADER ACPI_COMMON_NOTIFY_INFO};
*
*****************************************************************************/
/*
* Common bitfield for the field objects
* "Field Datum" -- a datum from the actual field object
* "Buffer Datum" -- a datum from a user buffer, read from or to be written to the field
*/
#define ACPI_COMMON_FIELD_INFO \
u8 field_flags; /* Access, update, and lock bits */\
u8 attribute; /* From access_as keyword */\
u8 access_byte_width; /* Read/Write size in bytes */\
struct acpi_namespace_node *node; /* Link back to parent node */\
u32 bit_length; /* Length of field in bits */\
u32 base_byte_offset; /* Byte offset within containing object */\
u32 value; /* Value to store into the Bank or Index register */\
u8 start_field_bit_offset;/* Bit offset within first field datum (0-63) */\
u8 access_bit_width; /* Read/Write size in bits (8-64) */
struct acpi_object_field_common { /* COMMON FIELD (for BUFFER, REGION, BANK, and INDEX fields) */
ACPI_OBJECT_COMMON_HEADER ACPI_COMMON_FIELD_INFO union acpi_operand_object *region_obj; /* Containing Operation Region object */
/* (REGION/BANK fields only) */
ACPI_OBJECT_COMMON_HEADER ACPI_COMMON_FIELD_INFO union acpi_operand_object *region_obj; /* Parent Operation Region object (REGION/BANK fields only) */
};
struct acpi_object_region_field {
@ -244,7 +249,7 @@ struct acpi_object_bank_field {
struct acpi_object_index_field {
ACPI_OBJECT_COMMON_HEADER ACPI_COMMON_FIELD_INFO
/*
* No "region_obj" pointer needed since the Index and Data registers
* No "RegionObj" pointer needed since the Index and Data registers
* are each field definitions unto themselves.
*/
union acpi_operand_object *index_obj; /* Index register */
@ -269,13 +274,9 @@ struct acpi_object_notify_handler {
void *context;
};
/* Flags for address handler */
#define ACPI_ADDR_HANDLER_DEFAULT_INSTALLED 0x1
struct acpi_object_addr_handler {
ACPI_OBJECT_COMMON_HEADER u8 space_id;
u16 hflags;
u8 handler_flags;
acpi_adr_space_handler handler;
struct acpi_namespace_node *node; /* Parent device */
void *context;
@ -284,6 +285,10 @@ struct acpi_object_addr_handler {
union acpi_operand_object *next;
};
/* Flags for address handler (handler_flags) */
#define ACPI_ADDR_HANDLER_DEFAULT_INSTALLED 0x01
/******************************************************************************
*
* Special internal objects
@ -297,10 +302,10 @@ struct acpi_object_addr_handler {
struct acpi_object_reference {
ACPI_OBJECT_COMMON_HEADER u8 target_type; /* Used for index_op */
u16 opcode;
u32 offset; /* Used for arg_op, local_op, and index_op */
void *object; /* name_op=>HANDLE to obj, index_op=>union acpi_operand_object */
void *object; /* name_op=>HANDLE to obj, index_op=>union acpi_operand_object */
struct acpi_namespace_node *node;
union acpi_operand_object **where;
u32 offset; /* Used for arg_op, local_op, and index_op */
};
/*
@ -311,12 +316,10 @@ struct acpi_object_reference {
* Currently: Region and field_unit types
*/
struct acpi_object_extra {
ACPI_OBJECT_COMMON_HEADER u8 byte_fill1;
u16 word_fill1;
u32 aml_length;
u8 *aml_start;
struct acpi_namespace_node *method_REG; /* _REG method for this region (if any) */
ACPI_OBJECT_COMMON_HEADER struct acpi_namespace_node *method_REG; /* _REG method for this region (if any) */
void *region_context; /* Region-specific data */
u8 *aml_start;
u32 aml_length;
};
/* Additional data that can be attached to namespace nodes */
@ -391,8 +394,13 @@ union acpi_operand_object {
#define ACPI_DESC_TYPE_NAMED 0x0F
#define ACPI_DESC_TYPE_MAX 0x0F
struct acpi_common_descriptor {
void *common_pointer;
u8 descriptor_type; /* To differentiate various internal objs */
};
union acpi_descriptor {
u8 descriptor_id; /* To differentiate various internal objs */
struct acpi_common_descriptor common;
union acpi_operand_object object;
struct acpi_namespace_node node;
union acpi_parse_object op;

2
include/acpi/acopcode.h
View file

@ -94,7 +94,7 @@
#define ARGP_CONCAT_RES_OP ARGP_LIST3 (ARGP_TERMARG, ARGP_TERMARG, ARGP_TARGET)
#define ARGP_COND_REF_OF_OP ARGP_LIST2 (ARGP_SUPERNAME, ARGP_SUPERNAME)
#define ARGP_CONTINUE_OP ARG_NONE
#define ARGP_COPY_OP ARGP_LIST2 (ARGP_SUPERNAME, ARGP_SIMPLENAME)
#define ARGP_COPY_OP ARGP_LIST2 (ARGP_TERMARG, ARGP_SIMPLENAME)
#define ARGP_CREATE_BIT_FIELD_OP ARGP_LIST3 (ARGP_TERMARG, ARGP_TERMARG, ARGP_NAME)
#define ARGP_CREATE_BYTE_FIELD_OP ARGP_LIST3 (ARGP_TERMARG, ARGP_TERMARG, ARGP_NAME)
#define ARGP_CREATE_DWORD_FIELD_OP ARGP_LIST3 (ARGP_TERMARG, ARGP_TERMARG, ARGP_NAME)

10
include/acpi/acoutput.h
View file

@ -50,7 +50,7 @@
* component basis and a per-exception-type basis.
*/
/* Component IDs are used in the global "debug_layer" */
/* Component IDs are used in the global "DebugLayer" */
#define ACPI_UTILITIES 0x00000001
#define ACPI_HARDWARE 0x00000002
@ -121,7 +121,7 @@
#define ACPI_LV_INTERRUPTS 0x08000000
#define ACPI_LV_VERBOSITY3 0x0F000000 | ACPI_LV_VERBOSITY2
/* Exceptionally verbose output -- also used in the global "debug_level" */
/* Exceptionally verbose output -- also used in the global "DebugLevel" */
#define ACPI_LV_AML_DISASSEMBLE 0x10000000
#define ACPI_LV_VERBOSE_INFO 0x20000000
@ -135,7 +135,7 @@
*/
#define ACPI_DEBUG_LEVEL(dl) (u32) dl,ACPI_DEBUG_PARAMETERS
/* Exception level -- used in the global "debug_level" */
/* Exception level -- used in the global "DebugLevel" */
#define ACPI_DB_INIT ACPI_DEBUG_LEVEL (ACPI_LV_INIT)
#define ACPI_DB_DEBUG_OBJECT ACPI_DEBUG_LEVEL (ACPI_LV_DEBUG_OBJECT)
@ -144,13 +144,13 @@
/*
* These two levels are essentially obsolete, all instances in the
* ACPICA core code have been replaced by REPORT_ERROR and REPORT_WARNING
* ACPICA core code have been replaced by ACPI_ERROR and ACPI_WARNING
* (Kept here because some drivers may still use them)
*/
#define ACPI_DB_ERROR ACPI_DEBUG_LEVEL (ACPI_LV_ERROR)
#define ACPI_DB_WARN ACPI_DEBUG_LEVEL (ACPI_LV_WARN)
/* Trace level -- also used in the global "debug_level" */
/* Trace level -- also used in the global "DebugLevel" */
#define ACPI_DB_INIT_NAMES ACPI_DEBUG_LEVEL (ACPI_LV_INIT_NAMES)
#define ACPI_DB_THREADS ACPI_DEBUG_LEVEL (ACPI_LV_THREADS)

4
include/acpi/acparser.h
View file

@ -46,7 +46,7 @@
#define OP_HAS_RETURN_VALUE 1
/* variable # arguments */
/* Variable number of arguments. This field must be 32 bits */
#define ACPI_VAR_ARGS ACPI_UINT32_MAX
@ -71,7 +71,7 @@
/*
* psxface - Parser external interfaces
*/
acpi_status acpi_ps_execute_method(struct acpi_parameter_info *info);
acpi_status acpi_ps_execute_method(struct acpi_evaluate_info *info);
/*
* psargs - Parse AML opcode arguments

10
include/acpi/acpi_bus.h
View file

@ -26,7 +26,7 @@
#ifndef __ACPI_BUS_H__
#define __ACPI_BUS_H__
#include <linux/kobject.h>
#include <linux/device.h>
#include <acpi/acpi.h>
@ -59,7 +59,7 @@ acpi_evaluate_reference(acpi_handle handle,
#define ACPI_BUS_FILE_ROOT "acpi"
extern struct proc_dir_entry *acpi_root_dir;
extern FADT_DESCRIPTOR acpi_fadt;
extern struct fadt_descriptor acpi_fadt;
enum acpi_bus_removal_type {
ACPI_BUS_REMOVAL_NORMAL = 0,
@ -169,7 +169,8 @@ struct acpi_device_flags {
u32 power_manageable:1;
u32 performance_manageable:1;
u32 wake_capable:1; /* Wakeup(_PRW) supported? */
u32 reserved:20;
u32 force_power_state:1;
u32 reserved:19;
};
/* File System */
@ -296,6 +297,7 @@ struct acpi_device {
struct acpi_driver *driver;
void *driver_data;
struct kobject kobj;
struct device dev;
};
#define acpi_driver_data(d) ((d)->driver_data)
@ -327,7 +329,7 @@ int acpi_bus_set_power(acpi_handle handle, int state);
int acpi_bus_generate_event(struct acpi_device *device, u8 type, int data);
int acpi_bus_receive_event(struct acpi_bus_event *event);
int acpi_bus_register_driver(struct acpi_driver *driver);
int acpi_bus_unregister_driver(struct acpi_driver *driver);
void acpi_bus_unregister_driver(struct acpi_driver *driver);
int acpi_bus_add(struct acpi_device **child, struct acpi_device *parent,
acpi_handle handle, int type);
int acpi_bus_trim(struct acpi_device *start, int rmdevice);

23
include/acpi/acpi_numa.h Normal file
View file

@ -0,0 +1,23 @@
#ifndef __ACPI_NUMA_H
#define __ACPI_NUMA_H
#ifdef CONFIG_ACPI_NUMA
#include <linux/kernel.h>
/* Proximity bitmap length */
#if MAX_NUMNODES > 256
#define MAX_PXM_DOMAINS MAX_NUMNODES
#else
#define MAX_PXM_DOMAINS (256) /* Old pxm spec is defined 8 bit */
#endif
extern int __cpuinitdata pxm_to_node_map[MAX_PXM_DOMAINS];
extern int __cpuinitdata node_to_pxm_map[MAX_NUMNODES];
extern int __cpuinit pxm_to_node(int);
extern int __cpuinit node_to_pxm(int);
extern int __cpuinit acpi_map_pxm_to_node(int);
extern void __cpuinit acpi_unmap_pxm_to_node(int);
#endif /* CONFIG_ACPI_NUMA */
#endif /* __ACP_NUMA_H */

35
include/acpi/acpiosxf.h
View file

@ -50,12 +50,16 @@
#include "platform/acenv.h"
#include "actypes.h"
/* Priorities for acpi_os_queue_for_execution */
/* Types for acpi_os_execute */
#define OSD_PRIORITY_GPE 1
#define OSD_PRIORITY_HIGH 2
#define OSD_PRIORITY_MED 3
#define OSD_PRIORITY_LO 4
typedef enum {
OSL_GLOBAL_LOCK_HANDLER,
OSL_NOTIFY_HANDLER,
OSL_GPE_HANDLER,
OSL_DEBUGGER_THREAD,
OSL_EC_POLL_HANDLER,
OSL_EC_BURST_HANDLER
} acpi_execute_type;
#define ACPI_NO_UNIT_LIMIT ((u32) -1)
#define ACPI_MUTEX_SEM 1
@ -161,13 +165,11 @@ acpi_os_remove_interrupt_handler(u32 gsi, acpi_osd_handler service_routine);
/*
* Threads and Scheduling
*/
u32 acpi_os_get_thread_id(void);
acpi_thread_id acpi_os_get_thread_id(void);
acpi_status
acpi_os_queue_for_execution(u32 priority,
acpi_osd_exec_callback function, void *context);
void acpi_os_wait_events_complete(void *context);
acpi_os_execute(acpi_execute_type type,
acpi_osd_exec_callback function, void *context);
void acpi_os_wait_events_complete(void *context);
@ -214,6 +216,12 @@ acpi_os_derive_pci_id(acpi_handle rhandle,
/*
* Miscellaneous
*/
acpi_status acpi_os_validate_interface(char *interface);
acpi_status
acpi_os_validate_address(u8 space_id,
acpi_physical_address address, acpi_size length);
u8 acpi_os_readable(void *pointer, acpi_size length);
#ifdef ACPI_FUTURE_USAGE
@ -255,11 +263,4 @@ char *acpi_os_get_next_filename(void *dir_handle);
void acpi_os_close_directory(void *dir_handle);
/*
* Debug
*/
void
acpi_os_dbg_assert(void *failed_assertion,
void *file_name, u32 line_number, char *message);
#endif /* __ACPIOSXF_H__ */

4
include/acpi/acpixf.h
View file

@ -268,7 +268,7 @@ acpi_status acpi_remove_gpe_block(acpi_handle gpe_device);
* Resource interfaces
*/
typedef
acpi_status(*ACPI_WALK_RESOURCE_CALLBACK) (struct acpi_resource * resource,
acpi_status(*acpi_walk_resource_callback) (struct acpi_resource * resource,
void *context);
acpi_status
@ -290,7 +290,7 @@ acpi_get_possible_resources(acpi_handle device_handle,
acpi_status
acpi_walk_resources(acpi_handle device_handle,
char *name,
ACPI_WALK_RESOURCE_CALLBACK user_function, void *context);
acpi_walk_resource_callback user_function, void *context);
acpi_status
acpi_set_current_resources(acpi_handle device_handle,

22
include/acpi/acresrc.h
View file

@ -164,23 +164,26 @@ acpi_rs_create_pci_routing_table(union acpi_operand_object *package_object,
/*
* rsutils
*/
acpi_status
acpi_rs_get_prt_method_data(acpi_handle handle, struct acpi_buffer *ret_buffer);
acpi_status
acpi_rs_get_crs_method_data(acpi_handle handle, struct acpi_buffer *ret_buffer);
acpi_rs_get_prt_method_data(struct acpi_namespace_node *node,
struct acpi_buffer *ret_buffer);
#ifdef ACPI_FUTURE_USAGE
acpi_status
acpi_rs_get_prs_method_data(acpi_handle handle, struct acpi_buffer *ret_buffer);
#endif /* ACPI_FUTURE_USAGE */
acpi_rs_get_crs_method_data(struct acpi_namespace_node *node,
struct acpi_buffer *ret_buffer);
acpi_status
acpi_rs_get_prs_method_data(struct acpi_namespace_node *node,
struct acpi_buffer *ret_buffer);
acpi_status
acpi_rs_get_method_data(acpi_handle handle,
char *path, struct acpi_buffer *ret_buffer);
acpi_status
acpi_rs_set_srs_method_data(acpi_handle handle, struct acpi_buffer *ret_buffer);
acpi_rs_set_srs_method_data(struct acpi_namespace_node *node,
struct acpi_buffer *ret_buffer);
/*
* rscalc
@ -198,8 +201,9 @@ acpi_rs_get_pci_routing_table_length(union acpi_operand_object *package_object,
acpi_size * buffer_size_needed);
acpi_status
acpi_rs_convert_aml_to_resources(u8 * aml_buffer,
u32 aml_buffer_length, u8 * output_buffer);
acpi_rs_convert_aml_to_resources(u8 * aml,
u32 length,
u32 offset, u8 resource_index, void **context);
acpi_status
acpi_rs_convert_resources_to_aml(struct acpi_resource *resource,

121
include/acpi/acstruct.h
View file

@ -44,6 +44,8 @@
#ifndef __ACSTRUCT_H__
#define __ACSTRUCT_H__
/* acpisrc:struct_defs -- for acpisrc conversion */
/*****************************************************************************
*
* Tree walking typedefs and structs
@ -51,67 +53,76 @@
****************************************************************************/
/*
* Walk state - current state of a parse tree walk. Used for both a leisurely stroll through
* the tree (for whatever reason), and for control method execution.
* Walk state - current state of a parse tree walk. Used for both a leisurely
* stroll through the tree (for whatever reason), and for control method
* execution.
*/
#define ACPI_NEXT_OP_DOWNWARD 1
#define ACPI_NEXT_OP_UPWARD 2
/*
* Groups of definitions for walk_type used for different implementations of
* walkers (never simultaneously) - flags for interpreter:
*/
#define ACPI_WALK_NON_METHOD 0
#define ACPI_WALK_METHOD 1
#define ACPI_WALK_METHOD_RESTART 2
#define ACPI_WALK_CONST_REQUIRED 3
#define ACPI_WALK_CONST_OPTIONAL 4
#define ACPI_WALK_METHOD 0x01
#define ACPI_WALK_METHOD_RESTART 0x02
/* Flags for i_aSL compiler only */
#define ACPI_WALK_CONST_REQUIRED 0x10
#define ACPI_WALK_CONST_OPTIONAL 0x20
struct acpi_walk_state {
u8 data_type; /* To differentiate various internal objs MUST BE FIRST! */
struct acpi_walk_state *next; /* Next walk_state in list */
u8 descriptor_type; /* To differentiate various internal objs */
u8 walk_type;
acpi_owner_id owner_id; /* Owner of objects created during the walk */
u8 last_predicate; /* Result of last predicate */
u8 current_result; /* */
u16 opcode; /* Current AML opcode */
u8 next_op_info; /* Info about next_op */
u8 num_operands; /* Stack pointer for Operands[] array */
acpi_owner_id owner_id; /* Owner of objects created during the walk */
u8 last_predicate; /* Result of last predicate */
u8 current_result;
u8 return_used;
u16 opcode; /* Current AML opcode */
u8 scope_depth;
u8 pass_number; /* Parse pass during table load */
u32 arg_count; /* push for fixed or var args */
u32 aml_offset;
u32 arg_types;
u32 method_breakpoint; /* For single stepping */
u32 user_breakpoint; /* User AML breakpoint */
u32 parse_flags;
struct acpi_parse_state parser_state; /* Current state of parser */
u32 prev_arg_types;
u32 arg_count; /* push for fixed or var args */
struct acpi_namespace_node arguments[ACPI_METHOD_NUM_ARGS]; /* Control method arguments */
struct acpi_namespace_node local_variables[ACPI_METHOD_NUM_LOCALS]; /* Control method locals */
union acpi_operand_object *operands[ACPI_OBJ_NUM_OPERANDS + 1]; /* Operands passed to the interpreter (+1 for NULL terminator) */
union acpi_operand_object **params;
u8 *aml_last_while;
struct acpi_namespace_node arguments[ACPI_METHOD_NUM_ARGS]; /* Control method arguments */
union acpi_operand_object **caller_return_desc;
union acpi_generic_state *control_state; /* List of control states (nested IFs) */
struct acpi_namespace_node *deferred_node; /* Used when executing deferred opcodes */
struct acpi_gpe_event_info *gpe_event_info; /* Info for GPE (_Lxx/_Exx methods only */
union acpi_operand_object *implicit_return_obj;
struct acpi_namespace_node local_variables[ACPI_METHOD_NUM_LOCALS]; /* Control method locals */
struct acpi_namespace_node *method_call_node; /* Called method Node */
union acpi_parse_object *method_call_op; /* method_call Op if running a method */
union acpi_operand_object *method_desc; /* Method descriptor if running a method */
struct acpi_namespace_node *method_node; /* Method node if running a method. */
union acpi_parse_object *op; /* Current parser op */
union acpi_operand_object *operands[ACPI_OBJ_NUM_OPERANDS + 1]; /* Operands passed to the interpreter (+1 for NULL terminator) */
const struct acpi_opcode_info *op_info; /* Info on current opcode */
union acpi_parse_object *origin; /* Start of walk [Obsolete] */
union acpi_operand_object **params;
struct acpi_parse_state parser_state; /* Current state of parser */
union acpi_operand_object *result_obj;
union acpi_generic_state *results; /* Stack of accumulated results */
union acpi_operand_object *return_desc; /* Return object, if any */
union acpi_generic_state *scope_info; /* Stack of nested scopes */
union acpi_parse_object *prev_op; /* Last op that was processed */
union acpi_parse_object *next_op; /* next op to be processed */
struct acpi_thread_state *thread;
acpi_parse_downwards descending_callback;
acpi_parse_upwards ascending_callback;
struct acpi_thread_state *thread;
struct acpi_walk_state *next; /* Next walk_state in list */
};
/* Info used by acpi_ps_init_objects */
@ -131,32 +142,6 @@ struct acpi_init_walk_info {
struct acpi_table_desc *table_desc;
};
/* Info used by acpi_ns_initialize_devices */
struct acpi_device_walk_info {
u16 device_count;
u16 num_STA;
u16 num_INI;
struct acpi_table_desc *table_desc;
};
/* TBD: [Restructure] Merge with struct above */
struct acpi_walk_info {
u32 debug_level;
u32 count;
acpi_owner_id owner_id;
u8 display_type;
};
/* Display Types */
#define ACPI_DISPLAY_SUMMARY (u8) 0
#define ACPI_DISPLAY_OBJECTS (u8) 1
#define ACPI_DISPLAY_MASK (u8) 1
#define ACPI_DISPLAY_SHORT (u8) 2
struct acpi_get_devices_info {
acpi_walk_callback user_function;
void *context;
@ -189,16 +174,21 @@ union acpi_aml_operands {
} mid;
};
/* Internal method parameter list */
struct acpi_parameter_info {
struct acpi_namespace_node *node;
/*
* Structure used to pass object evaluation parameters.
* Purpose is to reduce CPU stack use.
*/
struct acpi_evaluate_info {
struct acpi_namespace_node *prefix_node;
char *pathname;
union acpi_operand_object *obj_desc;
union acpi_operand_object **parameters;
struct acpi_namespace_node *resolved_node;
union acpi_operand_object *return_object;
u8 pass_number;
u8 parameter_type;
u8 return_object_type;
u8 flags;
};
/* Types for parameter_type above */
@ -206,4 +196,35 @@ struct acpi_parameter_info {
#define ACPI_PARAM_ARGS 0
#define ACPI_PARAM_GPE 1
/* Values for Flags above */
#define ACPI_IGNORE_RETURN_VALUE 1
/* Info used by acpi_ns_initialize_devices */
struct acpi_device_walk_info {
u16 device_count;
u16 num_STA;
u16 num_INI;
struct acpi_table_desc *table_desc;
struct acpi_evaluate_info *evaluate_info;
};
/* TBD: [Restructure] Merge with struct above */
struct acpi_walk_info {
u32 debug_level;
u32 count;
acpi_owner_id owner_id;
u8 display_type;
};
/* Display Types */
#define ACPI_DISPLAY_SUMMARY (u8) 0
#define ACPI_DISPLAY_OBJECTS (u8) 1
#define ACPI_DISPLAY_MASK (u8) 1
#define ACPI_DISPLAY_SHORT (u8) 2
#endif

6
include/acpi/actables.h
View file

@ -136,7 +136,11 @@ acpi_status acpi_tb_is_table_installed(struct acpi_table_desc *new_table_desc);
acpi_status
acpi_tb_verify_table_checksum(struct acpi_table_header *table_header);
u8 acpi_tb_generate_checksum(void *buffer, u32 length);
u8 acpi_tb_sum_table(void *buffer, u32 length);
u8 acpi_tb_generate_checksum(struct acpi_table_header *table);
void acpi_tb_set_checksum(struct acpi_table_header *table);
acpi_status
acpi_tb_validate_table_header(struct acpi_table_header *table_header);

422
include/acpi/actbl.h
View file

@ -1,6 +1,6 @@
/******************************************************************************
*
* Name: actbl.h - Table data structures defined in ACPI specification
* Name: actbl.h - Basic ACPI Table Definitions
*
*****************************************************************************/
@ -45,66 +45,45 @@
#define __ACTBL_H__
/*
* Values for description table header signatures. Useful because they make
* it more difficult to inadvertently type in the wrong signature.
*/
#define DSDT_SIG "DSDT" /* Differentiated System Description Table */
#define FADT_SIG "FACP" /* Fixed ACPI Description Table */
#define FACS_SIG "FACS" /* Firmware ACPI Control Structure */
#define PSDT_SIG "PSDT" /* Persistent System Description Table */
#define RSDP_SIG "RSD PTR " /* Root System Description Pointer */
#define RSDT_SIG "RSDT" /* Root System Description Table */
#define XSDT_SIG "XSDT" /* Extended System Description Table */
#define SSDT_SIG "SSDT" /* Secondary System Description Table */
#define RSDP_NAME "RSDP"
/*
* All tables and structures must be byte-packed to match the ACPI
* specification, since the tables are provided by the system BIOS
*/
#pragma pack(1)
/*
* These are the ACPI tables that are directly consumed by the subsystem.
*
* The RSDP and FACS do not use the common ACPI table header. All other ACPI
* tables use the header.
*
* Note about bitfields: The u8 type is used for bitfields in ACPI tables.
* This is the only type that is even remotely portable. Anything else is not
* portable, so do not use any other bitfield types.
*/
/*
* Values for description table header signatures
*/
#define RSDP_NAME "RSDP"
#define RSDP_SIG "RSD PTR " /* RSDT Pointer signature */
#define APIC_SIG "APIC" /* Multiple APIC Description Table */
#define DSDT_SIG "DSDT" /* Differentiated System Description Table */
#define FADT_SIG "FACP" /* Fixed ACPI Description Table */
#define FACS_SIG "FACS" /* Firmware ACPI Control Structure */
#define PSDT_SIG "PSDT" /* Persistent System Description Table */
#define RSDT_SIG "RSDT" /* Root System Description Table */
#define XSDT_SIG "XSDT" /* Extended System Description Table */
#define SSDT_SIG "SSDT" /* Secondary System Description Table */
#define SBST_SIG "SBST" /* Smart Battery Specification Table */
#define SPIC_SIG "SPIC" /* IOSAPIC table */
#define BOOT_SIG "BOOT" /* Boot table */
#define GL_OWNED 0x02 /* Ownership of global lock is bit 1 */
/*
* Common table types. The base code can remain
* constant if the underlying tables are changed
*/
#define RSDT_DESCRIPTOR struct rsdt_descriptor_rev2
#define XSDT_DESCRIPTOR struct xsdt_descriptor_rev2
#define FACS_DESCRIPTOR struct facs_descriptor_rev2
#define FADT_DESCRIPTOR struct fadt_descriptor_rev2
#pragma pack(1)
/*
* ACPI Version-independent tables
/*******************************************************************************
*
* NOTE: The tables that are specific to ACPI versions (1.0, 2.0, etc.)
* are in separate files.
*/
struct rsdp_descriptor { /* Root System Descriptor Pointer */
char signature[8]; /* ACPI signature, contains "RSD PTR " */
u8 checksum; /* ACPI 1.0 checksum */
char oem_id[6]; /* OEM identification */
u8 revision; /* Must be (0) for ACPI 1.0 or (2) for ACPI 2.0+ */
u32 rsdt_physical_address; /* 32-bit physical address of the RSDT */
u32 length; /* XSDT Length in bytes, including header */
u64 xsdt_physical_address; /* 64-bit physical address of the XSDT */
u8 extended_checksum; /* Checksum of entire table (ACPI 2.0) */
char reserved[3]; /* Reserved, must be zero */
};
* ACPI Table Header. This common header is used by all tables except the
* RSDP and FACS. The define is used for direct inclusion of header into
* other ACPI tables
*
******************************************************************************/
struct acpi_common_facs { /* Common FACS for internal use */
u32 *global_lock;
u64 *firmware_waking_vector;
u8 vector_width;
};
#define ACPI_TABLE_HEADER_DEF /* ACPI common table header */ \
#define ACPI_TABLE_HEADER_DEF \
char signature[4]; /* ASCII table signature */\
u32 length; /* Length of table in bytes, including this header */\
u8 revision; /* ACPI Specification minor version # */\
@ -112,153 +91,238 @@ struct acpi_common_facs { /* Common FACS for internal use */
char oem_id[6]; /* ASCII OEM identification */\
char oem_table_id[8]; /* ASCII OEM table identification */\
u32 oem_revision; /* OEM revision number */\
char asl_compiler_id [4]; /* ASCII ASL compiler vendor ID */\
char asl_compiler_id[4]; /* ASCII ASL compiler vendor ID */\
u32 asl_compiler_revision; /* ASL compiler version */
struct acpi_table_header { /* ACPI common table header */
struct acpi_table_header {
ACPI_TABLE_HEADER_DEF};
/*
* MADT values and structures
* GAS - Generic Address Structure (ACPI 2.0+)
*/
struct acpi_generic_address {
u8 address_space_id; /* Address space where struct or register exists */
u8 register_bit_width; /* Size in bits of given register */
u8 register_bit_offset; /* Bit offset within the register */
u8 access_width; /* Minimum Access size (ACPI 3.0) */
u64 address; /* 64-bit address of struct or register */
};
/* Values for MADT PCATCompat */
/*******************************************************************************
*
* RSDP - Root System Description Pointer (Signature is "RSD PTR ")
*
******************************************************************************/
#define DUAL_PIC 0
#define MULTIPLE_APIC 1
struct rsdp_descriptor {
char signature[8]; /* ACPI signature, contains "RSD PTR " */
u8 checksum; /* ACPI 1.0 checksum */
char oem_id[6]; /* OEM identification */
u8 revision; /* Must be (0) for ACPI 1.0 or (2) for ACPI 2.0+ */
u32 rsdt_physical_address; /* 32-bit physical address of the RSDT */
u32 length; /* Table length in bytes, including header (ACPI 2.0+) */
u64 xsdt_physical_address; /* 64-bit physical address of the XSDT (ACPI 2.0+) */
u8 extended_checksum; /* Checksum of entire table (ACPI 2.0+) */
u8 reserved[3]; /* Reserved, must be zero */
};
/* Master MADT */
#define ACPI_RSDP_REV0_SIZE 20 /* Size of original ACPI 1.0 RSDP */
struct multiple_apic_table {
ACPI_TABLE_HEADER_DEF /* ACPI common table header */
u32 local_apic_address; /* Physical address of local APIC */
/*******************************************************************************
*
* RSDT/XSDT - Root System Description Tables
*
******************************************************************************/
struct rsdt_descriptor {
ACPI_TABLE_HEADER_DEF u32 table_offset_entry[1]; /* Array of pointers to ACPI tables */
};
struct xsdt_descriptor {
ACPI_TABLE_HEADER_DEF u64 table_offset_entry[1]; /* Array of pointers to ACPI tables */
};
/*******************************************************************************
*
* FACS - Firmware ACPI Control Structure (FACS)
*
******************************************************************************/
struct facs_descriptor {
char signature[4]; /* ASCII table signature */
u32 length; /* Length of structure, in bytes */
u32 hardware_signature; /* Hardware configuration signature */
u32 firmware_waking_vector; /* 32-bit physical address of the Firmware Waking Vector */
u32 global_lock; /* Global Lock for shared hardware resources */
/* Flags (32 bits) */
u8 PCATcompat:1; /* 00: System also has dual 8259s */
u8 S4bios_f:1; /* 00: S4BIOS support is present */
u8:7; /* 01-07: Reserved, must be zero */
u8 reserved1[3]; /* 08-31: Reserved, must be zero */
u64 xfirmware_waking_vector; /* 64-bit version of the Firmware Waking Vector (ACPI 2.0+) */
u8 version; /* Version of this table (ACPI 2.0+) */
u8 reserved[31]; /* Reserved, must be zero */
};
/* Values for Type in APIC_HEADER_DEF */
#define APIC_PROCESSOR 0
#define APIC_IO 1
#define APIC_XRUPT_OVERRIDE 2
#define APIC_NMI 3
#define APIC_LOCAL_NMI 4
#define APIC_ADDRESS_OVERRIDE 5
#define APIC_IO_SAPIC 6
#define APIC_LOCAL_SAPIC 7
#define APIC_XRUPT_SOURCE 8
#define APIC_RESERVED 9 /* 9 and greater are reserved */
#define ACPI_GLOCK_PENDING 0x01 /* 00: Pending global lock ownership */
#define ACPI_GLOCK_OWNED 0x02 /* 01: Global lock is owned */
/*
* MADT sub-structures (Follow MULTIPLE_APIC_DESCRIPTION_TABLE)
* Common FACS - This is a version-independent FACS structure used for internal use only
*/
#define APIC_HEADER_DEF /* Common APIC sub-structure header */\
u8 type; \
u8 length;
struct apic_header {
APIC_HEADER_DEF};
/* Values for MPS INTI flags */
#define POLARITY_CONFORMS 0
#define POLARITY_ACTIVE_HIGH 1
#define POLARITY_RESERVED 2
#define POLARITY_ACTIVE_LOW 3
#define TRIGGER_CONFORMS 0
#define TRIGGER_EDGE 1
#define TRIGGER_RESERVED 2
#define TRIGGER_LEVEL 3
/* Common flag definitions (16 bits each) */
#define MPS_INTI_FLAGS \
u8 polarity : 2; /* 00-01: Polarity of APIC I/O input signals */\
u8 trigger_mode : 2; /* 02-03: Trigger mode of APIC input signals */\
u8 : 4; /* 04-07: Reserved, must be zero */\
u8 reserved1; /* 08-15: Reserved, must be zero */
#define LOCAL_APIC_FLAGS \
u8 processor_enabled: 1; /* 00: Processor is usable if set */\
u8 : 7; /* 01-07: Reserved, must be zero */\
u8 reserved2; /* 08-15: Reserved, must be zero */
/* Sub-structures for MADT */
struct madt_processor_apic {
APIC_HEADER_DEF u8 processor_id; /* ACPI processor id */
u8 local_apic_id; /* Processor's local APIC id */
LOCAL_APIC_FLAGS};
struct madt_io_apic {
APIC_HEADER_DEF u8 io_apic_id; /* I/O APIC ID */
u8 reserved; /* Reserved - must be zero */
u32 address; /* APIC physical address */
u32 interrupt; /* Global system interrupt where INTI
* lines start */
struct acpi_common_facs {
u32 *global_lock;
u64 *firmware_waking_vector;
u8 vector_width;
};
struct madt_interrupt_override {
APIC_HEADER_DEF u8 bus; /* 0 - ISA */
u8 source; /* Interrupt source (IRQ) */
u32 interrupt; /* Global system interrupt */
MPS_INTI_FLAGS};
/*******************************************************************************
*
* FADT - Fixed ACPI Description Table (Signature "FACP")
*
******************************************************************************/
struct madt_nmi_source {
APIC_HEADER_DEF MPS_INTI_FLAGS u32 interrupt; /* Global system interrupt */
};
/* Fields common to all versions of the FADT */
struct madt_local_apic_nmi {
APIC_HEADER_DEF u8 processor_id; /* ACPI processor id */
MPS_INTI_FLAGS u8 lint; /* LINTn to which NMI is connected */
};
#define ACPI_FADT_COMMON \
ACPI_TABLE_HEADER_DEF \
u32 V1_firmware_ctrl; /* 32-bit physical address of FACS */ \
u32 V1_dsdt; /* 32-bit physical address of DSDT */ \
u8 reserved1; /* System Interrupt Model isn't used in ACPI 2.0*/ \
u8 prefer_PM_profile; /* Conveys preferred power management profile to OSPM. */ \
u16 sci_int; /* System vector of SCI interrupt */ \
u32 smi_cmd; /* Port address of SMI command port */ \
u8 acpi_enable; /* Value to write to smi_cmd to enable ACPI */ \
u8 acpi_disable; /* Value to write to smi_cmd to disable ACPI */ \
u8 S4bios_req; /* Value to write to SMI CMD to enter S4BIOS state */ \
u8 pstate_cnt; /* Processor performance state control*/ \
u32 V1_pm1a_evt_blk; /* Port address of Power Mgt 1a Event Reg Blk */ \
u32 V1_pm1b_evt_blk; /* Port address of Power Mgt 1b Event Reg Blk */ \
u32 V1_pm1a_cnt_blk; /* Port address of Power Mgt 1a Control Reg Blk */ \
u32 V1_pm1b_cnt_blk; /* Port address of Power Mgt 1b Control Reg Blk */ \
u32 V1_pm2_cnt_blk; /* Port address of Power Mgt 2 Control Reg Blk */ \
u32 V1_pm_tmr_blk; /* Port address of Power Mgt Timer Ctrl Reg Blk */ \
u32 V1_gpe0_blk; /* Port addr of General Purpose acpi_event 0 Reg Blk */ \
u32 V1_gpe1_blk; /* Port addr of General Purpose acpi_event 1 Reg Blk */ \
u8 pm1_evt_len; /* Byte Length of ports at pm1_x_evt_blk */ \
u8 pm1_cnt_len; /* Byte Length of ports at pm1_x_cnt_blk */ \
u8 pm2_cnt_len; /* Byte Length of ports at pm2_cnt_blk */ \
u8 pm_tm_len; /* Byte Length of ports at pm_tm_blk */ \
u8 gpe0_blk_len; /* Byte Length of ports at gpe0_blk */ \
u8 gpe1_blk_len; /* Byte Length of ports at gpe1_blk */ \
u8 gpe1_base; /* Offset in gpe model where gpe1 events start */ \
u8 cst_cnt; /* Support for the _CST object and C States change notification.*/ \
u16 plvl2_lat; /* Worst case HW latency to enter/exit C2 state */ \
u16 plvl3_lat; /* Worst case HW latency to enter/exit C3 state */ \
u16 flush_size; /* Processor's memory cache line width, in bytes */ \
u16 flush_stride; /* Number of flush strides that need to be read */ \
u8 duty_offset; /* Processor's duty cycle index in processor's P_CNT reg*/ \
u8 duty_width; /* Processor's duty cycle value bit width in P_CNT register.*/ \
u8 day_alrm; /* Index to day-of-month alarm in RTC CMOS RAM */ \
u8 mon_alrm; /* Index to month-of-year alarm in RTC CMOS RAM */ \
u8 century; /* Index to century in RTC CMOS RAM */ \
u16 iapc_boot_arch; /* IA-PC Boot Architecture Flags. See Table 5-10 for description*/ \
u8 reserved2; /* Reserved, must be zero */
struct madt_address_override {
APIC_HEADER_DEF u16 reserved; /* Reserved, must be zero */
u64 address; /* APIC physical address */
};
/*
* ACPI 2.0+ FADT
*/
struct fadt_descriptor {
ACPI_FADT_COMMON
/* Flags (32 bits) */
u8 wb_invd:1; /* 00: The wbinvd instruction works properly */
u8 wb_invd_flush:1; /* 01: The wbinvd flushes but does not invalidate */
u8 proc_c1:1; /* 02: All processors support C1 state */
u8 plvl2_up:1; /* 03: C2 state works on MP system */
u8 pwr_button:1; /* 04: Power button is handled as a generic feature */
u8 sleep_button:1; /* 05: Sleep button is handled as a generic feature, or not present */
u8 fixed_rTC:1; /* 06: RTC wakeup stat not in fixed register space */
u8 rtcs4:1; /* 07: RTC wakeup stat not possible from S4 */
u8 tmr_val_ext:1; /* 08: tmr_val is 32 bits 0=24-bits */
u8 dock_cap:1; /* 09: Docking supported */
u8 reset_reg_sup:1; /* 10: System reset via the FADT RESET_REG supported */
u8 sealed_case:1; /* 11: No internal expansion capabilities and case is sealed */
u8 headless:1; /* 12: No local video capabilities or local input devices */
u8 cpu_sw_sleep:1; /* 13: Must execute native instruction after writing SLP_TYPx register */
struct madt_io_sapic {
APIC_HEADER_DEF u8 io_sapic_id; /* I/O SAPIC ID */
u8 reserved; /* Reserved, must be zero */
u32 interrupt_base; /* Glocal interrupt for SAPIC start */
u64 address; /* SAPIC physical address */
};
u8 pci_exp_wak:1; /* 14: System supports PCIEXP_WAKE (STS/EN) bits (ACPI 3.0) */
u8 use_platform_clock:1; /* 15: OSPM should use platform-provided timer (ACPI 3.0) */
u8 S4rtc_sts_valid:1; /* 16: Contents of RTC_STS valid after S4 wake (ACPI 3.0) */
u8 remote_power_on_capable:1; /* 17: System is compatible with remote power on (ACPI 3.0) */
u8 force_apic_cluster_model:1; /* 18: All local APICs must use cluster model (ACPI 3.0) */
u8 force_apic_physical_destination_mode:1; /* 19: All local x_aPICs must use physical dest mode (ACPI 3.0) */
u8:4; /* 20-23: Reserved, must be zero */
u8 reserved3; /* 24-31: Reserved, must be zero */
struct madt_local_sapic {
APIC_HEADER_DEF u8 processor_id; /* ACPI processor id */
u8 local_sapic_id; /* SAPIC ID */
u8 local_sapic_eid; /* SAPIC EID */
u8 reserved[3]; /* Reserved, must be zero */
LOCAL_APIC_FLAGS u32 processor_uID; /* Numeric UID - ACPI 3.0 */
char processor_uIDstring[1]; /* String UID - ACPI 3.0 */
};
struct madt_interrupt_source {
APIC_HEADER_DEF MPS_INTI_FLAGS u8 interrupt_type; /* 1=PMI, 2=INIT, 3=corrected */
u8 processor_id; /* Processor ID */
u8 processor_eid; /* Processor EID */
u8 io_sapic_vector; /* Vector value for PMI interrupts */
u32 interrupt; /* Global system interrupt */
u32 flags; /* Interrupt Source Flags */
struct acpi_generic_address reset_register; /* Reset register address in GAS format */
u8 reset_value; /* Value to write to the reset_register port to reset the system */
u8 reserved4[3]; /* These three bytes must be zero */
u64 xfirmware_ctrl; /* 64-bit physical address of FACS */
u64 Xdsdt; /* 64-bit physical address of DSDT */
struct acpi_generic_address xpm1a_evt_blk; /* Extended Power Mgt 1a acpi_event Reg Blk address */
struct acpi_generic_address xpm1b_evt_blk; /* Extended Power Mgt 1b acpi_event Reg Blk address */
struct acpi_generic_address xpm1a_cnt_blk; /* Extended Power Mgt 1a Control Reg Blk address */
struct acpi_generic_address xpm1b_cnt_blk; /* Extended Power Mgt 1b Control Reg Blk address */
struct acpi_generic_address xpm2_cnt_blk; /* Extended Power Mgt 2 Control Reg Blk address */
struct acpi_generic_address xpm_tmr_blk; /* Extended Power Mgt Timer Ctrl Reg Blk address */
struct acpi_generic_address xgpe0_blk; /* Extended General Purpose acpi_event 0 Reg Blk address */
struct acpi_generic_address xgpe1_blk; /* Extended General Purpose acpi_event 1 Reg Blk address */
};
/*
* Smart Battery
* "Down-revved" ACPI 2.0 FADT descriptor
* Defined here to allow compiler to generate the length of the struct
*/
struct smart_battery_table {
ACPI_TABLE_HEADER_DEF u32 warning_level;
u32 low_level;
u32 critical_level;
struct fadt_descriptor_rev2_minus {
ACPI_FADT_COMMON u32 flags;
struct acpi_generic_address reset_register; /* Reset register address in GAS format */
u8 reset_value; /* Value to write to the reset_register port to reset the system. */
u8 reserved7[3]; /* Reserved, must be zero */
};
/*
* ACPI 1.0 FADT
* Defined here to allow compiler to generate the length of the struct
*/
struct fadt_descriptor_rev1 {
ACPI_FADT_COMMON u32 flags;
};
/* FADT: Prefered Power Management Profiles */
#define PM_UNSPECIFIED 0
#define PM_DESKTOP 1
#define PM_MOBILE 2
#define PM_WORKSTATION 3
#define PM_ENTERPRISE_SERVER 4
#define PM_SOHO_SERVER 5
#define PM_APPLIANCE_PC 6
/* FADT: Boot Arch Flags */
#define BAF_LEGACY_DEVICES 0x0001
#define BAF_8042_KEYBOARD_CONTROLLER 0x0002
#define FADT2_REVISION_ID 3
#define FADT2_MINUS_REVISION_ID 2
/* Reset to default packing */
#pragma pack()
/*
* This macro is temporary until the table bitfield flag definitions
* are removed and replaced by a Flags field.
*/
#define ACPI_FLAG_OFFSET(d,f,o) (u8) (ACPI_OFFSET (d,f) + \
sizeof(((d *)0)->f) + o)
/*
* Get the remaining ACPI tables
*/
#include "actbl1.h"
/*
* ACPI Table information. We save the table address, length,
* and type of memory allocation (mapped or allocated) for each
@ -290,27 +354,17 @@ struct acpi_table_support {
u8 flags;
};
/*
* Get the ACPI version-specific tables
*/
#include "actbl1.h" /* Acpi 1.0 table definitions */
#include "actbl2.h" /* Acpi 2.0 table definitions */
extern u8 acpi_fadt_is_v1; /* is set to 1 if FADT is revision 1,
* needed for certain workarounds */
/* Macros used to generate offsets to specific table fields */
#pragma pack(1)
/*
* High performance timer
*/
struct hpet_table {
ACPI_TABLE_HEADER_DEF u32 hardware_id;
struct acpi_generic_address base_address;
u8 hpet_number;
u16 clock_tick;
u8 attributes;
};
#define ACPI_FACS_OFFSET(f) (u8) ACPI_OFFSET (struct facs_descriptor,f)
#define ACPI_FADT_OFFSET(f) (u8) ACPI_OFFSET (struct fadt_descriptor, f)
#define ACPI_GAS_OFFSET(f) (u8) ACPI_OFFSET (struct acpi_generic_address,f)
#define ACPI_HDR_OFFSET(f) (u8) ACPI_OFFSET (struct acpi_table_header,f)
#define ACPI_RSDP_OFFSET(f) (u8) ACPI_OFFSET (struct rsdp_descriptor,f)
#pragma pack()
#define ACPI_FADT_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (struct fadt_descriptor,f,o)
#define ACPI_FACS_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (struct facs_descriptor,f,o)
#endif /* __ACTBL_H__ */

639
include/acpi/actbl1.h
View file

@ -1,6 +1,6 @@
/******************************************************************************
*
* Name: actbl1.h - ACPI 1.0 tables
* Name: actbl1.h - Additional ACPI table definitions
*
*****************************************************************************/
@ -44,92 +44,599 @@
#ifndef __ACTBL1_H__
#define __ACTBL1_H__
/*******************************************************************************
*
* Additional ACPI Tables
*
* These tables are not consumed directly by the ACPICA subsystem, but are
* included here to support device drivers and the AML disassembler.
*
******************************************************************************/
/*
* Values for description table header signatures. Useful because they make
* it more difficult to inadvertently type in the wrong signature.
*/
#define ACPI_SIG_ASF "ASF!" /* Alert Standard Format table */
#define ACPI_SIG_BOOT "BOOT" /* Simple Boot Flag Table */
#define ACPI_SIG_CPEP "CPEP" /* Corrected Platform Error Polling table */
#define ACPI_SIG_DBGP "DBGP" /* Debug Port table */
#define ACPI_SIG_ECDT "ECDT" /* Embedded Controller Boot Resources Table */
#define ACPI_SIG_HPET "HPET" /* High Precision Event Timer table */
#define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */
#define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */
#define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */
#define ACPI_SIG_SLIT "SLIT" /* System Locality Distance Information Table */
#define ACPI_SIG_SPCR "SPCR" /* Serial Port Console Redirection table */
#define ACPI_SIG_SPMI "SPMI" /* Server Platform Management Interface table */
#define ACPI_SIG_SRAT "SRAT" /* System Resource Affinity Table */
#define ACPI_SIG_TCPA "TCPA" /* Trusted Computing Platform Alliance table */
#define ACPI_SIG_WDRT "WDRT" /* Watchdog Resource Table */
/* Legacy names */
#define APIC_SIG "APIC" /* Multiple APIC Description Table */
#define BOOT_SIG "BOOT" /* Simple Boot Flag Table */
#define SBST_SIG "SBST" /* Smart Battery Specification Table */
/*
* All tables must be byte-packed to match the ACPI specification, since
* the tables are provided by the system BIOS.
*/
#pragma pack(1)
/*
* ACPI 1.0 Root System Description Table (RSDT)
* Note about bitfields: The u8 type is used for bitfields in ACPI tables.
* This is the only type that is even remotely portable. Anything else is not
* portable, so do not use any other bitfield types.
*/
struct rsdt_descriptor_rev1 {
ACPI_TABLE_HEADER_DEF /* ACPI common table header */
u32 table_offset_entry[1]; /* Array of pointers to ACPI tables */
};
/*******************************************************************************
*
* ASF - Alert Standard Format table (Signature "ASF!")
*
******************************************************************************/
struct acpi_table_asf {
ACPI_TABLE_HEADER_DEF};
#define ACPI_ASF_HEADER_DEF \
u8 type; \
u8 reserved; \
u16 length;
struct acpi_asf_header {
ACPI_ASF_HEADER_DEF};
/* Values for Type field */
#define ASF_INFO 0
#define ASF_ALERT 1
#define ASF_CONTROL 2
#define ASF_BOOT 3
#define ASF_ADDRESS 4
#define ASF_RESERVED 5
/*
* ACPI 1.0 Firmware ACPI Control Structure (FACS)
* ASF subtables
*/
struct facs_descriptor_rev1 {
char signature[4]; /* ASCII table signature */
u32 length; /* Length of structure in bytes */
u32 hardware_signature; /* Hardware configuration signature */
u32 firmware_waking_vector; /* ACPI OS waking vector */
u32 global_lock; /* Global Lock */
/* 0: ASF Information */
struct acpi_asf_info {
ACPI_ASF_HEADER_DEF u8 min_reset_value;
u8 min_poll_interval;
u16 system_id;
u32 mfg_id;
u8 flags;
u8 reserved2[3];
};
/* 1: ASF Alerts */
struct acpi_asf_alert {
ACPI_ASF_HEADER_DEF u8 assert_mask;
u8 deassert_mask;
u8 alerts;
u8 data_length;
u8 array[1];
};
/* 2: ASF Remote Control */
struct acpi_asf_remote {
ACPI_ASF_HEADER_DEF u8 controls;
u8 data_length;
u16 reserved2;
u8 array[1];
};
/* 3: ASF RMCP Boot Options */
struct acpi_asf_rmcp {
ACPI_ASF_HEADER_DEF u8 capabilities[7];
u8 completion_code;
u32 enterprise_id;
u8 command;
u16 parameter;
u16 boot_options;
u16 oem_parameters;
};
/* 4: ASF Address */
struct acpi_asf_address {
ACPI_ASF_HEADER_DEF u8 eprom_address;
u8 devices;
u8 smbus_addresses[1];
};
/*******************************************************************************
*
* BOOT - Simple Boot Flag Table
*
******************************************************************************/
struct acpi_table_boot {
ACPI_TABLE_HEADER_DEF u8 cmos_index; /* Index in CMOS RAM for the boot register */
u8 reserved[3];
};
/*******************************************************************************
*
* CPEP - Corrected Platform Error Polling table
*
******************************************************************************/
struct acpi_table_cpep {
ACPI_TABLE_HEADER_DEF u64 reserved;
};
/* Subtable */
struct acpi_cpep_polling {
u8 type;
u8 length;
u8 processor_id; /* Processor ID */
u8 processor_eid; /* Processor EID */
u32 polling_interval; /* Polling interval (msec) */
};
/*******************************************************************************
*
* DBGP - Debug Port table
*
******************************************************************************/
struct acpi_table_dbgp {
ACPI_TABLE_HEADER_DEF u8 interface_type; /* 0=full 16550, 1=subset of 16550 */
u8 reserved[3];
struct acpi_generic_address debug_port;
};
/*******************************************************************************
*
* ECDT - Embedded Controller Boot Resources Table
*
******************************************************************************/
struct ec_boot_resources {
ACPI_TABLE_HEADER_DEF struct acpi_generic_address ec_control; /* Address of EC command/status register */
struct acpi_generic_address ec_data; /* Address of EC data register */
u32 uid; /* Unique ID - must be same as the EC _UID method */
u8 gpe_bit; /* The GPE for the EC */
u8 ec_id[1]; /* Full namepath of the EC in the ACPI namespace */
};
/*******************************************************************************
*
* HPET - High Precision Event Timer table
*
******************************************************************************/
struct acpi_hpet_table {
ACPI_TABLE_HEADER_DEF u32 hardware_id; /* Hardware ID of event timer block */
struct acpi_generic_address base_address; /* Address of event timer block */
u8 hpet_number; /* HPET sequence number */
u16 clock_tick; /* Main counter min tick, periodic mode */
u8 attributes;
};
#if 0 /* HPET flags to be converted to macros */
struct { /* Flags (8 bits) */
u8 page_protect:1; /* 00: No page protection */
u8 page_protect4:1; /* 01: 4_kB page protected */
u8 page_protect64:1; /* 02: 64_kB page protected */
u8:5; /* 03-07: Reserved, must be zero */
} flags;
#endif
/*******************************************************************************
*
* MADT - Multiple APIC Description Table
*
******************************************************************************/
struct multiple_apic_table {
ACPI_TABLE_HEADER_DEF u32 local_apic_address; /* Physical address of local APIC */
/* Flags (32 bits) */
u8 S4bios_f:1; /* 00: S4BIOS support is present */
u8 PCATcompat:1; /* 00: System also has dual 8259s */
u8:7; /* 01-07: Reserved, must be zero */
u8 reserved1[3]; /* 08-31: Reserved, must be zero */
u8 reserved2[40]; /* Reserved, must be zero */
};
/* Values for MADT PCATCompat */
#define DUAL_PIC 0
#define MULTIPLE_APIC 1
/* Common MADT Sub-table header */
#define APIC_HEADER_DEF \
u8 type; \
u8 length;
struct apic_header {
APIC_HEADER_DEF};
/* Values for Type in struct apic_header */
#define APIC_PROCESSOR 0
#define APIC_IO 1
#define APIC_XRUPT_OVERRIDE 2
#define APIC_NMI 3
#define APIC_LOCAL_NMI 4
#define APIC_ADDRESS_OVERRIDE 5
#define APIC_IO_SAPIC 6
#define APIC_LOCAL_SAPIC 7
#define APIC_XRUPT_SOURCE 8
#define APIC_RESERVED 9 /* 9 and greater are reserved */
/* Flag definitions for MADT sub-tables */
#define ACPI_MADT_IFLAGS /* INTI flags (16 bits) */ \
u8 polarity : 2; /* 00-01: Polarity of APIC I/O input signals */\
u8 trigger_mode : 2; /* 02-03: Trigger mode of APIC input signals */\
u8 : 4; /* 04-07: Reserved, must be zero */\
u8 reserved1; /* 08-15: Reserved, must be zero */
#define ACPI_MADT_LFLAGS /* Local Sapic flags (32 bits) */ \
u8 processor_enabled: 1; /* 00: Processor is usable if set */\
u8 : 7; /* 01-07: Reserved, must be zero */\
u8 reserved2[3]; /* 08-31: Reserved, must be zero */
/* Values for MPS INTI flags */
#define POLARITY_CONFORMS 0
#define POLARITY_ACTIVE_HIGH 1
#define POLARITY_RESERVED 2
#define POLARITY_ACTIVE_LOW 3
#define TRIGGER_CONFORMS 0
#define TRIGGER_EDGE 1
#define TRIGGER_RESERVED 2
#define TRIGGER_LEVEL 3
/*
* ACPI 1.0 Fixed ACPI Description Table (FADT)
* MADT Sub-tables, correspond to Type in struct apic_header
*/
struct fadt_descriptor_rev1 {
ACPI_TABLE_HEADER_DEF /* ACPI common table header */
u32 firmware_ctrl; /* Physical address of FACS */
u32 dsdt; /* Physical address of DSDT */
u8 model; /* System Interrupt Model */
u8 reserved1; /* Reserved, must be zero */
u16 sci_int; /* System vector of SCI interrupt */
u32 smi_cmd; /* Port address of SMI command port */
u8 acpi_enable; /* Value to write to smi_cmd to enable ACPI */
u8 acpi_disable; /* Value to write to smi_cmd to disable ACPI */
u8 S4bios_req; /* Value to write to SMI CMD to enter S4BIOS state */
u8 reserved2; /* Reserved, must be zero */
u32 pm1a_evt_blk; /* Port address of Power Mgt 1a acpi_event Reg Blk */
u32 pm1b_evt_blk; /* Port address of Power Mgt 1b acpi_event Reg Blk */
u32 pm1a_cnt_blk; /* Port address of Power Mgt 1a Control Reg Blk */
u32 pm1b_cnt_blk; /* Port address of Power Mgt 1b Control Reg Blk */
u32 pm2_cnt_blk; /* Port address of Power Mgt 2 Control Reg Blk */
u32 pm_tmr_blk; /* Port address of Power Mgt Timer Ctrl Reg Blk */
u32 gpe0_blk; /* Port addr of General Purpose acpi_event 0 Reg Blk */
u32 gpe1_blk; /* Port addr of General Purpose acpi_event 1 Reg Blk */
u8 pm1_evt_len; /* Byte length of ports at pm1_x_evt_blk */
u8 pm1_cnt_len; /* Byte length of ports at pm1_x_cnt_blk */
u8 pm2_cnt_len; /* Byte Length of ports at pm2_cnt_blk */
u8 pm_tm_len; /* Byte Length of ports at pm_tm_blk */
u8 gpe0_blk_len; /* Byte Length of ports at gpe0_blk */
u8 gpe1_blk_len; /* Byte Length of ports at gpe1_blk */
u8 gpe1_base; /* Offset in gpe model where gpe1 events start */
u8 reserved3; /* Reserved, must be zero */
u16 plvl2_lat; /* Worst case HW latency to enter/exit C2 state */
u16 plvl3_lat; /* Worst case HW latency to enter/exit C3 state */
u16 flush_size; /* Size of area read to flush caches */
u16 flush_stride; /* Stride used in flushing caches */
u8 duty_offset; /* Bit location of duty cycle field in p_cnt reg */
u8 duty_width; /* Bit width of duty cycle field in p_cnt reg */
u8 day_alrm; /* Index to day-of-month alarm in RTC CMOS RAM */
u8 mon_alrm; /* Index to month-of-year alarm in RTC CMOS RAM */
u8 century; /* Index to century in RTC CMOS RAM */
u8 reserved4[3]; /* Reserved, must be zero */
/* 0: processor APIC */
struct madt_processor_apic {
APIC_HEADER_DEF u8 processor_id; /* ACPI processor id */
u8 local_apic_id; /* Processor's local APIC id */
ACPI_MADT_LFLAGS};
/* 1: IO APIC */
struct madt_io_apic {
APIC_HEADER_DEF u8 io_apic_id; /* I/O APIC ID */
u8 reserved; /* Reserved - must be zero */
u32 address; /* APIC physical address */
u32 interrupt; /* Global system interrupt where INTI lines start */
};
/* 2: Interrupt Override */
struct madt_interrupt_override {
APIC_HEADER_DEF u8 bus; /* 0 - ISA */
u8 source; /* Interrupt source (IRQ) */
u32 interrupt; /* Global system interrupt */
ACPI_MADT_IFLAGS};
/* 3: NMI Sources */
struct madt_nmi_source {
APIC_HEADER_DEF ACPI_MADT_IFLAGS u32 interrupt; /* Global system interrupt */
};
/* 4: Local APIC NMI */
struct madt_local_apic_nmi {
APIC_HEADER_DEF u8 processor_id; /* ACPI processor id */
ACPI_MADT_IFLAGS u8 lint; /* LINTn to which NMI is connected */
};
/* 5: Address Override */
struct madt_address_override {
APIC_HEADER_DEF u16 reserved; /* Reserved, must be zero */
u64 address; /* APIC physical address */
};
/* 6: I/O Sapic */
struct madt_io_sapic {
APIC_HEADER_DEF u8 io_sapic_id; /* I/O SAPIC ID */
u8 reserved; /* Reserved, must be zero */
u32 interrupt_base; /* Glocal interrupt for SAPIC start */
u64 address; /* SAPIC physical address */
};
/* 7: Local Sapic */
struct madt_local_sapic {
APIC_HEADER_DEF u8 processor_id; /* ACPI processor id */
u8 local_sapic_id; /* SAPIC ID */
u8 local_sapic_eid; /* SAPIC EID */
u8 reserved[3]; /* Reserved, must be zero */
ACPI_MADT_LFLAGS u32 processor_uID; /* Numeric UID - ACPI 3.0 */
char processor_uIDstring[1]; /* String UID - ACPI 3.0 */
};
/* 8: Platform Interrupt Source */
struct madt_interrupt_source {
APIC_HEADER_DEF ACPI_MADT_IFLAGS u8 interrupt_type; /* 1=PMI, 2=INIT, 3=corrected */
u8 processor_id; /* Processor ID */
u8 processor_eid; /* Processor EID */
u8 io_sapic_vector; /* Vector value for PMI interrupts */
u32 interrupt; /* Global system interrupt */
u32 flags; /* Interrupt Source Flags */
};
#ifdef DUPLICATE_DEFINITION_WITH_LINUX_ACPI_H
/*******************************************************************************
*
* MCFG - PCI Memory Mapped Configuration table and sub-table
*
******************************************************************************/
struct acpi_table_mcfg {
ACPI_TABLE_HEADER_DEF u8 reserved[8];
};
struct acpi_mcfg_allocation {
u64 base_address; /* Base address, processor-relative */
u16 pci_segment; /* PCI segment group number */
u8 start_bus_number; /* Starting PCI Bus number */
u8 end_bus_number; /* Final PCI Bus number */
u32 reserved;
};
#endif
/*******************************************************************************
*
* SBST - Smart Battery Specification Table
*
******************************************************************************/
struct smart_battery_table {
ACPI_TABLE_HEADER_DEF u32 warning_level;
u32 low_level;
u32 critical_level;
};
/*******************************************************************************
*
* SLIT - System Locality Distance Information Table
*
******************************************************************************/
struct system_locality_info {
ACPI_TABLE_HEADER_DEF u64 locality_count;
u8 entry[1][1];
};
/*******************************************************************************
*
* SPCR - Serial Port Console Redirection table
*
******************************************************************************/
struct acpi_table_spcr {
ACPI_TABLE_HEADER_DEF u8 interface_type; /* 0=full 16550, 1=subset of 16550 */
u8 reserved[3];
struct acpi_generic_address serial_port;
u8 interrupt_type;
u8 pc_interrupt;
u32 interrupt;
u8 baud_rate;
u8 parity;
u8 stop_bits;
u8 flow_control;
u8 terminal_type;
u8 reserved2;
u16 pci_device_id;
u16 pci_vendor_id;
u8 pci_bus;
u8 pci_device;
u8 pci_function;
u32 pci_flags;
u8 pci_segment;
u32 reserved3;
};
/*******************************************************************************
*
* SPMI - Server Platform Management Interface table
*
******************************************************************************/
struct acpi_table_spmi {
ACPI_TABLE_HEADER_DEF u8 reserved;
u8 interface_type;
u16 spec_revision; /* Version of IPMI */
u8 interrupt_type;
u8 gpe_number; /* GPE assigned */
u8 reserved2;
u8 pci_device_flag;
u32 interrupt;
struct acpi_generic_address ipmi_register;
u8 pci_segment;
u8 pci_bus;
u8 pci_device;
u8 pci_function;
};
/*******************************************************************************
*
* SRAT - System Resource Affinity Table
*
******************************************************************************/
struct system_resource_affinity {
ACPI_TABLE_HEADER_DEF u32 reserved1; /* Must be value '1' */
u64 reserved2; /* Reserved, must be zero */
};
/* SRAT common sub-table header */
#define SRAT_SUBTABLE_HEADER \
u8 type; \
u8 length;
/* Values for Type above */
#define SRAT_CPU_AFFINITY 0
#define SRAT_MEMORY_AFFINITY 1
#define SRAT_RESERVED 2
/* SRAT sub-tables */
struct static_resource_alloc {
SRAT_SUBTABLE_HEADER u8 proximity_domain_lo;
u8 apic_id;
/* Flags (32 bits) */
u8 wb_invd:1; /* 00: The wbinvd instruction works properly */
u8 wb_invd_flush:1; /* 01: The wbinvd flushes but does not invalidate */
u8 proc_c1:1; /* 02: All processors support C1 state */
u8 plvl2_up:1; /* 03: C2 state works on MP system */
u8 pwr_button:1; /* 04: Power button is handled as a generic feature */
u8 sleep_button:1; /* 05: Sleep button is handled as a generic feature, or not present */
u8 fixed_rTC:1; /* 06: RTC wakeup stat not in fixed register space */
u8 rtcs4:1; /* 07: RTC wakeup stat not possible from S4 */
u8 tmr_val_ext:1; /* 08: tmr_val width is 32 bits (0 = 24 bits) */
u8:7; /* 09-15: Reserved, must be zero */
u8 reserved5[2]; /* 16-31: Reserved, must be zero */
u8 enabled:1; /* 00: Use affinity structure */
u8:7; /* 01-07: Reserved, must be zero */
u8 reserved3[3]; /* 08-31: Reserved, must be zero */
u8 local_sapic_eid;
u8 proximity_domain_hi[3];
u32 reserved4; /* Reserved, must be zero */
};
struct memory_affinity {
SRAT_SUBTABLE_HEADER u32 proximity_domain;
u16 reserved3;
u64 base_address;
u64 address_length;
u32 reserved4;
/* Flags (32 bits) */
u8 enabled:1; /* 00: Use affinity structure */
u8 hot_pluggable:1; /* 01: Memory region is hot pluggable */
u8 non_volatile:1; /* 02: Memory is non-volatile */
u8:5; /* 03-07: Reserved, must be zero */
u8 reserved5[3]; /* 08-31: Reserved, must be zero */
u64 reserved6; /* Reserved, must be zero */
};
/*******************************************************************************
*
* TCPA - Trusted Computing Platform Alliance table
*
******************************************************************************/
struct acpi_table_tcpa {
ACPI_TABLE_HEADER_DEF u16 reserved;
u32 max_log_length; /* Maximum length for the event log area */
u64 log_address; /* Address of the event log area */
};
/*******************************************************************************
*
* WDRT - Watchdog Resource Table
*
******************************************************************************/
struct acpi_table_wdrt {
ACPI_TABLE_HEADER_DEF u32 header_length; /* Watchdog Header Length */
u8 pci_segment; /* PCI Segment number */
u8 pci_bus; /* PCI Bus number */
u8 pci_device; /* PCI Device number */
u8 pci_function; /* PCI Function number */
u32 timer_period; /* Period of one timer count (msec) */
u32 max_count; /* Maximum counter value supported */
u32 min_count; /* Minimum counter value */
u8 flags;
u8 reserved[3];
u32 entries; /* Number of watchdog entries that follow */
};
#if 0 /* Flags, will be converted to macros */
u8 enabled:1; /* 00: Timer enabled */
u8:6; /* 01-06: Reserved */
u8 sleep_stop:1; /* 07: Timer stopped in sleep state */
#endif
/* Macros used to generate offsets to specific table fields */
#define ACPI_ASF0_OFFSET(f) (u8) ACPI_OFFSET (struct acpi_asf_info,f)
#define ACPI_ASF1_OFFSET(f) (u8) ACPI_OFFSET (struct acpi_asf_alert,f)
#define ACPI_ASF2_OFFSET(f) (u8) ACPI_OFFSET (struct acpi_asf_remote,f)
#define ACPI_ASF3_OFFSET(f) (u8) ACPI_OFFSET (struct acpi_asf_rmcp,f)
#define ACPI_ASF4_OFFSET(f) (u8) ACPI_OFFSET (struct acpi_asf_address,f)
#define ACPI_BOOT_OFFSET(f) (u8) ACPI_OFFSET (struct acpi_table_boot,f)
#define ACPI_CPEP_OFFSET(f) (u8) ACPI_OFFSET (struct acpi_table_cpep,f)
#define ACPI_CPEP0_OFFSET(f) (u8) ACPI_OFFSET (struct acpi_cpep_polling,f)
#define ACPI_DBGP_OFFSET(f) (u8) ACPI_OFFSET (struct acpi_table_dbgp,f)
#define ACPI_ECDT_OFFSET(f) (u8) ACPI_OFFSET (struct ec_boot_resources,f)
#define ACPI_HPET_OFFSET(f) (u8) ACPI_OFFSET (struct hpet_table,f)
#define ACPI_MADT_OFFSET(f) (u8) ACPI_OFFSET (struct multiple_apic_table,f)
#define ACPI_MADT0_OFFSET(f) (u8) ACPI_OFFSET (struct madt_processor_apic,f)
#define ACPI_MADT1_OFFSET(f) (u8) ACPI_OFFSET (struct madt_io_apic,f)
#define ACPI_MADT2_OFFSET(f) (u8) ACPI_OFFSET (struct madt_interrupt_override,f)
#define ACPI_MADT3_OFFSET(f) (u8) ACPI_OFFSET (struct madt_nmi_source,f)
#define ACPI_MADT4_OFFSET(f) (u8) ACPI_OFFSET (struct madt_local_apic_nmi,f)
#define ACPI_MADT5_OFFSET(f) (u8) ACPI_OFFSET (struct madt_address_override,f)
#define ACPI_MADT6_OFFSET(f) (u8) ACPI_OFFSET (struct madt_io_sapic,f)
#define ACPI_MADT7_OFFSET(f) (u8) ACPI_OFFSET (struct madt_local_sapic,f)
#define ACPI_MADT8_OFFSET(f) (u8) ACPI_OFFSET (struct madt_interrupt_source,f)
#define ACPI_MADTH_OFFSET(f) (u8) ACPI_OFFSET (struct apic_header,f)
#define ACPI_MCFG_OFFSET(f) (u8) ACPI_OFFSET (struct acpi_table_mcfg,f)
#define ACPI_MCFG0_OFFSET(f) (u8) ACPI_OFFSET (struct acpi_mcfg_allocation,f)
#define ACPI_SBST_OFFSET(f) (u8) ACPI_OFFSET (struct smart_battery_table,f)
#define ACPI_SLIT_OFFSET(f) (u8) ACPI_OFFSET (struct system_locality_info,f)
#define ACPI_SPCR_OFFSET(f) (u8) ACPI_OFFSET (struct acpi_table_spcr,f)
#define ACPI_SPMI_OFFSET(f) (u8) ACPI_OFFSET (struct acpi_table_spmi,f)
#define ACPI_SRAT_OFFSET(f) (u8) ACPI_OFFSET (struct system_resource_affinity,f)
#define ACPI_SRAT0_OFFSET(f) (u8) ACPI_OFFSET (struct static_resource_alloc,f)
#define ACPI_SRAT1_OFFSET(f) (u8) ACPI_OFFSET (struct memory_affinity,f)
#define ACPI_TCPA_OFFSET(f) (u8) ACPI_OFFSET (struct acpi_table_tcpa,f)
#define ACPI_WDRT_OFFSET(f) (u8) ACPI_OFFSET (struct acpi_table_wdrt,f)
#define ACPI_HPET_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (struct hpet_table,f,o)
#define ACPI_SRAT0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (struct static_resource_alloc,f,o)
#define ACPI_SRAT1_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (struct memory_affinity,f,o)
#define ACPI_MADT_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (struct multiple_apic_table,f,o)
#define ACPI_MADT0_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (struct madt_processor_apic,f,o)
#define ACPI_MADT2_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (struct madt_interrupt_override,f,o)
#define ACPI_MADT3_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (struct madt_nmi_source,f,o)
#define ACPI_MADT4_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (struct madt_local_apic_nmi,f,o)
#define ACPI_MADT7_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (struct madt_local_sapic,f,o)
#define ACPI_MADT8_FLAG_OFFSET(f,o) ACPI_FLAG_OFFSET (struct madt_interrupt_source,f,o)
/* Reset to default packing */
#pragma pack()
#endif /* __ACTBL1_H__ */

230
include/acpi/actbl2.h
View file

@ -44,234 +44,6 @@
#ifndef __ACTBL2_H__
#define __ACTBL2_H__
/*
* Prefered Power Management Profiles
*/
#define PM_UNSPECIFIED 0
#define PM_DESKTOP 1
#define PM_MOBILE 2
#define PM_WORKSTATION 3
#define PM_ENTERPRISE_SERVER 4
#define PM_SOHO_SERVER 5
#define PM_APPLIANCE_PC 6
/*
* ACPI Boot Arch Flags
*/
#define BAF_LEGACY_DEVICES 0x0001
#define BAF_8042_KEYBOARD_CONTROLLER 0x0002
#define FADT2_REVISION_ID 3
#define FADT2_MINUS_REVISION_ID 2
#pragma pack(1)
/*
* ACPI 2.0 Root System Description Table (RSDT)
*/
struct rsdt_descriptor_rev2 {
ACPI_TABLE_HEADER_DEF /* ACPI common table header */
u32 table_offset_entry[1]; /* Array of pointers to ACPI tables */
};
/*
* ACPI 2.0 Extended System Description Table (XSDT)
*/
struct xsdt_descriptor_rev2 {
ACPI_TABLE_HEADER_DEF /* ACPI common table header */
u64 table_offset_entry[1]; /* Array of pointers to ACPI tables */
};
/*
* ACPI 2.0 Firmware ACPI Control Structure (FACS)
*/
struct facs_descriptor_rev2 {
char signature[4]; /* ASCII table signature */
u32 length; /* Length of structure, in bytes */
u32 hardware_signature; /* Hardware configuration signature */
u32 firmware_waking_vector; /* 32-bit physical address of the Firmware Waking Vector. */
u32 global_lock; /* Global Lock used to synchronize access to shared hardware resources */
/* Flags (32 bits) */
u8 S4bios_f:1; /* 00: S4BIOS support is present */
u8:7; /* 01-07: Reserved, must be zero */
u8 reserved1[3]; /* 08-31: Reserved, must be zero */
u64 xfirmware_waking_vector; /* 64-bit physical address of the Firmware Waking Vector. */
u8 version; /* Version of this table */
u8 reserved3[31]; /* Reserved, must be zero */
};
/*
* ACPI 2.0+ Generic Address Structure (GAS)
*/
struct acpi_generic_address {
u8 address_space_id; /* Address space where struct or register exists. */
u8 register_bit_width; /* Size in bits of given register */
u8 register_bit_offset; /* Bit offset within the register */
u8 access_width; /* Minimum Access size (ACPI 3.0) */
u64 address; /* 64-bit address of struct or register */
};
#define FADT_REV2_COMMON \
u32 V1_firmware_ctrl; /* 32-bit physical address of FACS */ \
u32 V1_dsdt; /* 32-bit physical address of DSDT */ \
u8 reserved1; /* System Interrupt Model isn't used in ACPI 2.0*/ \
u8 prefer_PM_profile; /* Conveys preferred power management profile to OSPM. */ \
u16 sci_int; /* System vector of SCI interrupt */ \
u32 smi_cmd; /* Port address of SMI command port */ \
u8 acpi_enable; /* Value to write to smi_cmd to enable ACPI */ \
u8 acpi_disable; /* Value to write to smi_cmd to disable ACPI */ \
u8 S4bios_req; /* Value to write to SMI CMD to enter S4BIOS state */ \
u8 pstate_cnt; /* Processor performance state control*/ \
u32 V1_pm1a_evt_blk; /* Port address of Power Mgt 1a acpi_event Reg Blk */ \
u32 V1_pm1b_evt_blk; /* Port address of Power Mgt 1b acpi_event Reg Blk */ \
u32 V1_pm1a_cnt_blk; /* Port address of Power Mgt 1a Control Reg Blk */ \
u32 V1_pm1b_cnt_blk; /* Port address of Power Mgt 1b Control Reg Blk */ \
u32 V1_pm2_cnt_blk; /* Port address of Power Mgt 2 Control Reg Blk */ \
u32 V1_pm_tmr_blk; /* Port address of Power Mgt Timer Ctrl Reg Blk */ \
u32 V1_gpe0_blk; /* Port addr of General Purpose acpi_event 0 Reg Blk */ \
u32 V1_gpe1_blk; /* Port addr of General Purpose acpi_event 1 Reg Blk */ \
u8 pm1_evt_len; /* Byte length of ports at pm1_x_evt_blk */ \
u8 pm1_cnt_len; /* Byte length of ports at pm1_x_cnt_blk */ \
u8 pm2_cnt_len; /* Byte Length of ports at pm2_cnt_blk */ \
u8 pm_tm_len; /* Byte Length of ports at pm_tm_blk */ \
u8 gpe0_blk_len; /* Byte Length of ports at gpe0_blk */ \
u8 gpe1_blk_len; /* Byte Length of ports at gpe1_blk */ \
u8 gpe1_base; /* Offset in gpe model where gpe1 events start */ \
u8 cst_cnt; /* Support for the _CST object and C States change notification.*/ \
u16 plvl2_lat; /* Worst case HW latency to enter/exit C2 state */ \
u16 plvl3_lat; /* Worst case HW latency to enter/exit C3 state */ \
u16 flush_size; /* Number of flush strides that need to be read */ \
u16 flush_stride; /* Processor's memory cache line width, in bytes */ \
u8 duty_offset; /* Processor's duty cycle index in processor's P_CNT reg*/ \
u8 duty_width; /* Processor's duty cycle value bit width in P_CNT register.*/ \
u8 day_alrm; /* Index to day-of-month alarm in RTC CMOS RAM */ \
u8 mon_alrm; /* Index to month-of-year alarm in RTC CMOS RAM */ \
u8 century; /* Index to century in RTC CMOS RAM */ \
u16 iapc_boot_arch; /* IA-PC Boot Architecture Flags. See Table 5-10 for description*/
/*
* ACPI 2.0+ Fixed ACPI Description Table (FADT)
*/
struct fadt_descriptor_rev2 {
ACPI_TABLE_HEADER_DEF /* ACPI common table header */
FADT_REV2_COMMON u8 reserved2; /* Reserved, must be zero */
/* Flags (32 bits) */
u8 wb_invd:1; /* 00: The wbinvd instruction works properly */
u8 wb_invd_flush:1; /* 01: The wbinvd flushes but does not invalidate */
u8 proc_c1:1; /* 02: All processors support C1 state */
u8 plvl2_up:1; /* 03: C2 state works on MP system */
u8 pwr_button:1; /* 04: Power button is handled as a generic feature */
u8 sleep_button:1; /* 05: Sleep button is handled as a generic feature, or not present */
u8 fixed_rTC:1; /* 06: RTC wakeup stat not in fixed register space */
u8 rtcs4:1; /* 07: RTC wakeup stat not possible from S4 */
u8 tmr_val_ext:1; /* 08: tmr_val is 32 bits 0=24-bits */
u8 dock_cap:1; /* 09: Docking supported */
u8 reset_reg_sup:1; /* 10: System reset via the FADT RESET_REG supported */
u8 sealed_case:1; /* 11: No internal expansion capabilities and case is sealed */
u8 headless:1; /* 12: No local video capabilities or local input devices */
u8 cpu_sw_sleep:1; /* 13: Must execute native instruction after writing SLP_TYPx register */
u8 pci_exp_wak:1; /* 14: System supports PCIEXP_WAKE (STS/EN) bits (ACPI 3.0) */
u8 use_platform_clock:1; /* 15: OSPM should use platform-provided timer (ACPI 3.0) */
u8 S4rtc_sts_valid:1; /* 16: Contents of RTC_STS valid after S4 wake (ACPI 3.0) */
u8 remote_power_on_capable:1; /* 17: System is compatible with remote power on (ACPI 3.0) */
u8 force_apic_cluster_model:1; /* 18: All local APICs must use cluster model (ACPI 3.0) */
u8 force_apic_physical_destination_mode:1; /* 19: all local x_aPICs must use physical dest mode (ACPI 3.0) */
u8:4; /* 20-23: Reserved, must be zero */
u8 reserved3; /* 24-31: Reserved, must be zero */
struct acpi_generic_address reset_register; /* Reset register address in GAS format */
u8 reset_value; /* Value to write to the reset_register port to reset the system */
u8 reserved4[3]; /* These three bytes must be zero */
u64 xfirmware_ctrl; /* 64-bit physical address of FACS */
u64 Xdsdt; /* 64-bit physical address of DSDT */
struct acpi_generic_address xpm1a_evt_blk; /* Extended Power Mgt 1a acpi_event Reg Blk address */
struct acpi_generic_address xpm1b_evt_blk; /* Extended Power Mgt 1b acpi_event Reg Blk address */
struct acpi_generic_address xpm1a_cnt_blk; /* Extended Power Mgt 1a Control Reg Blk address */
struct acpi_generic_address xpm1b_cnt_blk; /* Extended Power Mgt 1b Control Reg Blk address */
struct acpi_generic_address xpm2_cnt_blk; /* Extended Power Mgt 2 Control Reg Blk address */
struct acpi_generic_address xpm_tmr_blk; /* Extended Power Mgt Timer Ctrl Reg Blk address */
struct acpi_generic_address xgpe0_blk; /* Extended General Purpose acpi_event 0 Reg Blk address */
struct acpi_generic_address xgpe1_blk; /* Extended General Purpose acpi_event 1 Reg Blk address */
};
/* "Down-revved" ACPI 2.0 FADT descriptor */
struct fadt_descriptor_rev2_minus {
ACPI_TABLE_HEADER_DEF /* ACPI common table header */
FADT_REV2_COMMON u8 reserved2; /* Reserved, must be zero */
u32 flags;
struct acpi_generic_address reset_register; /* Reset register address in GAS format */
u8 reset_value; /* Value to write to the reset_register port to reset the system. */
u8 reserved7[3]; /* Reserved, must be zero */
};
/* ECDT - Embedded Controller Boot Resources Table */
struct ec_boot_resources {
ACPI_TABLE_HEADER_DEF struct acpi_generic_address ec_control; /* Address of EC command/status register */
struct acpi_generic_address ec_data; /* Address of EC data register */
u32 uid; /* Unique ID - must be same as the EC _UID method */
u8 gpe_bit; /* The GPE for the EC */
u8 ec_id[1]; /* Full namepath of the EC in the ACPI namespace */
};
/* SRAT - System Resource Affinity Table */
struct static_resource_alloc {
u8 type;
u8 length;
u8 proximity_domain_lo;
u8 apic_id;
/* Flags (32 bits) */
u8 enabled:1; /* 00: Use affinity structure */
u8:7; /* 01-07: Reserved, must be zero */
u8 reserved3[3]; /* 08-31: Reserved, must be zero */
u8 local_sapic_eid;
u8 proximity_domain_hi[3];
u32 reserved4; /* Reserved, must be zero */
};
struct memory_affinity {
u8 type;
u8 length;
u32 proximity_domain;
u16 reserved3;
u64 base_address;
u64 address_length;
u32 reserved4;
/* Flags (32 bits) */
u8 enabled:1; /* 00: Use affinity structure */
u8 hot_pluggable:1; /* 01: Memory region is hot pluggable */
u8 non_volatile:1; /* 02: Memory is non-volatile */
u8:5; /* 03-07: Reserved, must be zero */
u8 reserved5[3]; /* 08-31: Reserved, must be zero */
u64 reserved6; /* Reserved, must be zero */
};
struct system_resource_affinity {
ACPI_TABLE_HEADER_DEF u32 reserved1; /* Must be value '1' */
u64 reserved2; /* Reserved, must be zero */
};
/* SLIT - System Locality Distance Information Table */
struct system_locality_info {
ACPI_TABLE_HEADER_DEF u64 locality_count;
u8 entry[1][1];
};
#pragma pack()
/* Code moved to both actbl.h and actbl1.h */
#endif /* __ACTBL2_H__ */

88
include/acpi/actypes.h
View file

@ -44,6 +44,8 @@
#ifndef __ACTYPES_H__
#define __ACTYPES_H__
/* acpisrc:struct_defs -- for acpisrc conversion */
/*
* ACPI_MACHINE_WIDTH must be specified in an OS- or compiler-dependent header
* and must be either 16, 32, or 64
@ -154,7 +156,6 @@ typedef u64 acpi_physical_address;
#define ACPI_MAX_PTR ACPI_UINT64_MAX
#define ACPI_SIZE_MAX ACPI_UINT64_MAX
#define ALIGNED_ADDRESS_BOUNDARY 0x00000008
#define ACPI_USE_NATIVE_DIVIDE /* Has native 64-bit integer support */
/*
@ -195,8 +196,6 @@ typedef u64 acpi_physical_address;
#define ACPI_MAX_PTR ACPI_UINT32_MAX
#define ACPI_SIZE_MAX ACPI_UINT32_MAX
#define ALIGNED_ADDRESS_BOUNDARY 0x00000004
/*******************************************************************************
*
* Types specific to 16-bit targets
@ -223,7 +222,6 @@ typedef char *acpi_physical_address;
#define ACPI_MAX_PTR ACPI_UINT16_MAX
#define ACPI_SIZE_MAX ACPI_UINT16_MAX
#define ALIGNED_ADDRESS_BOUNDARY 0x00000002
#define ACPI_USE_NATIVE_DIVIDE /* No 64-bit integers, ok to use native divide */
/* 64-bit integers cannot be supported */
@ -254,7 +252,7 @@ typedef acpi_native_uint acpi_size;
/* Use C99 uintptr_t for pointer casting if available, "void *" otherwise */
#ifndef acpi_uintptr_t
#define acpi_uintptr_t void *
#define acpi_uintptr_t void *
#endif
/*
@ -263,7 +261,7 @@ typedef acpi_native_uint acpi_size;
* manager implementation is to be used (ACPI_USE_LOCAL_CACHE)
*/
#ifndef acpi_cache_t
#define acpi_cache_t struct acpi_memory_list
#define acpi_cache_t struct acpi_memory_list
#endif
/*
@ -271,7 +269,7 @@ typedef acpi_native_uint acpi_size;
* lock and unlock OSL interfaces.
*/
#ifndef acpi_cpu_flags
#define acpi_cpu_flags acpi_native_uint
#define acpi_cpu_flags acpi_native_uint
#endif
/*
@ -292,6 +290,21 @@ typedef acpi_native_uint acpi_size;
#define ACPI_UNUSED_VAR
#endif
/*
* All ACPICA functions that are available to the rest of the kernel are
* tagged with this macro which can be defined as appropriate for the host.
*/
#ifndef ACPI_EXPORT_SYMBOL
#define ACPI_EXPORT_SYMBOL(symbol)
#endif
/*
* thread_id is returned by acpi_os_get_thread_id.
*/
#ifndef acpi_thread_id
#define acpi_thread_id acpi_native_uint
#endif
/*******************************************************************************
*
* Independent types
@ -477,15 +490,15 @@ typedef u64 acpi_integer;
*/
typedef u32 acpi_table_type;
#define ACPI_TABLE_RSDP (acpi_table_type) 0
#define ACPI_TABLE_DSDT (acpi_table_type) 1
#define ACPI_TABLE_FADT (acpi_table_type) 2
#define ACPI_TABLE_FACS (acpi_table_type) 3
#define ACPI_TABLE_PSDT (acpi_table_type) 4
#define ACPI_TABLE_SSDT (acpi_table_type) 5
#define ACPI_TABLE_XSDT (acpi_table_type) 6
#define ACPI_TABLE_MAX 6
#define NUM_ACPI_TABLE_TYPES (ACPI_TABLE_MAX+1)
#define ACPI_TABLE_ID_RSDP (acpi_table_type) 0
#define ACPI_TABLE_ID_DSDT (acpi_table_type) 1
#define ACPI_TABLE_ID_FADT (acpi_table_type) 2
#define ACPI_TABLE_ID_FACS (acpi_table_type) 3
#define ACPI_TABLE_ID_PSDT (acpi_table_type) 4
#define ACPI_TABLE_ID_SSDT (acpi_table_type) 5
#define ACPI_TABLE_ID_XSDT (acpi_table_type) 6
#define ACPI_TABLE_ID_MAX 6
#define ACPI_NUM_TABLE_TYPES (ACPI_TABLE_ID_MAX+1)
/*
* Types associated with ACPI names and objects. The first group of
@ -816,7 +829,7 @@ struct acpi_system_info {
u32 debug_level;
u32 debug_layer;
u32 num_table_types;
struct acpi_table_info table_info[NUM_ACPI_TABLE_TYPES];
struct acpi_table_info table_info[ACPI_TABLE_ID_MAX + 1];
};
/*
@ -858,7 +871,7 @@ acpi_status(*acpi_adr_space_handler) (u32 function,
void *handler_context,
void *region_context);
#define ACPI_DEFAULT_HANDLER NULL
#define ACPI_DEFAULT_HANDLER NULL
typedef
acpi_status(*acpi_adr_space_setup) (acpi_handle region_handle,
@ -911,12 +924,13 @@ struct acpi_compatible_id_list {
#define ACPI_STA_DEVICE_PRESENT 0x01
#define ACPI_STA_DEVICE_ENABLED 0x02
#define ACPI_STA_DEVICE_UI 0x04
#define ACPI_STA_DEVICE_OK 0x08
#define ACPI_STA_DEVICE_FUNCTIONING 0x08
#define ACPI_STA_DEVICE_OK 0x08 /* Synonym */
#define ACPI_STA_BATTERY_PRESENT 0x10
#define ACPI_COMMON_OBJ_INFO \
acpi_object_type type; /* ACPI object type */ \
acpi_name name /* ACPI object Name */
acpi_object_type type; /* ACPI object type */ \
acpi_name name /* ACPI object Name */
struct acpi_obj_info_header {
ACPI_COMMON_OBJ_INFO;
@ -957,7 +971,7 @@ struct acpi_mem_space_context {
* Definitions for Resource Attributes
*/
typedef u16 acpi_rs_length; /* Resource Length field is fixed at 16 bits */
typedef u32 acpi_rsdesc_size; /* Max Resource Descriptor size is (length+3) = (64_k-1)+3 */
typedef u32 acpi_rsdesc_size; /* Max Resource Descriptor size is (Length+3) = (64_k-1)+3 */
/*
* Memory Attributes
@ -972,8 +986,8 @@ typedef u32 acpi_rsdesc_size; /* Max Resource Descriptor size is (length+3) = (6
/*
* IO Attributes
* The ISA Io ranges are: n000-n0_ffh, n400-n4_ffh, n800-n8_ffh, n_c00-n_cFFh.
* The non-ISA Io ranges are: n100-n3_ffh, n500-n7_ffh, n900-n_bFfh, n_cd0-n_fFFh.
* The ISA IO ranges are: n000-n0_fFh, n400-n4_fFh, n800-n8_fFh, n_c00-n_cFFh.
* The non-ISA IO ranges are: n100-n3_fFh, n500-n7_fFh, n900-n_bFFh, n_cd0-n_fFFh.
*/
#define ACPI_NON_ISA_ONLY_RANGES (u8) 0x01
#define ACPI_ISA_ONLY_RANGES (u8) 0x02
@ -1171,12 +1185,12 @@ struct acpi_resource_source {
/* Fields common to all address descriptors, 16/32/64 bit */
#define ACPI_RESOURCE_ADDRESS_COMMON \
u8 resource_type; \
u8 producer_consumer; \
u8 decode; \
u8 min_address_fixed; \
u8 max_address_fixed; \
union acpi_resource_attribute info;
u8 resource_type; \
u8 producer_consumer; \
u8 decode; \
u8 min_address_fixed; \
u8 max_address_fixed; \
union acpi_resource_attribute info;
struct acpi_resource_address {
ACPI_RESOURCE_ADDRESS_COMMON};
@ -1297,16 +1311,6 @@ struct acpi_resource {
#define ACPI_NEXT_RESOURCE(res) (struct acpi_resource *)((u8 *) res + res->length)
#ifndef ACPI_MISALIGNMENT_NOT_SUPPORTED
#define ACPI_ALIGN_RESOURCE_SIZE(length) (length)
#else
#define ACPI_ALIGN_RESOURCE_SIZE(length) ACPI_ROUND_UP_TO_NATIVE_WORD(length)
#endif
/*
* END: of definitions for Resource Attributes
*/
struct acpi_pci_routing_table {
u32 length;
u32 pin;
@ -1315,8 +1319,4 @@ struct acpi_pci_routing_table {
char source[4]; /* pad to 64 bits so sizeof() works in all cases */
};
/*
* END: of definitions for PCI Routing tables
*/
#endif /* __ACTYPES_H__ */

95
include/acpi/acutils.h
View file

@ -50,24 +50,24 @@ extern const u8 acpi_gbl_resource_aml_sizes[];
#if defined(ACPI_DISASSEMBLER) || defined (ACPI_DEBUGGER)
extern const char *acpi_gbl_BMdecode[2];
extern const char *acpi_gbl_config_decode[4];
extern const char *acpi_gbl_consume_decode[2];
extern const char *acpi_gbl_DECdecode[2];
extern const char *acpi_gbl_HEdecode[2];
extern const char *acpi_gbl_io_decode[2];
extern const char *acpi_gbl_LLdecode[2];
extern const char *acpi_gbl_max_decode[2];
extern const char *acpi_gbl_MEMdecode[4];
extern const char *acpi_gbl_min_decode[2];
extern const char *acpi_gbl_MTPdecode[4];
extern const char *acpi_gbl_RNGdecode[4];
extern const char *acpi_gbl_RWdecode[2];
extern const char *acpi_gbl_SHRdecode[2];
extern const char *acpi_gbl_SIZdecode[4];
extern const char *acpi_gbl_TRSdecode[2];
extern const char *acpi_gbl_TTPdecode[2];
extern const char *acpi_gbl_TYPdecode[4];
extern const char *acpi_gbl_bm_decode[];
extern const char *acpi_gbl_config_decode[];
extern const char *acpi_gbl_consume_decode[];
extern const char *acpi_gbl_dec_decode[];
extern const char *acpi_gbl_he_decode[];
extern const char *acpi_gbl_io_decode[];
extern const char *acpi_gbl_ll_decode[];
extern const char *acpi_gbl_max_decode[];
extern const char *acpi_gbl_mem_decode[];
extern const char *acpi_gbl_min_decode[];
extern const char *acpi_gbl_mtp_decode[];
extern const char *acpi_gbl_rng_decode[];
extern const char *acpi_gbl_rw_decode[];
extern const char *acpi_gbl_shr_decode[];
extern const char *acpi_gbl_siz_decode[];
extern const char *acpi_gbl_trs_decode[];
extern const char *acpi_gbl_ttp_decode[];
extern const char *acpi_gbl_typ_decode[];
#endif
/* Types for Resource descriptor entries */
@ -77,6 +77,12 @@ extern const char *acpi_gbl_TYPdecode[4];
#define ACPI_VARIABLE_LENGTH 2
#define ACPI_SMALL_VARIABLE_LENGTH 3
typedef
acpi_status(*acpi_walk_aml_callback) (u8 * aml,
u32 length,
u32 offset,
u8 resource_index, void **context);
typedef
acpi_status(*acpi_pkg_callback) (u8 object_type,
union acpi_operand_object * source_object,
@ -277,6 +283,8 @@ acpi_ut_ptr_exit(u32 line_number,
void acpi_ut_dump_buffer(u8 * buffer, u32 count, u32 display, u32 component_id);
void acpi_ut_dump_buffer2(u8 * buffer, u32 count, u32 display);
void acpi_ut_report_error(char *module_name, u32 line_number);
void acpi_ut_report_info(char *module_name, u32 line_number);
@ -445,6 +453,8 @@ acpi_ut_short_divide(acpi_integer in_dividend,
/*
* utmisc
*/
u8 acpi_ut_is_aml_table(struct acpi_table_header *table);
acpi_status acpi_ut_allocate_owner_id(acpi_owner_id * owner_id);
void acpi_ut_release_owner_id(acpi_owner_id * owner_id);
@ -460,7 +470,9 @@ void acpi_ut_print_string(char *string, u8 max_length);
u8 acpi_ut_valid_acpi_name(u32 name);
u8 acpi_ut_valid_acpi_character(char character);
acpi_name acpi_ut_repair_name(acpi_name name);
u8 acpi_ut_valid_acpi_char(char character, acpi_native_uint position);
acpi_status
acpi_ut_strtoul64(char *string, u32 base, acpi_integer * ret_integer);
@ -469,6 +481,25 @@ acpi_ut_strtoul64(char *string, u32 base, acpi_integer * ret_integer);
#define ACPI_ANY_BASE 0
u32 acpi_ut_dword_byte_swap(u32 value);
void acpi_ut_set_integer_width(u8 revision);
#ifdef ACPI_DEBUG_OUTPUT
void
acpi_ut_display_init_pathname(u8 type,
struct acpi_namespace_node *obj_handle,
char *path);
#endif
/*
* utresrc
*/
acpi_status
acpi_ut_walk_aml_resources(u8 * aml,
acpi_size aml_length,
acpi_walk_aml_callback user_function, void **context);
acpi_status acpi_ut_validate_resource(void *aml, u8 * return_index);
u32 acpi_ut_get_descriptor_length(void *aml);
@ -483,20 +514,6 @@ acpi_status
acpi_ut_get_resource_end_tag(union acpi_operand_object *obj_desc,
u8 ** end_tag);
u8 acpi_ut_generate_checksum(u8 * buffer, u32 length);
u32 acpi_ut_dword_byte_swap(u32 value);
void acpi_ut_set_integer_width(u8 revision);
#ifdef ACPI_DEBUG_OUTPUT
void
acpi_ut_display_init_pathname(u8 type,
struct acpi_namespace_node *obj_handle,
char *path);
#endif
/*
* utmutex - mutex support
*/
@ -523,14 +540,15 @@ acpi_ut_initialize_buffer(struct acpi_buffer *buffer,
void *acpi_ut_allocate(acpi_size size, u32 component, char *module, u32 line);
void *acpi_ut_callocate(acpi_size size, u32 component, char *module, u32 line);
void *acpi_ut_allocate_zeroed(acpi_size size,
u32 component, char *module, u32 line);
#ifdef ACPI_DBG_TRACK_ALLOCATIONS
void *acpi_ut_allocate_and_track(acpi_size size,
u32 component, char *module, u32 line);
void *acpi_ut_callocate_and_track(acpi_size size,
u32 component, char *module, u32 line);
void *acpi_ut_allocate_zeroed_and_track(acpi_size size,
u32 component, char *module, u32 line);
void
acpi_ut_free_and_track(void *address, u32 component, char *module, u32 line);
@ -540,6 +558,11 @@ void acpi_ut_dump_allocation_info(void);
#endif /* ACPI_FUTURE_USAGE */
void acpi_ut_dump_allocations(u32 component, char *module);
acpi_status
acpi_ut_create_list(char *list_name,
u16 object_size, struct acpi_memory_list **return_cache);
#endif
#endif /* _ACUTILS_H */

6
include/acpi/amlcode.h
View file

@ -180,8 +180,10 @@
#define AML_BANK_FIELD_OP (u16) 0x5b87
#define AML_DATA_REGION_OP (u16) 0x5b88 /* ACPI 2.0 */
/* Bogus opcodes (they are actually two separate opcodes) */
/*
* Combination opcodes (actually two one-byte opcodes)
* Used by the disassembler and i_aSL compiler
*/
#define AML_LGREATEREQUAL_OP (u16) 0x9295
#define AML_LLESSEQUAL_OP (u16) 0x9294
#define AML_LNOTEQUAL_OP (u16) 0x9293

85
include/acpi/amlresrc.h
View file

@ -42,39 +42,45 @@
* POSSIBILITY OF SUCH DAMAGES.
*/
/* acpisrc:struct_defs -- for acpisrc conversion */
#ifndef __AMLRESRC_H
#define __AMLRESRC_H
#define ASL_RESNAME_ADDRESS "_ADR"
#define ASL_RESNAME_ALIGNMENT "_ALN"
#define ASL_RESNAME_ADDRESSSPACE "_ASI"
#define ASL_RESNAME_ACCESSSIZE "_ASZ"
#define ASL_RESNAME_TYPESPECIFICATTRIBUTES "_ATT"
#define ASL_RESNAME_BASEADDRESS "_BAS"
#define ASL_RESNAME_BUSMASTER "_BM_" /* Master(1), Slave(0) */
#define ASL_RESNAME_DECODE "_DEC"
#define ASL_RESNAME_DMA "_DMA"
#define ASL_RESNAME_DMATYPE "_TYP" /* Compatible(0), A(1), B(2), F(3) */
#define ASL_RESNAME_GRANULARITY "_GRA"
#define ASL_RESNAME_INTERRUPT "_INT"
#define ASL_RESNAME_INTERRUPTLEVEL "_LL_" /* active_lo(1), active_hi(0) */
#define ASL_RESNAME_INTERRUPTSHARE "_SHR" /* Shareable(1), no_share(0) */
#define ASL_RESNAME_INTERRUPTTYPE "_HE_" /* Edge(1), Level(0) */
#define ASL_RESNAME_LENGTH "_LEN"
#define ASL_RESNAME_MEMATTRIBUTES "_MTP" /* Memory(0), Reserved(1), ACPI(2), NVS(3) */
#define ASL_RESNAME_MEMTYPE "_MEM" /* non_cache(0), Cacheable(1) Cache+combine(2), Cache+prefetch(3) */
#define ASL_RESNAME_MAXADDR "_MAX"
#define ASL_RESNAME_MINADDR "_MIN"
#define ASL_RESNAME_MAXTYPE "_MAF"
#define ASL_RESNAME_MINTYPE "_MIF"
#define ASL_RESNAME_REGISTERBITOFFSET "_RBO"
#define ASL_RESNAME_REGISTERBITWIDTH "_RBW"
#define ASL_RESNAME_RANGETYPE "_RNG"
#define ASL_RESNAME_READWRITETYPE "_RW_" /* read_only(0), Writeable (1) */
#define ASL_RESNAME_TRANSLATION "_TRA"
#define ASL_RESNAME_TRANSTYPE "_TRS" /* Sparse(1), Dense(0) */
#define ASL_RESNAME_TYPE "_TTP" /* Translation(1), Static (0) */
#define ASL_RESNAME_XFERTYPE "_SIz" /* 8(0), 8_and16(1), 16(2) */
/*
* Resource descriptor tags, as defined in the ACPI specification.
* Used to symbolically reference fields within a descriptor.
*/
#define ACPI_RESTAG_ADDRESS "_ADR"
#define ACPI_RESTAG_ALIGNMENT "_ALN"
#define ACPI_RESTAG_ADDRESSSPACE "_ASI"
#define ACPI_RESTAG_ACCESSSIZE "_ASZ"
#define ACPI_RESTAG_TYPESPECIFICATTRIBUTES "_ATT"
#define ACPI_RESTAG_BASEADDRESS "_BAS"
#define ACPI_RESTAG_BUSMASTER "_BM_" /* Master(1), Slave(0) */
#define ACPI_RESTAG_DECODE "_DEC"
#define ACPI_RESTAG_DMA "_DMA"
#define ACPI_RESTAG_DMATYPE "_TYP" /* Compatible(0), A(1), B(2), F(3) */
#define ACPI_RESTAG_GRANULARITY "_GRA"
#define ACPI_RESTAG_INTERRUPT "_INT"
#define ACPI_RESTAG_INTERRUPTLEVEL "_LL_" /* active_lo(1), active_hi(0) */
#define ACPI_RESTAG_INTERRUPTSHARE "_SHR" /* Shareable(1), no_share(0) */
#define ACPI_RESTAG_INTERRUPTTYPE "_HE_" /* Edge(1), Level(0) */
#define ACPI_RESTAG_LENGTH "_LEN"
#define ACPI_RESTAG_MEMATTRIBUTES "_MTP" /* Memory(0), Reserved(1), ACPI(2), NVS(3) */
#define ACPI_RESTAG_MEMTYPE "_MEM" /* non_cache(0), Cacheable(1) Cache+combine(2), Cache+prefetch(3) */
#define ACPI_RESTAG_MAXADDR "_MAX"
#define ACPI_RESTAG_MINADDR "_MIN"
#define ACPI_RESTAG_MAXTYPE "_MAF"
#define ACPI_RESTAG_MINTYPE "_MIF"
#define ACPI_RESTAG_REGISTERBITOFFSET "_RBO"
#define ACPI_RESTAG_REGISTERBITWIDTH "_RBW"
#define ACPI_RESTAG_RANGETYPE "_RNG"
#define ACPI_RESTAG_READWRITETYPE "_RW_" /* read_only(0), Writeable (1) */
#define ACPI_RESTAG_TRANSLATION "_TRA"
#define ACPI_RESTAG_TRANSTYPE "_TRS" /* Sparse(1), Dense(0) */
#define ACPI_RESTAG_TYPE "_TTP" /* Translation(1), Static (0) */
#define ACPI_RESTAG_XFERTYPE "_SIZ" /* 8(0), 8_and16(1), 16(2) */
/* Default sizes for "small" resource descriptors */
@ -109,7 +115,7 @@ struct asl_resource_node {
* SMALL descriptors
*/
#define AML_RESOURCE_SMALL_HEADER_COMMON \
u8 descriptor_type;
u8 descriptor_type;
struct aml_resource_small_header {
AML_RESOURCE_SMALL_HEADER_COMMON};
@ -162,8 +168,8 @@ struct aml_resource_end_tag {
* LARGE descriptors
*/
#define AML_RESOURCE_LARGE_HEADER_COMMON \
u8 descriptor_type;\
u16 resource_length;
u8 descriptor_type;\
u16 resource_length;
struct aml_resource_large_header {
AML_RESOURCE_LARGE_HEADER_COMMON};
@ -194,9 +200,9 @@ struct aml_resource_fixed_memory32 {
};
#define AML_RESOURCE_ADDRESS_COMMON \
u8 resource_type; \
u8 flags; \
u8 specific_flags;
u8 resource_type; \
u8 flags; \
u8 specific_flags;
struct aml_resource_address {
AML_RESOURCE_LARGE_HEADER_COMMON AML_RESOURCE_ADDRESS_COMMON};
@ -266,6 +272,7 @@ struct aml_resource_generic_register {
union aml_resource {
/* Descriptor headers */
u8 descriptor_type;
struct aml_resource_small_header small_header;
struct aml_resource_large_header large_header;
@ -296,9 +303,9 @@ union aml_resource {
/* Utility overlays */
struct aml_resource_address address;
u32 u32_item;
u16 u16_item;
u8 U8item;
u32 dword_item;
u16 word_item;
u8 byte_item;
};
#endif

5
include/acpi/pdc_intel.h
View file

@ -18,6 +18,11 @@
ACPI_PDC_C_C1_HALT | \
ACPI_PDC_P_FFH)
#define ACPI_PDC_EST_CAPABILITY_SWSMP (ACPI_PDC_SMP_C1PT | \
ACPI_PDC_C_C1_HALT | \
ACPI_PDC_SMP_P_SWCOORD | \
ACPI_PDC_P_FFH)
#define ACPI_PDC_C_CAPABILITY_SMP (ACPI_PDC_SMP_C2C3 | \
ACPI_PDC_SMP_C1PT | \
ACPI_PDC_C_C1_HALT)

69
include/acpi/platform/acenv.h
View file

@ -49,33 +49,41 @@
*/
#ifdef ACPI_LIBRARY
/*
* Note: The non-debug version of the acpi_library does not contain any
* debug support, for minimimal size. The debug version uses ACPI_FULL_DEBUG
*/
#define ACPI_USE_LOCAL_CACHE
#endif
#ifdef ACPI_DUMP_APP
#ifndef MSDOS
#define ACPI_DEBUG_OUTPUT
#endif
#define ACPI_APPLICATION
#define ACPI_DISASSEMBLER
#define ACPI_NO_METHOD_EXECUTION
#endif
#ifdef ACPI_EXEC_APP
#undef DEBUGGER_THREADING
#define DEBUGGER_THREADING DEBUGGER_SINGLE_THREADED
#define ACPI_DEBUG_OUTPUT
#define ACPI_APPLICATION
#define ACPI_DEBUGGER
#define ACPI_DISASSEMBLER
#define ACPI_MUTEX_DEBUG
#endif
#ifdef ACPI_ASL_COMPILER
#define ACPI_DEBUG_OUTPUT
#define ACPI_APPLICATION
#define ACPI_DISASSEMBLER
#define ACPI_CONSTANT_EVAL_ONLY
#define ACPI_LARGE_NAMESPACE_NODE
#define ACPI_DATA_TABLE_DISASSEMBLY
#endif
#ifdef ACPI_EXEC_APP
#undef DEBUGGER_THREADING
#define DEBUGGER_THREADING DEBUGGER_SINGLE_THREADED
#define ACPI_FULL_DEBUG
#define ACPI_APPLICATION
#define ACPI_DEBUGGER
#define ACPI_MUTEX_DEBUG
#define ACPI_DBG_TRACK_ALLOCATIONS
#endif
#ifdef ACPI_DASM_APP
#ifndef MSDOS
#define ACPI_DEBUG_OUTPUT
#endif
#define ACPI_APPLICATION
#define ACPI_DISASSEMBLER
#define ACPI_NO_METHOD_EXECUTION
#define ACPI_LARGE_NAMESPACE_NODE
#define ACPI_DATA_TABLE_DISASSEMBLY
#endif
#ifdef ACPI_APPLICATION
@ -83,6 +91,12 @@
#define ACPI_USE_LOCAL_CACHE
#endif
#ifdef ACPI_FULL_DEBUG
#define ACPI_DEBUGGER
#define ACPI_DEBUG_OUTPUT
#define ACPI_DISASSEMBLER
#endif
/*
* Environment configuration. The purpose of this file is to interface to the
* local generation environment.
@ -137,7 +151,7 @@
#elif defined(MSDOS) /* Must appear after WIN32 and WIN64 check */
#include "acdos16.h"
#elif defined(__FreeBSD__)
#elif defined(__FreeBSD__) || defined(__FreeBSD_kernel__)
#include "acfreebsd.h"
#elif defined(__NetBSD__)
@ -163,17 +177,6 @@
#endif
/*
* Memory allocation tracking. Used only if
* 1) This is the debug version
* 2) This is NOT a 16-bit version of the code (not enough real-mode memory)
*/
#ifdef ACPI_DEBUG_OUTPUT
#if ACPI_MACHINE_WIDTH != 16
#define ACPI_DBG_TRACK_ALLOCATIONS
#endif
#endif
/*! [End] no source code translation !*/
/*
@ -271,8 +274,8 @@ typedef char *va_list;
/*
* Storage alignment properties
*/
#define _AUPBND (sizeof (acpi_native_uint) - 1)
#define _ADNBND (sizeof (acpi_native_uint) - 1)
#define _AUPBND (sizeof (acpi_native_int) - 1)
#define _ADNBND (sizeof (acpi_native_int) - 1)
/*
* Variable argument list macro definitions

25
include/acpi/platform/aclinux.h
View file

@ -51,27 +51,22 @@
#include <linux/string.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/ctype.h>
#include <asm/system.h>
#include <asm/atomic.h>
#include <asm/div64.h>
#include <asm/acpi.h>
#define strtoul simple_strtoul
#define ACPI_MACHINE_WIDTH BITS_PER_LONG
/* Type(s) for the OSL */
#ifdef ACPI_USE_LOCAL_CACHE
#define acpi_cache_t struct acpi_memory_list
#else
#include <linux/slab.h>
#define acpi_cache_t kmem_cache_t
#endif
/* Host-dependent types and defines */
#define ACPI_MACHINE_WIDTH BITS_PER_LONG
#define acpi_cache_t kmem_cache_t
#define ACPI_EXPORT_SYMBOL(symbol) EXPORT_SYMBOL(symbol);
#define strtoul simple_strtoul
/* Full namespace pathname length limit - arbitrary */
#define ACPI_PATHNAME_MAX 256
#else /* !__KERNEL__ */
@ -103,4 +98,8 @@
#define acpi_cpu_flags unsigned long
#define acpi_thread_id u32
static inline acpi_thread_id acpi_os_get_thread_id(void) { return 0; }
#endif /* __ACLINUX_H__ */

27
include/acpi/processor.h
View file

@ -2,6 +2,7 @@
#define __ACPI_PROCESSOR_H
#include <linux/kernel.h>
#include <linux/cpu.h>
#include <asm/acpi.h>
@ -17,6 +18,17 @@
#define ACPI_PDC_REVISION_ID 0x1
#define ACPI_PSD_REV0_REVISION 0 /* Support for _PSD as in ACPI 3.0 */
#define ACPI_PSD_REV0_ENTRIES 5
/*
* Types of coordination defined in ACPI 3.0. Same macros can be used across
* P, C and T states
*/
#define DOMAIN_COORD_TYPE_SW_ALL 0xfc
#define DOMAIN_COORD_TYPE_SW_ANY 0xfd
#define DOMAIN_COORD_TYPE_HW_ALL 0xfe
/* Power Management */
struct acpi_processor_cx;
@ -65,6 +77,14 @@ struct acpi_processor_power {
/* Performance Management */
struct acpi_psd_package {
acpi_integer num_entries;
acpi_integer revision;
acpi_integer domain;
acpi_integer coord_type;
acpi_integer num_processors;
} __attribute__ ((packed));
struct acpi_pct_register {
u8 descriptor;
u16 length;
@ -91,7 +111,9 @@ struct acpi_processor_performance {
struct acpi_pct_register status_register;
unsigned int state_count;
struct acpi_processor_px *states;
struct acpi_psd_package domain_info;
cpumask_t shared_cpu_map;
unsigned int shared_type;
};
/* Throttling Control */
@ -160,6 +182,9 @@ struct acpi_processor_errata {
} piix4;
};
extern int acpi_processor_preregister_performance(
struct acpi_processor_performance **performance);
extern int acpi_processor_register_performance(struct acpi_processor_performance
*performance, unsigned int cpu);
extern void acpi_processor_unregister_performance(struct

4
include/asm-alpha/irq.h
View file

@ -92,8 +92,4 @@ extern void enable_irq(unsigned int);
struct pt_regs;
extern void (*perf_irq)(unsigned long, struct pt_regs *);
struct irqaction;
int handle_IRQ_event(unsigned int, struct pt_regs *, struct irqaction *);
#endif /* _ALPHA_IRQ_H */

2
include/asm-alpha/vga.h
View file

@ -46,6 +46,6 @@ extern void scr_memcpyw(u16 *d, const u16 *s, unsigned int count);
#define vga_readb(a) readb((u8 __iomem *)(a))
#define vga_writeb(v,a) writeb(v, (u8 __iomem *)(a))
#define VGA_MAP_MEM(x) ((unsigned long) ioremap(x, 0))
#define VGA_MAP_MEM(x,s) ((unsigned long) ioremap(x, s))
#endif

81
include/asm-arm/arch-at91rm9200/at91rm9200_spi.h Normal file
View file

@ -0,0 +1,81 @@
/*
* include/asm-arm/arch-at91rm9200/at91rm9200_spi.h
*
* Copyright (C) 2005 Ivan Kokshaysky
* Copyright (C) SAN People
*
* Serial Peripheral Interface (SPI) registers.
* Based on AT91RM9200 datasheet revision E.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#ifndef AT91RM9200_SPI_H
#define AT91RM9200_SPI_H
#define AT91_SPI_CR 0x00 /* Control Register */
#define AT91_SPI_SPIEN (1 << 0) /* SPI Enable */
#define AT91_SPI_SPIDIS (1 << 1) /* SPI Disable */
#define AT91_SPI_SWRST (1 << 7) /* SPI Software Reset */
#define AT91_SPI_LASTXFER (1 << 24) /* Last Transfer [SAM9261 only] */
#define AT91_SPI_MR 0x04 /* Mode Register */
#define AT91_SPI_MSTR (1 << 0) /* Master/Slave Mode */
#define AT91_SPI_PS (1 << 1) /* Peripheral Select */
#define AT91_SPI_PS_FIXED (0 << 1)
#define AT91_SPI_PS_VARIABLE (1 << 1)
#define AT91_SPI_PCSDEC (1 << 2) /* Chip Select Decode */
#define AT91_SPI_DIV32 (1 << 3) /* Clock Selection */
#define AT91_SPI_MODFDIS (1 << 4) /* Mode Fault Detection */
#define AT91_SPI_LLB (1 << 7) /* Local Loopback Enable */
#define AT91_SPI_PCS (0xf << 16) /* Peripheral Chip Select */
#define AT91_SPI_DLYBCS (0xff << 24) /* Delay Between Chip Selects */
#define AT91_SPI_RDR 0x08 /* Receive Data Register */
#define AT91_SPI_RD (0xffff << 0) /* Receive Data */
#define AT91_SPI_PCS (0xf << 16) /* Peripheral Chip Select */
#define AT91_SPI_TDR 0x0c /* Transmit Data Register */
#define AT91_SPI_TD (0xffff << 0) /* Transmit Data */
#define AT91_SPI_PCS (0xf << 16) /* Peripheral Chip Select */
#define AT91_SPI_LASTXFER (1 << 24) /* Last Transfer [SAM9261 only] */
#define AT91_SPI_SR 0x10 /* Status Register */
#define AT91_SPI_RDRF (1 << 0) /* Receive Data Register Full */
#define AT91_SPI_TDRE (1 << 1) /* Transmit Data Register Full */
#define AT91_SPI_MODF (1 << 2) /* Mode Fault Error */
#define AT91_SPI_OVRES (1 << 3) /* Overrun Error Status */
#define AT91_SPI_ENDRX (1 << 4) /* End of RX buffer */
#define AT91_SPI_ENDTX (1 << 5) /* End of TX buffer */
#define AT91_SPI_RXBUFF (1 << 6) /* RX Buffer Full */
#define AT91_SPI_TXBUFE (1 << 7) /* TX Buffer Empty */
#define AT91_SPI_NSSR (1 << 8) /* NSS Rising [SAM9261 only] */
#define AT91_SPI_TXEMPTY (1 << 9) /* Transmission Register Empty [SAM9261 only] */
#define AT91_SPI_SPIENS (1 << 16) /* SPI Enable Status */
#define AT91_SPI_IER 0x14 /* Interrupt Enable Register */
#define AT91_SPI_IDR 0x18 /* Interrupt Disable Register */
#define AT91_SPI_IMR 0x1c /* Interrupt Mask Register */
#define AT91_SPI_CSR(n) (0x30 + ((n) * 4)) /* Chip Select Registers 0-3 */
#define AT91_SPI_CPOL (1 << 0) /* Clock Polarity */
#define AT91_SPI_NCPHA (1 << 1) /* Clock Phase */
#define AT91_SPI_CSAAT (1 << 3) /* Chip Select Active After Transfer [SAM9261 only] */
#define AT91_SPI_BITS (0xf << 4) /* Bits Per Transfer */
#define AT91_SPI_BITS_8 (0 << 4)
#define AT91_SPI_BITS_9 (1 << 4)
#define AT91_SPI_BITS_10 (2 << 4)
#define AT91_SPI_BITS_11 (3 << 4)
#define AT91_SPI_BITS_12 (4 << 4)
#define AT91_SPI_BITS_13 (5 << 4)
#define AT91_SPI_BITS_14 (6 << 4)
#define AT91_SPI_BITS_15 (7 << 4)
#define AT91_SPI_BITS_16 (8 << 4)
#define AT91_SPI_SCBR (0xff << 8) /* Serial Clock Baud Rate */
#define AT91_SPI_DLYBS (0xff << 16) /* Delay before SPCK */
#define AT91_SPI_DLYBCT (0xff << 24) /* Delay between Consecutive Transfers */
#endif

96
include/asm-arm/arch-at91rm9200/at91rm9200_ssc.h Normal file
View file

@ -0,0 +1,96 @@
/*
* include/asm-arm/arch-at91rm9200/at91rm9200_ssc.h
*
* Copyright (C) SAN People
*
* Serial Synchronous Controller (SSC) registers.
* Based on AT91RM9200 datasheet revision E.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#ifndef AT91RM9200_SSC_H
#define AT91RM9200_SSC_H
#define AT91_SSC_CR 0x00 /* Control Register */
#define AT91_SSC_RXEN (1 << 0) /* Receive Enable */
#define AT91_SSC_RXDIS (1 << 1) /* Receive Disable */
#define AT91_SSC_TXEN (1 << 8) /* Transmit Enable */
#define AT91_SSC_TXDIS (1 << 9) /* Transmit Disable */
#define AT91_SSC_SWRST (1 << 15) /* Software Reset */
#define AT91_SSC_CMR 0x04 /* Clock Mode Register */
#define AT91_SSC_CMR_DIV (0xfff << 0) /* Clock Divider */
#define AT91_SSC_RCMR 0x10 /* Receive Clock Mode Register */
#define AT91_SSC_CKS (3 << 0) /* Clock Selection */
#define AT91_SSC_CKS_DIV (0 << 0)
#define AT91_SSC_CKS_CLOCK (1 << 0)
#define AT91_SSC_CKS_PIN (2 << 0)
#define AT91_SSC_CKO (7 << 2) /* Clock Output Mode Selection */
#define AT91_SSC_CKO_NONE (0 << 2)
#define AT91_SSC_CKO_CONTINUOUS (1 << 2)
#define AT91_SSC_CKI (1 << 5) /* Clock Inversion */
#define AT91_SSC_CKI_FALLING (0 << 5)
#define AT91_SSC_CK_RISING (1 << 5)
#define AT91_SSC_START (0xf << 8) /* Start Selection */
#define AT91_SSC_START_CONTINUOUS (0 << 8)
#define AT91_SSC_START_TX_RX (1 << 8)
#define AT91_SSC_START_LOW_RF (2 << 8)
#define AT91_SSC_START_HIGH_RF (3 << 8)
#define AT91_SSC_START_FALLING_RF (4 << 8)
#define AT91_SSC_START_RISING_RF (5 << 8)
#define AT91_SSC_START_LEVEL_RF (6 << 8)
#define AT91_SSC_START_EDGE_RF (7 << 8)
#define AT91_SSC_STTDLY (0xff << 16) /* Start Delay */
#define AT91_SSC_PERIOD (0xff << 24) /* Period Divider Selection */
#define AT91_SSC_RFMR 0x14 /* Receive Frame Mode Register */
#define AT91_SSC_DATALEN (0x1f << 0) /* Data Length */
#define AT91_SSC_LOOP (1 << 5) /* Loop Mode */
#define AT91_SSC_MSBF (1 << 7) /* Most Significant Bit First */
#define AT91_SSC_DATNB (0xf << 8) /* Data Number per Frame */
#define AT91_SSC_FSLEN (0xf << 16) /* Frame Sync Length */
#define AT91_SSC_FSOS (7 << 20) /* Frame Sync Output Selection */
#define AT91_SSC_FSOS_NONE (0 << 20)
#define AT91_SSC_FSOS_NEGATIVE (1 << 20)
#define AT91_SSC_FSOS_POSITIVE (2 << 20)
#define AT91_SSC_FSOS_LOW (3 << 20)
#define AT91_SSC_FSOS_HIGH (4 << 20)
#define AT91_SSC_FSOS_TOGGLE (5 << 20)
#define AT91_SSC_FSEDGE (1 << 24) /* Frame Sync Edge Detection */
#define AT91_SSC_FSEDGE_POSITIVE (0 << 24)
#define AT91_SSC_FSEDGE_NEGATIVE (1 << 24)
#define AT91_SSC_TCMR 0x18 /* Transmit Clock Mode Register */
#define AT91_SSC_TFMR 0x1c /* Transmit Fram Mode Register */
#define AT91_SSC_DATDEF (1 << 5) /* Data Default Value */
#define AT91_SSC_FSDEN (1 << 23) /* Frame Sync Data Enable */
#define AT91_SSC_RHR 0x20 /* Receive Holding Register */
#define AT91_SSC_THR 0x24 /* Transmit Holding Register */
#define AT91_SSC_RSHR 0x30 /* Receive Sync Holding Register */
#define AT91_SSC_TSHR 0x34 /* Transmit Sync Holding Register */
#define AT91_SSC_SR 0x40 /* Status Register */
#define AT91_SSC_TXRDY (1 << 0) /* Transmit Ready */
#define AT91_SSC_TXEMPTY (1 << 1) /* Transmit Empty */
#define AT91_SSC_ENDTX (1 << 2) /* End of Transmission */
#define AT91_SSC_TXBUFE (1 << 3) /* Transmit Buffer Empty */
#define AT91_SSC_RXRDY (1 << 4) /* Receive Ready */
#define AT91_SSC_OVRUN (1 << 5) /* Receive Overrun */
#define AT91_SSC_ENDRX (1 << 6) /* End of Reception */
#define AT91_SSC_RXBUFF (1 << 7) /* Receive Buffer Full */
#define AT91_SSC_TXSYN (1 << 10) /* Transmit Sync */
#define AT91_SSC_RXSYN (1 << 11) /* Receive Sync */
#define AT91_SSC_TXENA (1 << 16) /* Transmit Enable */
#define AT91_SSC_RXENA (1 << 17) /* Receive Enable */
#define AT91_SSC_IER 0x44 /* Interrupt Enable Register */
#define AT91_SSC_IDR 0x48 /* Interrupt Disable Register */
#define AT91_SSC_IMR 0x4c /* Interrupt Mask Register */
#endif

11
include/asm-arm/arch-at91rm9200/at91rm9200_sys.h
View file

@ -68,8 +68,17 @@
#define AT91_DBGU_RHR (AT91_DBGU + 0x18) /* Receiver Holding Register */
#define AT91_DBGU_THR (AT91_DBGU + 0x1c) /* Transmitter Holding Register */
#define AT91_DBGU_BRGR (AT91_DBGU + 0x20) /* Baud Rate Generator Register */
#define AT91_DBGU_CIDR (AT91_DBGU + 0x40) /* Chip ID Register */
#define AT91_DBGU_EXID (AT91_DBGU + 0x44) /* Chip ID Extension Register */
#define AT91_CIDR_VERSION (0x1f << 0) /* Version of the Device */
#define AT91_CIDR_EPROC (7 << 5) /* Embedded Processor */
#define AT91_CIDR_NVPSIZ (0xf << 8) /* Nonvolatile Program Memory Size */
#define AT91_CIDR_NVPSIZ2 (0xf << 12) /* Second Nonvolatile Program Memory Size */
#define AT91_CIDR_SRAMSIZ (0xf << 16) /* Internal SRAM Size */
#define AT91_CIDR_ARCH (0xff << 20) /* Architecture Identifier */
#define AT91_CIDR_NVPTYP (7 << 28) /* Nonvolatile Program Memory Type */
#define AT91_CIDR_EXT (1 << 31) /* Extension Flag */
/*
@ -241,7 +250,7 @@
#define AT91_RTC_SEC (0x7f << 0) /* Current Second */
#define AT91_RTC_MIN (0x7f << 8) /* Current Minute */
#define AT91_RTC_HOUR (0x3f << 16) /* Current Hour */
#define At91_RTC_AMPM (1 << 22) /* Ante Meridiem Post Meridiem Indicator */
#define AT91_RTC_AMPM (1 << 22) /* Ante Meridiem Post Meridiem Indicator */
#define AT91_RTC_CALR (AT91_RTC + 0x0c) /* Calendar Register */
#define AT91_RTC_CENT (0x7f << 0) /* Current Century */

146
include/asm-arm/arch-at91rm9200/at91rm9200_tc.h Normal file
View file

@ -0,0 +1,146 @@
/*
* include/asm-arm/arch-at91rm9200/at91rm9200_tc.h
*
* Copyright (C) SAN People
*
* Timer/Counter Unit (TC) registers.
* Based on AT91RM9200 datasheet revision E.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#ifndef AT91RM9200_TC_H
#define AT91RM9200_TC_H
#define AT91_TC_BCR 0xc0 /* TC Block Control Register */
#define AT91_TC_SYNC (1 << 0) /* Synchro Command */
#define AT91_TC_BMR 0xc4 /* TC Block Mode Register */
#define AT91_TC_TC0XC0S (3 << 0) /* External Clock Signal 0 Selection */
#define AT91_TC_TC0XC0S_TCLK0 (0 << 0)
#define AT91_TC_TC0XC0S_NONE (1 << 0)
#define AT91_TC_TC0XC0S_TIOA1 (2 << 0)
#define AT91_TC_TC0XC0S_TIOA2 (3 << 0)
#define AT91_TC_TC1XC1S (3 << 2) /* External Clock Signal 1 Selection */
#define AT91_TC_TC1XC1S_TCLK1 (0 << 2)
#define AT91_TC_TC1XC1S_NONE (1 << 2)
#define AT91_TC_TC1XC1S_TIOA0 (2 << 2)
#define AT91_TC_TC1XC1S_TIOA2 (3 << 2)
#define AT91_TC_TC2XC2S (3 << 4) /* External Clock Signal 2 Selection */
#define AT91_TC_TC2XC2S_TCLK2 (0 << 4)
#define AT91_TC_TC2XC2S_NONE (1 << 4)
#define AT91_TC_TC2XC2S_TIOA0 (2 << 4)
#define AT91_TC_TC2XC2S_TIOA1 (3 << 4)
#define AT91_TC_CCR 0x00 /* Channel Control Register */
#define AT91_TC_CLKEN (1 << 0) /* Counter Clock Enable Command */
#define AT91_TC_CLKDIS (1 << 1) /* Counter CLock Disable Command */
#define AT91_TC_SWTRG (1 << 2) /* Software Trigger Command */
#define AT91_TC_CMR 0x04 /* Channel Mode Register */
#define AT91_TC_TCCLKS (7 << 0) /* Capture/Waveform Mode: Clock Selection */
#define AT91_TC_TIMER_CLOCK1 (0 << 0)
#define AT91_TC_TIMER_CLOCK2 (1 << 0)
#define AT91_TC_TIMER_CLOCK3 (2 << 0)
#define AT91_TC_TIMER_CLOCK4 (3 << 0)
#define AT91_TC_TIMER_CLOCK5 (4 << 0)
#define AT91_TC_XC0 (5 << 0)
#define AT91_TC_XC1 (6 << 0)
#define AT91_TC_XC2 (7 << 0)
#define AT91_TC_CLKI (1 << 3) /* Capture/Waveform Mode: Clock Invert */
#define AT91_TC_BURST (3 << 4) /* Capture/Waveform Mode: Burst Signal Selection */
#define AT91_TC_LDBSTOP (1 << 6) /* Capture Mode: Counter Clock Stopped with TB Loading */
#define AT91_TC_LDBDIS (1 << 7) /* Capture Mode: Counter Clock Disable with RB Loading */
#define AT91_TC_ETRGEDG (3 << 8) /* Capture Mode: External Trigger Edge Selection */
#define AT91_TC_ABETRG (1 << 10) /* Capture Mode: TIOA or TIOB External Trigger Selection */
#define AT91_TC_CPCTRG (1 << 14) /* Capture Mode: RC Compare Trigger Enable */
#define AT91_TC_WAVE (1 << 15) /* Capture/Waveform mode */
#define AT91_TC_LDRA (3 << 16) /* Capture Mode: RA Loading Selection */
#define AT91_TC_LDRB (3 << 18) /* Capture Mode: RB Loading Selection */
#define AT91_TC_CPCSTOP (1 << 6) /* Waveform Mode: Counter Clock Stopped with RC Compare */
#define AT91_TC_CPCDIS (1 << 7) /* Waveform Mode: Counter Clock Disable with RC Compare */
#define AT91_TC_EEVTEDG (3 << 8) /* Waveform Mode: External Event Edge Selection */
#define AT91_TC_EEVTEDG_NONE (0 << 8)
#define AT91_TC_EEVTEDG_RISING (1 << 8)
#define AT91_TC_EEVTEDG_FALLING (2 << 8)
#define AT91_TC_EEVTEDG_BOTH (3 << 8)
#define AT91_TC_EEVT (3 << 10) /* Waveform Mode: External Event Selection */
#define AT91_TC_EEVT_TIOB (0 << 10)
#define AT91_TC_EEVT_XC0 (1 << 10)
#define AT91_TC_EEVT_XC1 (2 << 10)
#define AT91_TC_EEVT_XC2 (3 << 10)
#define AT91_TC_ENETRG (1 << 12) /* Waveform Mode: External Event Trigger Enable */
#define AT91_TC_WAVESEL (3 << 13) /* Waveform Mode: Waveform Selection */
#define AT91_TC_WAVESEL_UP (0 << 13)
#define AT91_TC_WAVESEL_UP_AUTO (2 << 13)
#define AT91_TC_WAVESEL_UPDOWN (1 << 13)
#define AT91_TC_WAVESEL_UPDOWN_AUTO (3 << 13)
#define AT91_TC_ACPA (3 << 16) /* Waveform Mode: RA Compare Effect on TIOA */
#define AT91_TC_ACPA_NONE (0 << 16)
#define AT91_TC_ACPA_SET (1 << 16)
#define AT91_TC_ACPA_CLEAR (2 << 16)
#define AT91_TC_ACPA_TOGGLE (3 << 16)
#define AT91_TC_ACPC (3 << 18) /* Waveform Mode: RC Compre Effect on TIOA */
#define AT91_TC_ACPC_NONE (0 << 18)
#define AT91_TC_ACPC_SET (1 << 18)
#define AT91_TC_ACPC_CLEAR (2 << 18)
#define AT91_TC_ACPC_TOGGLE (3 << 18)
#define AT91_TC_AEEVT (3 << 20) /* Waveform Mode: External Event Effect on TIOA */
#define AT91_TC_AEEVT_NONE (0 << 20)
#define AT91_TC_AEEVT_SET (1 << 20)
#define AT91_TC_AEEVT_CLEAR (2 << 20)
#define AT91_TC_AEEVT_TOGGLE (3 << 20)
#define AT91_TC_ASWTRG (3 << 22) /* Waveform Mode: Software Trigger Effect on TIOA */
#define AT91_TC_ASWTRG_NONE (0 << 22)
#define AT91_TC_ASWTRG_SET (1 << 22)
#define AT91_TC_ASWTRG_CLEAR (2 << 22)
#define AT91_TC_ASWTRG_TOGGLE (3 << 22)
#define AT91_TC_BCPB (3 << 24) /* Waveform Mode: RB Compare Effect on TIOB */
#define AT91_TC_BCPB_NONE (0 << 24)
#define AT91_TC_BCPB_SET (1 << 24)
#define AT91_TC_BCPB_CLEAR (2 << 24)
#define AT91_TC_BCPB_TOGGLE (3 << 24)
#define AT91_TC_BCPC (3 << 26) /* Waveform Mode: RC Compare Effect on TIOB */
#define AT91_TC_BCPC_NONE (0 << 26)
#define AT91_TC_BCPC_SET (1 << 26)
#define AT91_TC_BCPC_CLEAR (2 << 26)
#define AT91_TC_BCPC_TOGGLE (3 << 26)
#define AT91_TC_BEEVT (3 << 28) /* Waveform Mode: External Event Effect on TIOB */
#define AT91_TC_BEEVT_NONE (0 << 28)
#define AT91_TC_BEEVT_SET (1 << 28)
#define AT91_TC_BEEVT_CLEAR (2 << 28)
#define AT91_TC_BEEVT_TOGGLE (3 << 28)
#define AT91_TC_BSWTRG (3 << 30) /* Waveform Mode: Software Trigger Effect on TIOB */
#define AT91_TC_BSWTRG_NONE (0 << 30)
#define AT91_TC_BSWTRG_SET (1 << 30)
#define AT91_TC_BSWTRG_CLEAR (2 << 30)
#define AT91_TC_BSWTRG_TOGGLE (3 << 30)
#define AT91_TC_CV 0x10 /* Counter Value */
#define AT91_TC_RA 0x14 /* Register A */
#define AT91_TC_RB 0x18 /* Register B */
#define AT91_TC_RC 0x1c /* Register C */
#define AT91_TC_SR 0x20 /* Status Register */
#define AT91_TC_COVFS (1 << 0) /* Counter Overflow Status */
#define AT91_TC_LOVRS (1 << 1) /* Load Overrun Status */
#define AT91_TC_CPAS (1 << 2) /* RA Compare Status */
#define AT91_TC_CPBS (1 << 3) /* RB Compare Status */
#define AT91_TC_CPCS (1 << 4) /* RC Compare Status */
#define AT91_TC_LDRAS (1 << 5) /* RA Loading Status */
#define AT91_TC_LDRBS (1 << 6) /* RB Loading Status */
#define AT91_TC_ETRGS (1 << 7) /* External Trigger Status */
#define AT91_TC_CLKSTA (1 << 16) /* Clock Enabling Status */
#define AT91_TC_MTIOA (1 << 17) /* TIOA Mirror */
#define AT91_TC_MTIOB (1 << 18) /* TIOB Mirror */
#define AT91_TC_IER 0x24 /* Interrupt Enable Register */
#define AT91_TC_IDR 0x28 /* Interrupt Disable Register */
#define AT91_TC_IMR 0x2c /* Interrupt Mask Register */
#endif

77
include/asm-arm/arch-at91rm9200/at91rm9200_udp.h Normal file
View file

@ -0,0 +1,77 @@
/*
* include/asm-arm/arch-at91rm9200/at91rm9200_udp.h
*
* Copyright (C) 2005 Ivan Kokshaysky
* Copyright (C) SAN People
*
* USB Device Port (UDP) registers.
* Based on AT91RM9200 datasheet revision E.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#ifndef AT91RM9200_UDP_H
#define AT91RM9200_UDP_H
#define AT91_UDP_FRM_NUM 0x00 /* Frame Number Register */
#define AT91_UDP_NUM (0x7ff << 0) /* Frame Number */
#define AT91_UDP_FRM_ERR (1 << 16) /* Frame Error */
#define AT91_UDP_FRM_OK (1 << 17) /* Frame OK */
#define AT91_UDP_GLB_STAT 0x04 /* Global State Register */
#define AT91_UDP_FADDEN (1 << 0) /* Function Address Enable */
#define AT91_UDP_CONFG (1 << 1) /* Configured */
#define AT91_UDP_ESR (1 << 2) /* Enable Send Resume */
#define AT91_UDP_RSMINPR (1 << 3) /* Resume has been sent */
#define AT91_UDP_RMWUPE (1 << 4) /* Remote Wake Up Enable */
#define AT91_UDP_FADDR 0x08 /* Function Address Register */
#define AT91_UDP_FADD (0x7f << 0) /* Function Address Value */
#define AT91_UDP_FEN (1 << 8) /* Function Enable */
#define AT91_UDP_IER 0x10 /* Interrupt Enable Register */
#define AT91_UDP_IDR 0x14 /* Interrupt Disable Register */
#define AT91_UDP_IMR 0x18 /* Interrupt Mask Register */
#define AT91_UDP_ISR 0x1c /* Interrupt Status Register */
#define AT91_UDP_EP(n) (1 << (n)) /* Endpoint Interrupt Status */
#define AT91_UDP_RXSUSP (1 << 8) /* USB Suspend Interrupt Status */
#define AT91_UDP_RXRSM (1 << 9) /* USB Resume Interrupt Status */
#define AT91_UDP_EXTRSM (1 << 10) /* External Resume Interrupt Status */
#define AT91_UDP_SOFINT (1 << 11) /* Start of Frame Interrupt Status */
#define AT91_UDP_ENDBUSRES (1 << 12) /* End of Bus Reset Interrpt Status */
#define AT91_UDP_WAKEUP (1 << 13) /* USB Wakeup Interrupt Status */
#define AT91_UDP_ICR 0x20 /* Interrupt Clear Register */
#define AT91_UDP_RST_EP 0x28 /* Reset Endpoint Register */
#define AT91_UDP_CSR(n) (0x30 + ((n) * 4)) /* Endpoint Control/Status Registers 0-7 */
#define AT91_UDP_TXCOMP (1 << 0) /* Generates IN packet with data previously written in DPR */
#define AT91_UDP_RX_DATA_BK0 (1 << 1) /* Receive Data Bank 0 */
#define AT91_UDP_RXSETUP (1 << 2) /* Send STALL to the host */
#define AT91_UDP_STALLSENT (1 << 3) /* Stall Sent / Isochronous error (Isochronous endpoints) */
#define AT91_UDP_TXPKTRDY (1 << 4) /* Transmit Packet Ready */
#define AT91_UDP_FORCESTALL (1 << 5) /* Force Stall */
#define AT91_UDP_RX_DATA_BK1 (1 << 6) /* Receive Data Bank 1 */
#define AT91_UDP_DIR (1 << 7) /* Transfer Direction */
#define AT91_UDP_EPTYPE (7 << 8) /* Endpoint Type */
#define AT91_UDP_EPTYPE_CTRL (0 << 8)
#define AT91_UDP_EPTYPE_ISO_OUT (1 << 8)
#define AT91_UDP_EPTYPE_BULK_OUT (2 << 8)
#define AT91_UDP_EPTYPE_INT_OUT (3 << 8)
#define AT91_UDP_EPTYPE_ISO_IN (5 << 8)
#define AT91_UDP_EPTYPE_BULK_IN (6 << 8)
#define AT91_UDP_EPTYPE_INT_IN (7 << 8)
#define AT91_UDP_DTGLE (1 << 11) /* Data Toggle */
#define AT91_UDP_EPEDS (1 << 15) /* Endpoint Enable/Disable */
#define AT91_UDP_RXBYTECNT (0x7ff << 16) /* Number of bytes in FIFO */
#define AT91_UDP_FDR(n) (0x50 + ((n) * 4)) /* Endpoint FIFO Data Registers 0-7 */
#define AT91_UDP_TXVC 0x74 /* Transceiver Control Register */
#define AT91_UDP_TXVC_TXVDIS (1 << 8) /* Transceiver Disable */
#endif

30
include/asm-arm/arch-at91rm9200/board.h
View file

@ -31,14 +31,9 @@
#ifndef __ASM_ARCH_BOARD_H
#define __ASM_ARCH_BOARD_H
/* Clocks */
extern unsigned long at91_master_clock;
/* Serial Port */
extern int at91_serial_map[AT91_NR_UART];
extern int at91_console_port;
#include <linux/mtd/partitions.h>
#include <linux/device.h>
#include <linux/spi/spi.h>
/* USB Device */
struct at91_udc_data {
@ -91,10 +86,25 @@ struct at91_nand_data {
extern void __init at91_add_device_nand(struct at91_nand_data *data);
/* I2C*/
void __init at91_add_device_i2c(void);
extern void __init at91_add_device_i2c(void);
/* RTC */
void __init at91_add_device_rtc(void);
/* SPI */
extern void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices);
/* Serial */
struct at91_uart_config {
unsigned short console_tty; /* tty number of serial console */
unsigned short nr_tty; /* number of serial tty's */
short tty_map[]; /* map UART to tty number */
};
extern struct platform_device *at91_default_console_device;
extern void __init at91_init_serial(struct at91_uart_config *config);
struct at91_uart_data {
short use_dma_tx; /* use transmit DMA? */
short use_dma_rx; /* use receive DMA? */
};
extern void __init at91_add_device_serial(void);
/* LEDs */
extern u8 at91_leds_cpu;

5
include/asm-arm/arch-at91rm9200/gpio.h
View file

@ -13,6 +13,8 @@
#ifndef __ASM_ARCH_AT91RM9200_GPIO_H
#define __ASM_ARCH_AT91RM9200_GPIO_H
#include <asm/irq.h>
#define PIN_BASE NR_AIC_IRQS
#define PQFP_GPIO_BANKS 3 /* PQFP package has 3 banks */
@ -188,6 +190,9 @@ extern int at91_set_multi_drive(unsigned pin, int is_on);
/* callable at any time */
extern int at91_set_gpio_value(unsigned pin, int value);
extern int at91_get_gpio_value(unsigned pin);
extern void at91_gpio_suspend(void);
extern void at91_gpio_resume(void);
#endif
#endif

9
include/asm-arm/arch-at91rm9200/hardware.h
View file

@ -50,9 +50,12 @@
#define AT91_VA_BASE_TCB0 AT91_IO_P2V(AT91_BASE_TCB0)
/* Internal SRAM */
#define AT91_BASE_SRAM 0x00200000 /* Internal SRAM base address */
#define AT91_SRAM_BASE 0x00200000 /* Internal SRAM base address */
#define AT91_SRAM_SIZE 0x00004000 /* Internal SRAM SIZE (16Kb) */
/* Internal SRAM is mapped below the IO devices */
#define AT91_SRAM_VIRT_BASE (AT91_IO_VIRT_BASE - AT91_SRAM_SIZE)
/* Serial ports */
#define AT91_NR_UART 5 /* 4 USART3's and one DBGU port */
@ -81,14 +84,14 @@ static inline unsigned int at91_sys_read(unsigned int reg_offset)
{
void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS;
return readl(addr + reg_offset);
return __raw_readl(addr + reg_offset);
}
static inline void at91_sys_write(unsigned int reg_offset, unsigned long value)
{
void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS;
writel(value, addr + reg_offset);
__raw_writel(value, addr + reg_offset);
}
#endif

1
include/asm-arm/arch-at91rm9200/io.h
View file

@ -21,7 +21,6 @@
#ifndef __ASM_ARCH_IO_H
#define __ASM_ARCH_IO_H
#include <asm/arch/at91rm9200.h>
#include <asm/io.h>
#define IO_SPACE_LIMIT 0xFFFFFFFF

2
include/asm-arm/arch-at91rm9200/irqs.h
View file

@ -37,8 +37,6 @@
* symbols in gpio.h for ones handled indirectly as GPIOs.
* We make provision for 4 banks of GPIO.
*/
#include <asm/arch/gpio.h>
#define NR_IRQS (NR_AIC_IRQS + (4 * 32))

2
include/asm-arm/arch-at91rm9200/memory.h
View file

@ -21,7 +21,7 @@
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
#include <asm/arch/hardware.h>
#include <asm/hardware.h>
#define PHYS_OFFSET (AT91_SDRAM_BASE)

115
include/asm-arm/arch-at91rm9200/pio.h
View file

@ -1,115 +0,0 @@
/*
* include/asm-arm/arch-at91rm9200/pio.h
*
* Copyright (C) 2003 SAN People
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
*/
#ifndef __ASM_ARCH_PIO_H
#define __ASM_ARCH_PIO_H
#include <asm/arch/hardware.h>
static inline void AT91_CfgPIO_USART0(void) {
at91_sys_write(AT91_PIOA + PIO_PDR, AT91_PA17_TXD0 | AT91_PA18_RXD0 | AT91_PA20_CTS0);
/*
* Errata #39 - RTS0 is not internally connected to PA21. We need to drive
* the pin manually. Default is off (RTS is active low).
*/
at91_sys_write(AT91_PIOA + PIO_PER, AT91_PA21_RTS0);
at91_sys_write(AT91_PIOA + PIO_OER, AT91_PA21_RTS0);
at91_sys_write(AT91_PIOA + PIO_SODR, AT91_PA21_RTS0);
}
static inline void AT91_CfgPIO_USART1(void) {
at91_sys_write(AT91_PIOB + PIO_PDR, AT91_PB18_RI1 | AT91_PB19_DTR1
| AT91_PB20_TXD1 | AT91_PB21_RXD1 | AT91_PB23_DCD1
| AT91_PB24_CTS1 | AT91_PB25_DSR1 | AT91_PB26_RTS1);
}
static inline void AT91_CfgPIO_USART2(void) {
at91_sys_write(AT91_PIOA + PIO_PDR, AT91_PA22_RXD2 | AT91_PA23_TXD2);
}
static inline void AT91_CfgPIO_USART3(void) {
at91_sys_write(AT91_PIOA + PIO_PDR, AT91_PA5_TXD3 | AT91_PA6_RXD3);
at91_sys_write(AT91_PIOA + PIO_BSR, AT91_PA5_TXD3 | AT91_PA6_RXD3);
}
static inline void AT91_CfgPIO_DBGU(void) {
at91_sys_write(AT91_PIOA + PIO_PDR, AT91_PA31_DTXD | AT91_PA30_DRXD);
}
/*
* Enable the Two-Wire interface.
*/
static inline void AT91_CfgPIO_TWI(void) {
at91_sys_write(AT91_PIOA + PIO_PDR, AT91_PA25_TWD | AT91_PA26_TWCK);
at91_sys_write(AT91_PIOA + PIO_ASR, AT91_PA25_TWD | AT91_PA26_TWCK);
at91_sys_write(AT91_PIOA + PIO_MDER, AT91_PA25_TWD | AT91_PA26_TWCK); /* open drain */
}
/*
* Enable the Serial Peripheral Interface.
*/
static inline void AT91_CfgPIO_SPI(void) {
at91_sys_write(AT91_PIOA + PIO_PDR, AT91_PA0_MISO | AT91_PA1_MOSI | AT91_PA2_SPCK);
}
static inline void AT91_CfgPIO_SPI_CS0(void) {
at91_sys_write(AT91_PIOA + PIO_PDR, AT91_PA3_NPCS0);
}
static inline void AT91_CfgPIO_SPI_CS1(void) {
at91_sys_write(AT91_PIOA + PIO_PDR, AT91_PA4_NPCS1);
}
static inline void AT91_CfgPIO_SPI_CS2(void) {
at91_sys_write(AT91_PIOA + PIO_PDR, AT91_PA5_NPCS2);
}
static inline void AT91_CfgPIO_SPI_CS3(void) {
at91_sys_write(AT91_PIOA + PIO_PDR, AT91_PA6_NPCS3);
}
/*
* Select the DataFlash card.
*/
static inline void AT91_CfgPIO_DataFlashCard(void) {
at91_sys_write(AT91_PIOB + PIO_PER, AT91_PIO_P(7));
at91_sys_write(AT91_PIOB + PIO_OER, AT91_PIO_P(7));
at91_sys_write(AT91_PIOB + PIO_CODR, AT91_PIO_P(7));
}
/*
* Enable NAND Flash (SmartMedia) interface.
*/
static inline void AT91_CfgPIO_SmartMedia(void) {
/* enable PC0=SMCE, PC1=SMOE, PC3=SMWE, A21=CLE, A22=ALE */
at91_sys_write(AT91_PIOC + PIO_ASR, AT91_PC0_BFCK | AT91_PC1_BFRDY_SMOE | AT91_PC3_BFBAA_SMWE);
at91_sys_write(AT91_PIOC + PIO_PDR, AT91_PC0_BFCK | AT91_PC1_BFRDY_SMOE | AT91_PC3_BFBAA_SMWE);
/* Configure PC2 as input (signal READY of the SmartMedia) */
at91_sys_write(AT91_PIOC + PIO_PER, AT91_PC2_BFAVD); /* enable direct output enable */
at91_sys_write(AT91_PIOC + PIO_ODR, AT91_PC2_BFAVD); /* disable output */
/* Configure PB1 as input (signal Card Detect of the SmartMedia) */
at91_sys_write(AT91_PIOB + PIO_PER, AT91_PIO_P(1)); /* enable direct output enable */
at91_sys_write(AT91_PIOB + PIO_ODR, AT91_PIO_P(1)); /* disable output */
}
static inline int AT91_PIO_SmartMedia_RDY(void) {
return (at91_sys_read(AT91_PIOC + PIO_PDSR) & AT91_PIO_P(2)) ? 1 : 0;
}
static inline int AT91_PIO_SmartMedia_CardDetect(void) {
return (at91_sys_read(AT91_PIOB + PIO_PDSR) & AT91_PIO_P(1)) ? 1 : 0;
}
#endif

10
include/asm-arm/arch-at91rm9200/system.h
View file

@ -21,7 +21,7 @@
#ifndef __ASM_ARCH_SYSTEM_H
#define __ASM_ARCH_SYSTEM_H
#include <asm/arch/hardware.h>
#include <asm/hardware.h>
static inline void arch_idle(void)
{
@ -48,4 +48,12 @@ static inline void arch_reset(char mode)
at91_sys_write(AT91_ST_CR, AT91_ST_WDRST);
}
#define ARCH_ID_AT91RM9200 0x09200080
#define ARCH_ID_AT91SAM9261 0x019000a0
static inline unsigned long arch_identify(void)
{
return at91_sys_read(AT91_DBGU_CIDR) & (AT91_CIDR_EPROC | AT91_CIDR_ARCH);
}
#endif

2
include/asm-arm/arch-at91rm9200/timex.h
View file

@ -21,7 +21,7 @@
#ifndef __ASM_ARCH_TIMEX_H
#define __ASM_ARCH_TIMEX_H
#include <asm/arch/hardware.h>
#include <asm/hardware.h>
#define CLOCK_TICK_RATE (AT91_SLOW_CLOCK)

2
include/asm-arm/arch-at91rm9200/uncompress.h
View file

@ -21,7 +21,7 @@
#ifndef __ASM_ARCH_UNCOMPRESS_H
#define __ASM_ARCH_UNCOMPRESS_H
#include <asm/arch/hardware.h>
#include <asm/hardware.h>
/*
* The following code assumes the serial port has already been

2
include/asm-arm/arch-at91rm9200/vmalloc.h
View file

@ -21,6 +21,6 @@
#ifndef __ASM_ARCH_VMALLOC_H
#define __ASM_ARCH_VMALLOC_H
#define VMALLOC_END (AT91_IO_VIRT_BASE & PGDIR_MASK)
#define VMALLOC_END (AT91_SRAM_VIRT_BASE & PGDIR_MASK)
#endif

8
include/asm-arm/arch-imx/imx-dma.h
View file

@ -46,7 +46,7 @@
struct imx_dma_channel {
const char *name;
void (*irq_handler) (int, void *, struct pt_regs *);
void (*err_handler) (int, void *, struct pt_regs *);
void (*err_handler) (int, void *, struct pt_regs *, int errcode);
void *data;
dmamode_t dma_mode;
struct scatterlist *sg;
@ -58,6 +58,10 @@ struct imx_dma_channel {
extern struct imx_dma_channel imx_dma_channels[IMX_DMA_CHANNELS];
#define IMX_DMA_ERR_BURST 1
#define IMX_DMA_ERR_REQUEST 2
#define IMX_DMA_ERR_TRANSFER 4
#define IMX_DMA_ERR_BUFFER 8
/* The type to distinguish channel numbers parameter from ordinal int type */
typedef int imx_dmach_t;
@ -74,7 +78,7 @@ imx_dma_setup_sg(imx_dmach_t dma_ch,
int
imx_dma_setup_handlers(imx_dmach_t dma_ch,
void (*irq_handler) (int, void *, struct pt_regs *),
void (*err_handler) (int, void *, struct pt_regs *), void *data);
void (*err_handler) (int, void *, struct pt_regs *, int), void *data);
void imx_dma_enable(imx_dmach_t dma_ch);

2
include/asm-arm/arch-ixp23xx/entry-macro.S
View file

@ -8,7 +8,7 @@
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldr \irqnr, =(IXP23XX_INTC_VIRT + IXP23XX_INTR_IRQ_ENC_ST_OFFSET)
ldr \irqnr, [\irqnr] @ get interrupt number
cmp \irqnr, #0x0 @ suprious interrupt ?
cmp \irqnr, #0x0 @ spurious interrupt ?
movne \irqnr, \irqnr, lsr #2 @ skip unwanted low order bits
subne \irqnr, \irqnr, #1 @ convert to 0 based

5
include/asm-arm/arch-ixp23xx/ixp23xx.h
View file

@ -124,6 +124,7 @@
#define IXP23XX_EXP_UNIT_FUSE IXP23XX_EXP_CFG_REG(0x28)
#define IXP23XX_EXP_MSF_MUX IXP23XX_EXP_CFG_REG(0x30)
#define IXP23XX_EXP_CFG_FUSE IXP23XX_EXP_CFG_REG(0x34)
#define IXP23XX_EXP_BUS_PHYS 0x90000000
#define IXP23XX_EXP_BUS_WINDOW_SIZE 0x01000000
@ -251,7 +252,7 @@
* CAP CSRs.
****************************************************************************/
#define IXP23XX_GLOBAL_REG(x) ((volatile unsigned long *)(IXP23XX_CAP_CSR_VIRT + 0x4a00 + (x)))
#define IXP23XX_PROD_IDG IXP23XX_GLOBAL_REG(0x00)
#define IXP23XX_PRODUCT_ID IXP23XX_GLOBAL_REG(0x00)
#define IXP23XX_MISC_CONTROL IXP23XX_GLOBAL_REG(0x04)
#define IXP23XX_MSF_CLK_CNTRL IXP23XX_GLOBAL_REG(0x08)
#define IXP23XX_RESET0 IXP23XX_GLOBAL_REG(0x0c)
@ -265,6 +266,8 @@
#define IXP23XX_PCI_UNIT_RESET (1 << 1)
#define IXP23XX_XSCALE_RESET (1 << 0)
#define IXP23XX_UENGINE_CSR_VIRT_BASE (IXP23XX_CAP_CSR_VIRT + 0x18000)
/****************************************************************************
* PCI CSRs.

15
include/asm-arm/arch-ixp23xx/platform.h
View file

@ -14,6 +14,21 @@
#ifndef __ASSEMBLY__
extern inline unsigned long ixp2000_reg_read(volatile void *reg)
{
return *((volatile unsigned long *)reg);
}
extern inline void ixp2000_reg_write(volatile void *reg, unsigned long val)
{
*((volatile unsigned long *)reg) = val;
}
extern inline void ixp2000_reg_wrb(volatile void *reg, unsigned long val)
{
*((volatile unsigned long *)reg) = val;
}
struct pci_sys_data;
void ixp23xx_map_io(void);

38
include/asm-arm/arch-netx/debug-macro.S Normal file
View file

@ -0,0 +1,38 @@
/* linux/include/asm-arm/arch-netx/debug-macro.S
*
* Debugging macro include header
*
* Copyright (C) 1994-1999 Russell King
* Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
#include "hardware.h"
.macro addruart,rx
mrc p15, 0, \rx, c1, c0
tst \rx, #1 @ MMU enabled?
moveq \rx, #0x00100000 @ physical
movne \rx, #io_p2v(0x00100000) @ virtual
orr \rx, \rx, #0x00000a00
.endm
.macro senduart,rd,rx
str \rd, [\rx, #0]
.endm
.macro busyuart,rd,rx
1002: ldr \rd, [\rx, #0x18]
tst \rd, #(1 << 3)
bne 1002b
.endm
.macro waituart,rd,rx
1001: ldr \rd, [\rx, #0x18]
tst \rd, #(1 << 3)
bne 1001b
.endm

21
include/asm-arm/arch-netx/dma.h Normal file
View file

@ -0,0 +1,21 @@
/*
* linux/include/asm-arm/arch-netx/dma.h
*
* Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
* as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#define MAX_DMA_CHANNELS 0
#define MAX_DMA_ADDRESS ~0

35
include/asm-arm/arch-netx/entry-macro.S Normal file
View file

@ -0,0 +1,35 @@
/*
* include/asm-arm/arch-netx/entry-macro.S
*
* Low-level IRQ helper macros for Hilscher netX based platforms
*
* Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
* as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <asm/hardware.h>
.macro disable_fiq
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
mov \base, #io_p2v(0x00100000)
add \base, \base, #0x000ff000
ldr \irqstat, [\base, #0]
clz \irqnr, \irqstat
rsb \irqnr, \irqnr, #31
cmp \irqstat, #0
.endm

27
include/asm-arm/arch-netx/eth.h Normal file
View file

@ -0,0 +1,27 @@
/*
* include/asm-arm/arch-netx/eth.h
*
* Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
* as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef ASMARM_ARCH_ETH_H
#define ASMARM_ARCH_ETH_H
struct netxeth_platform_data {
unsigned int xcno; /* number of xmac/xpec engine this eth uses */
};
#endif

39
include/asm-arm/arch-netx/hardware.h Normal file
View file

@ -0,0 +1,39 @@
/*
* include/asm-arm/arch-netx/hardware.h
*
* Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
* as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __ASM_ARCH_HARDWARE_H
#define __ASM_ARCH_HARDWARE_H
#define NETX_IO_PHYS 0x00100000
#define NETX_IO_VIRT 0xe0000000
#define NETX_IO_SIZE 0x00100000
#define SRAM_INTERNAL_PHYS_0 0x00000
#define SRAM_INTERNAL_PHYS_1 0x08000
#define SRAM_INTERNAL_PHYS_2 0x10000
#define SRAM_INTERNAL_PHYS_3 0x18000
#define SRAM_INTERNAL_PHYS(no) ((no) * 0x8000)
#define XPEC_MEM_SIZE 0x4000
#define XMAC_MEM_SIZE 0x1000
#define SRAM_MEM_SIZE 0x8000
#define io_p2v(x) ((x) - NETX_IO_PHYS + NETX_IO_VIRT)
#define io_v2p(x) ((x) - NETX_IO_VIRT + NETX_IO_PHYS)
#endif

29
include/asm-arm/arch-netx/io.h Normal file
View file

@ -0,0 +1,29 @@
/*
* linux/include/asm-arm/arch-netx/io.h
*
* Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
* as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
#define IO_SPACE_LIMIT 0xffffffff
#define __io(a) ((void __iomem *)(a))
#define __mem_pci(a) (a)
#define __mem_isa(a) (a)
#endif

70
include/asm-arm/arch-netx/irqs.h Normal file
View file

@ -0,0 +1,70 @@
/*
* include/asm-arm/arch-netx/irqs.h
*
* Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
* as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#define NETX_IRQ_VIC_START 0
#define NETX_IRQ_SOFTINT 0
#define NETX_IRQ_TIMER0 1
#define NETX_IRQ_TIMER1 2
#define NETX_IRQ_TIMER2 3
#define NETX_IRQ_SYSTIME_NS 4
#define NETX_IRQ_SYSTIME_S 5
#define NETX_IRQ_GPIO_15 6
#define NETX_IRQ_WATCHDOG 7
#define NETX_IRQ_UART0 8
#define NETX_IRQ_UART1 9
#define NETX_IRQ_UART2 10
#define NETX_IRQ_USB 11
#define NETX_IRQ_SPI 12
#define NETX_IRQ_I2C 13
#define NETX_IRQ_LCD 14
#define NETX_IRQ_HIF 15
#define NETX_IRQ_GPIO_0_14 16
#define NETX_IRQ_XPEC0 17
#define NETX_IRQ_XPEC1 18
#define NETX_IRQ_XPEC2 19
#define NETX_IRQ_XPEC3 20
#define NETX_IRQ_XPEC(no) (17 + (no))
#define NETX_IRQ_MSYNC0 21
#define NETX_IRQ_MSYNC1 22
#define NETX_IRQ_MSYNC2 23
#define NETX_IRQ_MSYNC3 24
#define NETX_IRQ_IRQ_PHY 25
#define NETX_IRQ_ISO_AREA 26
/* int 27 is reserved */
/* int 28 is reserved */
#define NETX_IRQ_TIMER3 29
#define NETX_IRQ_TIMER4 30
/* int 31 is reserved */
#define NETX_IRQS 32
/* for multiplexed irqs on gpio 0..14 */
#define NETX_IRQ_GPIO(x) (NETX_IRQS + (x))
#define NETX_IRQ_GPIO_LAST NETX_IRQ_GPIO(14)
/* Host interface interrupts */
#define NETX_IRQ_HIF_CHAINED(x) (NETX_IRQ_GPIO_LAST + 1 + (x))
#define NETX_IRQ_HIF_PIO35 NETX_IRQ_HIF_CHAINED(0)
#define NETX_IRQ_HIF_PIO36 NETX_IRQ_HIF_CHAINED(1)
#define NETX_IRQ_HIF_PIO40 NETX_IRQ_HIF_CHAINED(2)
#define NETX_IRQ_HIF_PIO47 NETX_IRQ_HIF_CHAINED(3)
#define NETX_IRQ_HIF_PIO72 NETX_IRQ_HIF_CHAINED(4)
#define NETX_IRQ_HIF_LAST NETX_IRQ_HIF_CHAINED(4)
#define NR_IRQS (NETX_IRQ_HIF_LAST + 1)

36
include/asm-arm/arch-netx/memory.h Normal file
View file

@ -0,0 +1,36 @@
/*
* linux/include/asm-arm/arch-netx/memory.h
*
* Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
* as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
#define PHYS_OFFSET UL(0x80000000)
/*
* Virtual view <-> DMA view memory address translations
* virt_to_bus: Used to translate the virtual address to an
* address suitable to be passed to set_dma_addr
* bus_to_virt: Used to convert an address for DMA operations
* to an address that the kernel can use.
*/
#define __virt_to_bus(x) __virt_to_phys(x)
#define __bus_to_virt(x) __phys_to_virt(x)
#endif

410
include/asm-arm/arch-netx/netx-regs.h Normal file
View file

@ -0,0 +1,410 @@
/*
* include/asm-arm/arch-netx/netx-regs.h
*
* Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
* as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __ASM_ARCH_NETX_REGS_H
#define __ASM_ARCH_NETX_REGS_H
/* offsets relative to the beginning of the io space */
#define NETX_OFS_SYSTEM 0x00000
#define NETX_OFS_MEMCR 0x00100
#define NETX_OFS_DPMAS 0x03000
#define NETX_OFS_GPIO 0x00800
#define NETX_OFS_PIO 0x00900
#define NETX_OFS_UART0 0x00a00
#define NETX_OFS_UART1 0x00a40
#define NETX_OFS_UART2 0x00a80
#define NETX_OF_MIIMU 0x00b00
#define NETX_OFS_SPI 0x00c00
#define NETX_OFS_I2C 0x00d00
#define NETX_OFS_SYSTIME 0x01100
#define NETX_OFS_RTC 0x01200
#define NETX_OFS_EXTBUS 0x03600
#define NETX_OFS_LCD 0x04000
#define NETX_OFS_USB 0x20000
#define NETX_OFS_XMAC0 0x60000
#define NETX_OFS_XMAC1 0x61000
#define NETX_OFS_XMAC2 0x62000
#define NETX_OFS_XMAC3 0x63000
#define NETX_OFS_XMAC(no) (0x60000 + (no) * 0x1000)
#define NETX_OFS_PFIFO 0x64000
#define NETX_OFS_XPEC0 0x70000
#define NETX_OFS_XPEC1 0x74000
#define NETX_OFS_XPEC2 0x78000
#define NETX_OFS_XPEC3 0x7c000
#define NETX_OFS_XPEC(no) (0x70000 + (no) * 0x4000)
#define NETX_OFS_VIC 0xff000
/* physical addresses */
#define NETX_PA_SYSTEM (NETX_IO_PHYS + NETX_OFS_SYSTEM)
#define NETX_PA_MEMCR (NETX_IO_PHYS + NETX_OFS_MEMCR)
#define NETX_PA_DPMAS (NETX_IO_PHYS + NETX_OFS_DPMAS)
#define NETX_PA_GPIO (NETX_IO_PHYS + NETX_OFS_GPIO)
#define NETX_PA_PIO (NETX_IO_PHYS + NETX_OFS_PIO)
#define NETX_PA_UART0 (NETX_IO_PHYS + NETX_OFS_UART0)
#define NETX_PA_UART1 (NETX_IO_PHYS + NETX_OFS_UART1)
#define NETX_PA_UART2 (NETX_IO_PHYS + NETX_OFS_UART2)
#define NETX_PA_MIIMU (NETX_IO_PHYS + NETX_OF_MIIMU)
#define NETX_PA_SPI (NETX_IO_PHYS + NETX_OFS_SPI)
#define NETX_PA_I2C (NETX_IO_PHYS + NETX_OFS_I2C)
#define NETX_PA_SYSTIME (NETX_IO_PHYS + NETX_OFS_SYSTIME)
#define NETX_PA_RTC (NETX_IO_PHYS + NETX_OFS_RTC)
#define NETX_PA_EXTBUS (NETX_IO_PHYS + NETX_OFS_EXTBUS)
#define NETX_PA_LCD (NETX_IO_PHYS + NETX_OFS_LCD)
#define NETX_PA_USB (NETX_IO_PHYS + NETX_OFS_USB)
#define NETX_PA_XMAC0 (NETX_IO_PHYS + NETX_OFS_XMAC0)
#define NETX_PA_XMAC1 (NETX_IO_PHYS + NETX_OFS_XMAC1)
#define NETX_PA_XMAC2 (NETX_IO_PHYS + NETX_OFS_XMAC2)
#define NETX_PA_XMAC3 (NETX_IO_PHYS + NETX_OFS_XMAC3)
#define NETX_PA_XMAC(no) (NETX_IO_PHYS + NETX_OFS_XMAC(no))
#define NETX_PA_PFIFO (NETX_IO_PHYS + NETX_OFS_PFIFO)
#define NETX_PA_XPEC0 (NETX_IO_PHYS + NETX_OFS_XPEC0)
#define NETX_PA_XPEC1 (NETX_IO_PHYS + NETX_OFS_XPEC1)
#define NETX_PA_XPEC2 (NETX_IO_PHYS + NETX_OFS_XPEC2)
#define NETX_PA_XPEC3 (NETX_IO_PHYS + NETX_OFS_XPEC3)
#define NETX_PA_XPEC(no) (NETX_IO_PHYS + NETX_OFS_XPEC(no))
#define NETX_PA_VIC (NETX_IO_PHYS + NETX_OFS_VIC)
/* virual addresses */
#define NETX_VA_SYSTEM (NETX_IO_VIRT + NETX_OFS_SYSTEM)
#define NETX_VA_MEMCR (NETX_IO_VIRT + NETX_OFS_MEMCR)
#define NETX_VA_DPMAS (NETX_IO_VIRT + NETX_OFS_DPMAS)
#define NETX_VA_GPIO (NETX_IO_VIRT + NETX_OFS_GPIO)
#define NETX_VA_PIO (NETX_IO_VIRT + NETX_OFS_PIO)
#define NETX_VA_UART0 (NETX_IO_VIRT + NETX_OFS_UART0)
#define NETX_VA_UART1 (NETX_IO_VIRT + NETX_OFS_UART1)
#define NETX_VA_UART2 (NETX_IO_VIRT + NETX_OFS_UART2)
#define NETX_VA_MIIMU (NETX_IO_VIRT + NETX_OF_MIIMU)
#define NETX_VA_SPI (NETX_IO_VIRT + NETX_OFS_SPI)
#define NETX_VA_I2C (NETX_IO_VIRT + NETX_OFS_I2C)
#define NETX_VA_SYSTIME (NETX_IO_VIRT + NETX_OFS_SYSTIME)
#define NETX_VA_RTC (NETX_IO_VIRT + NETX_OFS_RTC)
#define NETX_VA_EXTBUS (NETX_IO_VIRT + NETX_OFS_EXTBUS)
#define NETX_VA_LCD (NETX_IO_VIRT + NETX_OFS_LCD)
#define NETX_VA_USB (NETX_IO_VIRT + NETX_OFS_USB)
#define NETX_VA_XMAC0 (NETX_IO_VIRT + NETX_OFS_XMAC0)
#define NETX_VA_XMAC1 (NETX_IO_VIRT + NETX_OFS_XMAC1)
#define NETX_VA_XMAC2 (NETX_IO_VIRT + NETX_OFS_XMAC2)
#define NETX_VA_XMAC3 (NETX_IO_VIRT + NETX_OFS_XMAC3)
#define NETX_VA_XMAC(no) (NETX_IO_VIRT + NETX_OFS_XMAC(no))
#define NETX_VA_PFIFO (NETX_IO_VIRT + NETX_OFS_PFIFO)
#define NETX_VA_XPEC0 (NETX_IO_VIRT + NETX_OFS_XPEC0)
#define NETX_VA_XPEC1 (NETX_IO_VIRT + NETX_OFS_XPEC1)
#define NETX_VA_XPEC2 (NETX_IO_VIRT + NETX_OFS_XPEC2)
#define NETX_VA_XPEC3 (NETX_IO_VIRT + NETX_OFS_XPEC3)
#define NETX_VA_XPEC(no) (NETX_IO_VIRT + NETX_OFS_XPEC(no))
#define NETX_VA_VIC (NETX_IO_VIRT + NETX_OFS_VIC)
/*********************************
* System functions *
*********************************/
/* Registers */
#define NETX_SYSTEM_REG(ofs) __io(NETX_VA_SYSTEM + (ofs))
#define NETX_SYSTEM_BOO_SR NETX_SYSTEM_REG(0x00)
#define NETX_SYSTEM_IOC_CR NETX_SYSTEM_REG(0x04)
#define NETX_SYSTEM_IOC_MR NETX_SYSTEM_REG(0x08)
/* FIXME: Docs are not consistent */
#define NETX_SYSTEM_RES_CR NETX_SYSTEM_REG(0x08)
/* #define NETX_SYSTEM_RES_CR NETX_SYSTEM_REG(0x0c) */
#define NETX_SYSTEM_PHY_CONTROL NETX_SYSTEM_REG(0x10)
#define NETX_SYSTEM_REV NETX_SYSTEM_REG(0x34)
#define NETX_SYSTEM_IOC_ACCESS_KEY NETX_SYSTEM_REG(0x70)
#define NETX_SYSTEM_WDG_TR NETX_SYSTEM_REG(0x200)
#define NETX_SYSTEM_WDG_CTR NETX_SYSTEM_REG(0x204)
#define NETX_SYSTEM_WDG_IRQ_TIMEOUT NETX_SYSTEM_REG(0x208)
#define NETX_SYSTEM_WDG_RES_TIMEOUT NETX_SYSTEM_REG(0x20c)
/* Bits */
#define NETX_SYSTEM_RES_CR_RSTIN (1<<0)
#define NETX_SYSTEM_RES_CR_WDG_RES (1<<1)
#define NETX_SYSTEM_RES_CR_HOST_RES (1<<2)
#define NETX_SYSTEM_RES_CR_FIRMW_RES (1<<3)
#define NETX_SYSTEM_RES_CR_XPEC0_RES (1<<4)
#define NETX_SYSTEM_RES_CR_XPEC1_RES (1<<5)
#define NETX_SYSTEM_RES_CR_XPEC2_RES (1<<6)
#define NETX_SYSTEM_RES_CR_XPEC3_RES (1<<7)
#define NETX_SYSTEM_RES_CR_DIS_XPEC0_RES (1<<16)
#define NETX_SYSTEM_RES_CR_DIS_XPEC1_RES (1<<17)
#define NETX_SYSTEM_RES_CR_DIS_XPEC2_RES (1<<18)
#define NETX_SYSTEM_RES_CR_DIS_XPEC3_RES (1<<19)
#define NETX_SYSTEM_RES_CR_FIRMW_FLG0 (1<<20)
#define NETX_SYSTEM_RES_CR_FIRMW_FLG1 (1<<21)
#define NETX_SYSTEM_RES_CR_FIRMW_FLG2 (1<<22)
#define NETX_SYSTEM_RES_CR_FIRMW_FLG3 (1<<23)
#define NETX_SYSTEM_RES_CR_FIRMW_RES_EN (1<<24)
#define NETX_SYSTEM_RES_CR_RSTOUT (1<<25)
#define NETX_SYSTEM_RES_CR_EN_RSTOUT (1<<26)
#define PHY_CONTROL_RESET (1<<31)
#define PHY_CONTROL_SIM_BYP (1<<30)
#define PHY_CONTROL_CLK_XLATIN (1<<29)
#define PHY_CONTROL_PHY1_EN (1<<21)
#define PHY_CONTROL_PHY1_NP_MSG_CODE
#define PHY_CONTROL_PHY1_AUTOMDIX (1<<17)
#define PHY_CONTROL_PHY1_FIXMODE (1<<16)
#define PHY_CONTROL_PHY1_MODE(mode) (((mode) & 0x7) << 13)
#define PHY_CONTROL_PHY0_EN (1<<12)
#define PHY_CONTROL_PHY0_NP_MSG_CODE
#define PHY_CONTROL_PHY0_AUTOMDIX (1<<8)
#define PHY_CONTROL_PHY0_FIXMODE (1<<7)
#define PHY_CONTROL_PHY0_MODE(mode) (((mode) & 0x7) << 4)
#define PHY_CONTROL_PHY_ADDRESS(adr) ((adr) & 0xf)
#define PHY_MODE_10BASE_T_HALF 0
#define PHY_MODE_10BASE_T_FULL 1
#define PHY_MODE_100BASE_TX_FX_FULL 2
#define PHY_MODE_100BASE_TX_FX_HALF 3
#define PHY_MODE_100BASE_TX_HALF 4
#define PHY_MODE_REPEATER 5
#define PHY_MODE_POWER_DOWN 6
#define PHY_MODE_ALL 7
/* Bits */
#define VECT_CNTL_ENABLE (1 << 5)
/*******************************
* GPIO and timer module *
*******************************/
/* Registers */
#define NETX_GPIO_REG(ofs) __io(NETX_VA_GPIO + (ofs))
#define NETX_GPIO_CFG(gpio) NETX_GPIO_REG(0x0 + ((gpio)<<2))
#define NETX_GPIO_THRESHOLD_CAPTURE(gpio) NETX_GPIO_REG(0x40 + ((gpio)<<2))
#define NETX_GPIO_COUNTER_CTRL(counter) NETX_GPIO_REG(0x80 + ((counter)<<2))
#define NETX_GPIO_COUNTER_MAX(counter) NETX_GPIO_REG(0x94 + ((counter)<<2))
#define NETX_GPIO_COUNTER_CURRENT(counter) NETX_GPIO_REG(0xa8 + ((counter)<<2))
#define NETX_GPIO_IRQ_ENABLE NETX_GPIO_REG(0xbc)
#define NETX_GPIO_IRQ_DISABLE NETX_GPIO_REG(0xc0)
#define NETX_GPIO_SYSTIME_NS_CMP NETX_GPIO_REG(0xc4)
#define NETX_GPIO_LINE NETX_GPIO_REG(0xc8)
#define NETX_GPIO_IRQ NETX_GPIO_REG(0xd0)
/* Bits */
#define NETX_GPIO_CFG_IOCFG_GP_INPUT (0x0)
#define NETX_GPIO_CFG_IOCFG_GP_OUTPUT (0x1)
#define NETX_GPIO_CFG_IOCFG_GP_UART (0x2)
#define NETX_GPIO_CFG_INV (1<<2)
#define NETX_GPIO_CFG_MODE_INPUT_READ (0<<3)
#define NETX_GPIO_CFG_MODE_INPUT_CAPTURE_CONT_RISING (1<<3)
#define NETX_GPIO_CFG_MODE_INPUT_CAPTURE_ONCE_RISING (2<<3)
#define NETX_GPIO_CFG_MODE_INPUT_CAPTURE_HIGH_LEVEL (3<<3)
#define NETX_GPIO_CFG_COUNT_REF_COUNTER0 (0<<5)
#define NETX_GPIO_CFG_COUNT_REF_COUNTER1 (1<<5)
#define NETX_GPIO_CFG_COUNT_REF_COUNTER2 (2<<5)
#define NETX_GPIO_CFG_COUNT_REF_COUNTER3 (3<<5)
#define NETX_GPIO_CFG_COUNT_REF_COUNTER4 (4<<5)
#define NETX_GPIO_CFG_COUNT_REF_SYSTIME (7<<5)
#define NETX_GPIO_COUNTER_CTRL_RUN (1<<0)
#define NETX_GPIO_COUNTER_CTRL_SYM (1<<1)
#define NETX_GPIO_COUNTER_CTRL_ONCE (1<<2)
#define NETX_GPIO_COUNTER_CTRL_IRQ_EN (1<<3)
#define NETX_GPIO_COUNTER_CTRL_CNT_EVENT (1<<4)
#define NETX_GPIO_COUNTER_CTRL_RST_EN (1<<5)
#define NETX_GPIO_COUNTER_CTRL_SEL_EVENT (1<<6)
#define NETX_GPIO_COUNTER_CTRL_GPIO_REF /* FIXME */
#define GPIO_BIT(gpio) (1<<(gpio))
#define COUNTER_BIT(counter) ((1<<16)<<(counter))
/*******************************
* PIO *
*******************************/
/* Registers */
#define NETX_PIO_REG(ofs) __io(NETX_VA_PIO + (ofs))
#define NETX_PIO_INPIO NETX_PIO_REG(0x0)
#define NETX_PIO_OUTPIO NETX_PIO_REG(0x4)
#define NETX_PIO_OEPIO NETX_PIO_REG(0x8)
/*******************************
* MII Unit *
*******************************/
/* Registers */
#define NETX_MIIMU __io(NETX_VA_MIIMU)
/* Bits */
#define MIIMU_SNRDY (1<<0)
#define MIIMU_PREAMBLE (1<<1)
#define MIIMU_OPMODE_WRITE (1<<2)
#define MIIMU_MDC_PERIOD (1<<3)
#define MIIMU_PHY_NRES (1<<4)
#define MIIMU_RTA (1<<5)
#define MIIMU_REGADDR(adr) (((adr) & 0x1f) << 6)
#define MIIMU_PHYADDR(adr) (((adr) & 0x1f) << 11)
#define MIIMU_DATA(data) (((data) & 0xffff) << 16)
/*******************************
* xmac / xpec *
*******************************/
/* XPEC register offsets relative to NETX_VA_XPEC(no) */
#define NETX_XPEC_R0_OFS 0x00
#define NETX_XPEC_R1_OFS 0x04
#define NETX_XPEC_R2_OFS 0x08
#define NETX_XPEC_R3_OFS 0x0c
#define NETX_XPEC_R4_OFS 0x10
#define NETX_XPEC_R5_OFS 0x14
#define NETX_XPEC_R6_OFS 0x18
#define NETX_XPEC_R7_OFS 0x1c
#define NETX_XPEC_RANGE01_OFS 0x20
#define NETX_XPEC_RANGE23_OFS 0x24
#define NETX_XPEC_RANGE45_OFS 0x28
#define NETX_XPEC_RANGE67_OFS 0x2c
#define NETX_XPEC_PC_OFS 0x48
#define NETX_XPEC_TIMER_OFS(timer) (0x30 + ((timer)<<2))
#define NETX_XPEC_IRQ_OFS 0x8c
#define NETX_XPEC_SYSTIME_NS_OFS 0x90
#define NETX_XPEC_FIFO_DATA_OFS 0x94
#define NETX_XPEC_SYSTIME_S_OFS 0x98
#define NETX_XPEC_ADC_OFS 0x9c
#define NETX_XPEC_URX_COUNT_OFS 0x40
#define NETX_XPEC_UTX_COUNT_OFS 0x44
#define NETX_XPEC_PC_OFS 0x48
#define NETX_XPEC_ZERO_OFS 0x4c
#define NETX_XPEC_STATCFG_OFS 0x50
#define NETX_XPEC_EC_MASKA_OFS 0x54
#define NETX_XPEC_EC_MASKB_OFS 0x58
#define NETX_XPEC_EC_MASK0_OFS 0x5c
#define NETX_XPEC_EC_MASK8_OFS 0x7c
#define NETX_XPEC_EC_MASK9_OFS 0x80
#define NETX_XPEC_XPU_HOLD_PC_OFS 0x100
#define NETX_XPEC_RAM_START_OFS 0x2000
/* Bits */
#define XPU_HOLD_PC (1<<0)
/* XMAC register offsets relative to NETX_VA_XMAC(no) */
#define NETX_XMAC_RPU_PROGRAM_START_OFS 0x000
#define NETX_XMAC_RPU_PROGRAM_END_OFS 0x3ff
#define NETX_XMAC_TPU_PROGRAM_START_OFS 0x400
#define NETX_XMAC_TPU_PROGRAM_END_OFS 0x7ff
#define NETX_XMAC_RPU_HOLD_PC_OFS 0xa00
#define NETX_XMAC_TPU_HOLD_PC_OFS 0xa04
#define NETX_XMAC_STATUS_SHARED0_OFS 0x840
#define NETX_XMAC_CONFIG_SHARED0_OFS 0x844
#define NETX_XMAC_STATUS_SHARED1_OFS 0x848
#define NETX_XMAC_CONFIG_SHARED1_OFS 0x84c
#define NETX_XMAC_STATUS_SHARED2_OFS 0x850
#define NETX_XMAC_CONFIG_SHARED2_OFS 0x854
#define NETX_XMAC_STATUS_SHARED3_OFS 0x858
#define NETX_XMAC_CONFIG_SHARED3_OFS 0x85c
#define RPU_HOLD_PC (1<<15)
#define TPU_HOLD_PC (1<<15)
/*******************************
* Pointer FIFO *
*******************************/
/* Registers */
#define NETX_PFIFO_REG(ofs) __io(NETX_VA_PFIFO + (ofs))
#define NETX_PFIFO_BASE(pfifo) NETX_PFIFO_REG(0x00 + ((pfifo)<<2))
#define NETX_PFIFO_BORDER_BASE(pfifo) NETX_PFIFO_REG(0x80 + ((pfifo)<<2))
#define NETX_PFIFO_RESET NETX_PFIFO_REG(0x100)
#define NETX_PFIFO_FULL NETX_PFIFO_REG(0x104)
#define NETX_PFIFO_EMPTY NETX_PFIFO_REG(0x108)
#define NETX_PFIFO_OVEFLOW NETX_PFIFO_REG(0x10c)
#define NETX_PFIFO_UNDERRUN NETX_PFIFO_REG(0x110)
#define NETX_PFIFO_FILL_LEVEL(pfifo) NETX_PFIFO_REG(0x180 + ((pfifo)<<2))
#define NETX_PFIFO_XPEC_ISR(xpec) NETX_PFIFO_REG(0x400 + ((xpec) << 2))
/*******************************
* Dual Port Memory *
*******************************/
/* Registers */
#define NETX_DPMAS_REG(ofs) __io(NETX_VA_DPMAS + (ofs))
#define NETX_DPMAS_SYS_STAT NETX_DPMAS_REG(0x4d8)
#define NETX_DPMAS_INT_STAT NETX_DPMAS_REG(0x4e0)
#define NETX_DPMAS_INT_EN NETX_DPMAS_REG(0x4f0)
#define NETX_DPMAS_IF_CONF0 NETX_DPMAS_REG(0x608)
#define NETX_DPMAS_IF_CONF1 NETX_DPMAS_REG(0x60c)
#define NETX_DPMAS_EXT_CONFIG(cs) NETX_DPMAS_REG(0x610 + 4 * (cs))
#define NETX_DPMAS_IO_MODE0 NETX_DPMAS_REG(0x620) /* I/O 32..63 */
#define NETX_DPMAS_DRV_EN0 NETX_DPMAS_REG(0x624)
#define NETX_DPMAS_DATA0 NETX_DPMAS_REG(0x628)
#define NETX_DPMAS_IO_MODE1 NETX_DPMAS_REG(0x630) /* I/O 64..84 */
#define NETX_DPMAS_DRV_EN1 NETX_DPMAS_REG(0x634)
#define NETX_DPMAS_DATA1 NETX_DPMAS_REG(0x638)
/* Bits */
#define NETX_DPMAS_INT_EN_GLB_EN (1<<31)
#define NETX_DPMAS_INT_EN_MEM_LCK (1<<30)
#define NETX_DPMAS_INT_EN_WDG (1<<29)
#define NETX_DPMAS_INT_EN_PIO72 (1<<28)
#define NETX_DPMAS_INT_EN_PIO47 (1<<27)
#define NETX_DPMAS_INT_EN_PIO40 (1<<26)
#define NETX_DPMAS_INT_EN_PIO36 (1<<25)
#define NETX_DPMAS_INT_EN_PIO35 (1<<24)
#define NETX_DPMAS_IF_CONF0_HIF_DISABLED (0<<28)
#define NETX_DPMAS_IF_CONF0_HIF_EXT_BUS (1<<28)
#define NETX_DPMAS_IF_CONF0_HIF_UP_8BIT (2<<28)
#define NETX_DPMAS_IF_CONF0_HIF_UP_16BIT (3<<28)
#define NETX_DPMAS_IF_CONF0_HIF_IO (4<<28)
#define NETX_DPMAS_IF_CONF0_WAIT_DRV_PP (1<<14)
#define NETX_DPMAS_IF_CONF0_WAIT_DRV_OD (2<<14)
#define NETX_DPMAS_IF_CONF0_WAIT_DRV_TRI (3<<14)
#define NETX_DPMAS_IF_CONF1_IRQ_POL_PIO35 (1<<26)
#define NETX_DPMAS_IF_CONF1_IRQ_POL_PIO36 (1<<27)
#define NETX_DPMAS_IF_CONF1_IRQ_POL_PIO40 (1<<28)
#define NETX_DPMAS_IF_CONF1_IRQ_POL_PIO47 (1<<29)
#define NETX_DPMAS_IF_CONF1_IRQ_POL_PIO72 (1<<30)
#define NETX_EXT_CONFIG_TALEWIDTH(x) (((x) & 0x7) << 29)
#define NETX_EXT_CONFIG_TADRHOLD(x) (((x) & 0x7) << 26)
#define NETX_EXT_CONFIG_TCSON(x) (((x) & 0x7) << 23)
#define NETX_EXT_CONFIG_TRDON(x) (((x) & 0x7) << 20)
#define NETX_EXT_CONFIG_TWRON(x) (((x) & 0x7) << 17)
#define NETX_EXT_CONFIG_TWROFF(x) (((x) & 0x1f) << 12)
#define NETX_EXT_CONFIG_TRDWRCYC(x) (((x) & 0x1f) << 7)
#define NETX_EXT_CONFIG_WAIT_POL (1<<6)
#define NETX_EXT_CONFIG_WAIT_EN (1<<5)
#define NETX_EXT_CONFIG_NRD_MODE (1<<4)
#define NETX_EXT_CONFIG_DS_MODE (1<<3)
#define NETX_EXT_CONFIG_NWR_MODE (1<<2)
#define NETX_EXT_CONFIG_16BIT (1<<1)
#define NETX_EXT_CONFIG_CS_ENABLE (1<<0)
#define NETX_DPMAS_IO_MODE0_WRL (1<<13)
#define NETX_DPMAS_IO_MODE0_WAIT (1<<14)
#define NETX_DPMAS_IO_MODE0_READY (1<<15)
#define NETX_DPMAS_IO_MODE0_CS0 (1<<19)
#define NETX_DPMAS_IO_MODE0_EXTRD (1<<20)
#define NETX_DPMAS_IO_MODE1_CS2 (1<<15)
#define NETX_DPMAS_IO_MODE1_CS1 (1<<16)
#define NETX_DPMAS_IO_MODE1_SAMPLE_NPOR (0<<30)
#define NETX_DPMAS_IO_MODE1_SAMPLE_100MHZ (1<<30)
#define NETX_DPMAS_IO_MODE1_SAMPLE_NPIO36 (2<<30)
#define NETX_DPMAS_IO_MODE1_SAMPLE_PIO36 (3<<30)
/*******************************
* I2C *
*******************************/
#define NETX_I2C_REG(ofs) __io(NETX_VA_I2C, (ofs))
#define NETX_I2C_CTRL NETX_I2C_REG(0x0)
#define NETX_I2C_DATA NETX_I2C_REG(0x4)
#endif /* __ASM_ARCH_NETX_REGS_H */

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/*
* linux/include/asm-arm/arch-netx/param.h
*
* Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
* as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/

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/*
* include/asm-arm/arch-netx/pfifo.h
*
* Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
* as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef ASM_ARCH_PFIFO_H
#define ASM_ARCH_PFIFO_H
static inline int pfifo_push(int no, unsigned int pointer)
{
writel(pointer, NETX_PFIFO_BASE(no));
return 0;
}
static inline unsigned int pfifo_pop(int no)
{
return readl(NETX_PFIFO_BASE(no));
}
static inline int pfifo_fill_level(int no)
{
return readl(NETX_PFIFO_FILL_LEVEL(no));
}
static inline int pfifo_full(int no)
{
return readl(NETX_PFIFO_FULL) & (1<<no) ? 1 : 0;
}
static inline int pfifo_empty(int no)
{
return readl(NETX_PFIFO_EMPTY) & (1<<no) ? 1 : 0;
}
int pfifo_request(unsigned int pfifo_mask);
void pfifo_free(unsigned int pfifo_mask);
#endif /* ASM_ARCH_PFIFO_H */

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/*
* include/asm-arm/arch-netx/system.h
*
* Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
* as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __ASM_ARCH_SYSTEM_H
#define __ASM_ARCH_SYSTEM_H
#include <asm/io.h>
#include <asm/hardware.h>
#include "netx-regs.h"
static inline void arch_idle(void)
{
cpu_do_idle();
}
static inline void arch_reset(char mode)
{
writel(NETX_SYSTEM_RES_CR_FIRMW_RES_EN | NETX_SYSTEM_RES_CR_FIRMW_RES,
NETX_SYSTEM_RES_CR);
}
#endif

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include/asm-arm/arch-netx/timex.h Normal file
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/*
* include/asm-arm/arch-netx/timex.h
*
* Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
* as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#define CLOCK_TICK_RATE 100000000

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/*
* include/asm-arm/arch-netx/uncompress.h
*
* Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
* as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
/*
* The following code assumes the serial port has already been
* initialized by the bootloader. We search for the first enabled
* port in the most probable order. If you didn't setup a port in
* your bootloader then nothing will appear (which might be desired).
*
* This does not append a newline
*/
#define REG(x) (*(volatile unsigned long *)(x))
#define UART1_BASE 0x100a00
#define UART2_BASE 0x100a80
#define UART_DR 0x0
#define UART_CR 0x14
#define CR_UART_EN (1<<0)
#define UART_FR 0x18
#define FR_BUSY (1<<3)
#define FR_TXFF (1<<5)
static void putc(char c)
{
unsigned long base;
if (REG(UART1_BASE + UART_CR) & CR_UART_EN)
base = UART1_BASE;
else if (REG(UART2_BASE + UART_CR) & CR_UART_EN)
base = UART2_BASE;
else
return;
while (REG(base + UART_FR) & FR_TXFF);
REG(base + UART_DR) = c;
}
static inline void flush(void)
{
unsigned long base;
if (REG(UART1_BASE + UART_CR) & CR_UART_EN)
base = UART1_BASE;
else if (REG(UART2_BASE + UART_CR) & CR_UART_EN)
base = UART2_BASE;
else
return;
while (REG(base + UART_FR) & FR_BUSY);
}
/*
* nothing to do
*/
#define arch_decomp_setup()
#define arch_decomp_wdog()

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include/asm-arm/arch-netx/vmalloc.h Normal file
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/*
* linux/include/asm-arm/arch-netx/vmalloc.h
*
* Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
* as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#define VMALLOC_END (PAGE_OFFSET + 0x10000000)

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/*
* linux/include/asm-arm/arch-netx/xc.h
*
* Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
* as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __ASM_ARCH_XC_H
#define __ASM_ARCH_XC_H
struct xc {
int no;
unsigned int type;
unsigned int version;
void __iomem *xpec_base;
void __iomem *xmac_base;
void __iomem *sram_base;
int irq;
struct device *dev;
};
int xc_reset(struct xc *x);
int xc_stop(struct xc* x);
int xc_start(struct xc *x);
int xc_running(struct xc *x);
int xc_request_firmware(struct xc* x);
struct xc* request_xc(int xcno, struct device *dev);
void free_xc(struct xc *x);
#endif /* __ASM_ARCH_XC_H */

4
include/asm-arm/arch-pnx4008/debug-macro.S
View file

@ -19,9 +19,5 @@
addne \rx, \rx, #0xf4000000
.endm
.macro senduart,rd,rx
strb \rd, [\rx, #0x0]
.endm
#define UART_SHIFT 2
#include <asm/hardware/debug-8250.S>

102
include/asm-arm/arch-pnx4008/gpio.h
View file

@ -127,6 +127,79 @@
#define GPIO_ISOUT(K) ((GPIO_TYPE_MASK(K) == GPIO_OUT) && (GPIO_BIT(K) & GPIO_OUT_MASK))
#define GPIO_ISIN(K) ((GPIO_TYPE_MASK(K) == GPIO_IN) && (GPIO_BIT(K) & GPIO_IN_MASK))
/* Start Enable Pin Interrupts - table 58 page 66 */
#define SE_PIN_BASE_INT 32
#define SE_U7_RX_INT 63
#define SE_U7_HCTS_INT 62
#define SE_BT_CLKREQ_INT 61
#define SE_U6_IRRX_INT 60
/*59 unused*/
#define SE_U5_RX_INT 58
#define SE_GPI_11_INT 57
#define SE_U3_RX_INT 56
#define SE_U2_HCTS_INT 55
#define SE_U2_RX_INT 54
#define SE_U1_RX_INT 53
#define SE_DISP_SYNC_INT 52
/*51 unused*/
#define SE_SDIO_INT_N 50
#define SE_MSDIO_START_INT 49
#define SE_GPI_06_INT 48
#define SE_GPI_05_INT 47
#define SE_GPI_04_INT 46
#define SE_GPI_03_INT 45
#define SE_GPI_02_INT 44
#define SE_GPI_01_INT 43
#define SE_GPI_00_INT 42
#define SE_SYSCLKEN_PIN_INT 41
#define SE_SPI1_DATAIN_INT 40
#define SE_GPI_07_INT 39
#define SE_SPI2_DATAIN_INT 38
#define SE_GPI_10_INT 37
#define SE_GPI_09_INT 36
#define SE_GPI_08_INT 35
/*34-32 unused*/
/* Start Enable Internal Interrupts - table 57 page 65 */
#define SE_INT_BASE_INT 0
#define SE_TS_IRQ 31
#define SE_TS_P_INT 30
#define SE_TS_AUX_INT 29
/*27-28 unused*/
#define SE_USB_AHB_NEED_CLK_INT 26
#define SE_MSTIMER_INT 25
#define SE_RTC_INT 24
#define SE_USB_NEED_CLK_INT 23
#define SE_USB_INT 22
#define SE_USB_I2C_INT 21
#define SE_USB_OTG_TIMER_INT 20
#define SE_USB_OTG_ATX_INT_N 19
/*18 unused*/
#define SE_DSP_GPIO4_INT 17
#define SE_KEY_IRQ 16
#define SE_DSP_SLAVEPORT_INT 15
#define SE_DSP_GPIO1_INT 14
#define SE_DSP_GPIO0_INT 13
#define SE_DSP_AHB_INT 12
/*11-6 unused*/
#define SE_GPIO_05_INT 5
#define SE_GPIO_04_INT 4
#define SE_GPIO_03_INT 3
#define SE_GPIO_02_INT 2
#define SE_GPIO_01_INT 1
#define SE_GPIO_00_INT 0
#define START_INT_REG_BIT(irq) (1<<((irq)&0x1F))
#define START_INT_ER_REG(irq) IO_ADDRESS((PNX4008_PWRMAN_BASE + 0x20 + (((irq)&(0x1<<5))>>1)))
#define START_INT_RSR_REG(irq) IO_ADDRESS((PNX4008_PWRMAN_BASE + 0x24 + (((irq)&(0x1<<5))>>1)))
#define START_INT_SR_REG(irq) IO_ADDRESS((PNX4008_PWRMAN_BASE + 0x28 + (((irq)&(0x1<<5))>>1)))
#define START_INT_APR_REG(irq) IO_ADDRESS((PNX4008_PWRMAN_BASE + 0x2C + (((irq)&(0x1<<5))>>1)))
extern int pnx4008_gpio_register_pin(unsigned short pin);
extern int pnx4008_gpio_unregister_pin(unsigned short pin);
extern unsigned long pnx4008_gpio_read_pin(unsigned short pin);
@ -136,4 +209,33 @@ extern int pnx4008_gpio_read_pin_direction(unsigned short pin);
extern int pnx4008_gpio_set_pin_mux(unsigned short pin, int output);
extern int pnx4008_gpio_read_pin_mux(unsigned short pin);
static inline void start_int_umask(u8 irq)
{
__raw_writel(__raw_readl(START_INT_ER_REG(irq)) |
START_INT_REG_BIT(irq), START_INT_ER_REG(irq));
}
static inline void start_int_mask(u8 irq)
{
__raw_writel(__raw_readl(START_INT_ER_REG(irq)) &
~START_INT_REG_BIT(irq), START_INT_ER_REG(irq));
}
static inline void start_int_ack(u8 irq)
{
__raw_writel(START_INT_REG_BIT(irq), START_INT_RSR_REG(irq));
}
static inline void start_int_set_falling_edge(u8 irq)
{
__raw_writel(__raw_readl(START_INT_APR_REG(irq)) &
~START_INT_REG_BIT(irq), START_INT_APR_REG(irq));
}
static inline void start_int_set_rising_edge(u8 irq)
{
__raw_writel(__raw_readl(START_INT_APR_REG(irq)) |
START_INT_REG_BIT(irq), START_INT_APR_REG(irq));
}
#endif /* _PNX4008_GPIO_H_ */

29
include/asm-arm/arch-pnx4008/pm.h
View file

@ -29,34 +29,5 @@ extern void pnx4008_cpu_standby(void);
extern int pnx4008_startup_pll(struct clk *);
extern int pnx4008_shutdown_pll(struct clk *);
static inline void start_int_umask(u8 irq)
{
__raw_writel(__raw_readl(START_INT_ER_REG(irq)) |
START_INT_REG_BIT(irq), START_INT_ER_REG(irq));
}
static inline void start_int_mask(u8 irq)
{
__raw_writel(__raw_readl(START_INT_ER_REG(irq)) &
~START_INT_REG_BIT(irq), START_INT_ER_REG(irq));
}
static inline void start_int_ack(u8 irq)
{
__raw_writel(START_INT_REG_BIT(irq), START_INT_RSR_REG(irq));
}
static inline void start_int_set_falling_edge(u8 irq)
{
__raw_writel(__raw_readl(START_INT_APR_REG(irq)) &
~START_INT_REG_BIT(irq), START_INT_APR_REG(irq));
}
static inline void start_int_set_rising_edge(u8 irq)
{
__raw_writel(__raw_readl(START_INT_APR_REG(irq)) |
START_INT_REG_BIT(irq), START_INT_APR_REG(irq));
}
#endif /* ASSEMBLER */
#endif /* __ASM_ARCH_PNX4008_PM_H */

4
include/asm-arm/arch-pxa/poodle.h
View file

@ -31,6 +31,7 @@
#define POODLE_GPIO_CF_CD (14)
#define POODLE_GPIO_CF_STSCHG (14)
#define POODLE_GPIO_SD_PWR (33)
#define POODLE_GPIO_SD_PWR1 (3)
#define POODLE_GPIO_nSD_CLK (6)
#define POODLE_GPIO_nSD_WP (7)
#define POODLE_GPIO_nSD_INT (8)
@ -42,6 +43,7 @@
#define POODLE_GPIO_BYPASS_ON (36)
#define POODLE_GPIO_CHRG_ON (38)
#define POODLE_GPIO_CHRG_FULL (16)
#define POODLE_GPIO_DISCHARGE_ON (42) /* Enable battery discharge */
/* PXA GPIOs */
#define POODLE_IRQ_GPIO_ON_KEY IRQ_GPIO(0)
@ -68,4 +70,6 @@
#define POODLE_SCOOP_IO_DIR ( POODLE_SCOOP_VPEN | POODLE_SCOOP_HS_OUT )
#define POODLE_SCOOP_IO_OUT ( 0 )
extern struct platform_device poodle_locomo_device;
#endif /* __ASM_ARCH_POODLE_H */

18
include/asm-arm/arch-pxa/pxa-regs.h
View file

@ -1625,7 +1625,7 @@
#define SSCR0_RIM (1 << 22) /* Receive FIFO overrrun interrupt mask */
#define SSCR0_TUM (1 << 23) /* Transmit FIFO underrun interrupt mask */
#define SSCR0_FRDC (0x07000000) /* Frame rate divider control (mask) */
#define SSCR0_SlotsPerFrm(c) ((x) - 1) /* Time slots per frame [1..8] */
#define SSCR0_SlotsPerFrm(x) ((x) - 1) /* Time slots per frame [1..8] */
#define SSCR0_ADC (1 << 30) /* Audio clock select */
#define SSCR0_MOD (1 << 31) /* Mode (normal or network) */
#endif
@ -1706,6 +1706,10 @@
#if defined (CONFIG_PXA27x)
#define SSTO_P1 __REG(0x41000028) /* SSP Port 1 Time Out Register */
#define SSPSP_P1 __REG(0x4100002C) /* SSP Port 1 Programmable Serial Protocol */
#define SSTSA_P1 __REG(0x41000030) /* SSP Port 1 Tx Timeslot Active */
#define SSRSA_P1 __REG(0x41000034) /* SSP Port 1 Rx Timeslot Active */
#define SSTSS_P1 __REG(0x41000038) /* SSP Port 1 Timeslot Status */
#define SSACD_P1 __REG(0x4100003C) /* SSP Port 1 Audio Clock Divider */
#define SSCR0_P2 __REG(0x41700000) /* SSP Port 2 Control Register 0 */
#define SSCR1_P2 __REG(0x41700004) /* SSP Port 2 Control Register 1 */
#define SSSR_P2 __REG(0x41700008) /* SSP Port 2 Status Register */
@ -1713,6 +1717,10 @@
#define SSDR_P2 __REG(0x41700010) /* (Write / Read) SSP Port 2 Data Write Register/SSP Data Read Register */
#define SSTO_P2 __REG(0x41700028) /* SSP Port 2 Time Out Register */
#define SSPSP_P2 __REG(0x4170002C) /* SSP Port 2 Programmable Serial Protocol */
#define SSTSA_P2 __REG(0x41700030) /* SSP Port 2 Tx Timeslot Active */
#define SSRSA_P2 __REG(0x41700034) /* SSP Port 2 Rx Timeslot Active */
#define SSTSS_P2 __REG(0x41700038) /* SSP Port 2 Timeslot Status */
#define SSACD_P2 __REG(0x4170003C) /* SSP Port 2 Audio Clock Divider */
#define SSCR0_P3 __REG(0x41900000) /* SSP Port 3 Control Register 0 */
#define SSCR1_P3 __REG(0x41900004) /* SSP Port 3 Control Register 1 */
#define SSSR_P3 __REG(0x41900008) /* SSP Port 3 Status Register */
@ -1720,6 +1728,10 @@
#define SSDR_P3 __REG(0x41900010) /* (Write / Read) SSP Port 3 Data Write Register/SSP Data Read Register */
#define SSTO_P3 __REG(0x41900028) /* SSP Port 3 Time Out Register */
#define SSPSP_P3 __REG(0x4190002C) /* SSP Port 3 Programmable Serial Protocol */
#define SSTSA_P3 __REG(0x41900030) /* SSP Port 3 Tx Timeslot Active */
#define SSRSA_P3 __REG(0x41900034) /* SSP Port 3 Rx Timeslot Active */
#define SSTSS_P3 __REG(0x41900038) /* SSP Port 3 Timeslot Status */
#define SSACD_P3 __REG(0x4190003C) /* SSP Port 3 Audio Clock Divider */
#else /* PXA255 (only port 2) and PXA26x ports*/
#define SSTO_P1 __REG(0x41000028) /* SSP Port 1 Time Out Register */
#define SSPSP_P1 __REG(0x4100002C) /* SSP Port 1 Programmable Serial Protocol */
@ -1746,6 +1758,10 @@
#define SSDR_P(x) (*(((x) == 1) ? &SSDR_P1 : ((x) == 2) ? &SSDR_P2 : ((x) == 3) ? &SSDR_P3 : NULL))
#define SSTO_P(x) (*(((x) == 1) ? &SSTO_P1 : ((x) == 2) ? &SSTO_P2 : ((x) == 3) ? &SSTO_P3 : NULL))
#define SSPSP_P(x) (*(((x) == 1) ? &SSPSP_P1 : ((x) == 2) ? &SSPSP_P2 : ((x) == 3) ? &SSPSP_P3 : NULL))
#define SSTSA_P(x) (*(((x) == 1) ? &SSTSA_P1 : ((x) == 2) ? &SSTSA_P2 : ((x) == 3) ? &SSTSA_P3 : NULL))
#define SSRSA_P(x) (*(((x) == 1) ? &SSRSA_P1 : ((x) == 2) ? &SSRSA_P2 : ((x) == 3) ? &SSRSA_P3 : NULL))
#define SSTSS_P(x) (*(((x) == 1) ? &SSTSS_P1 : ((x) == 2) ? &SSTSS_P2 : ((x) == 3) ? &SSTSS_P3 : NULL))
#define SSACD_P(x) (*(((x) == 1) ? &SSACD_P1 : ((x) == 2) ? &SSACD_P2 : ((x) == 3) ? &SSACD_P3 : NULL))
/*
* MultiMediaCard (MMC) controller

1
include/asm-arm/arch-pxa/system.h
View file

@ -10,6 +10,7 @@
* published by the Free Software Foundation.
*/
#include <asm/proc-fns.h>
#include "hardware.h"
#include "pxa-regs.h"

2
include/asm-arm/arch-s3c2410/regs-dsc.h
View file

@ -170,7 +170,7 @@
#define S3C2440_DSC1_CS1_4mA (3<<2)
#define S3C2440_DSC1_CS1_MASK (3<<2)
#define S3C2440_DSC1_CS0 (S3C2440_SELECT_DSC1 | 0
#define S3C2440_DSC1_CS0 (S3C2440_SELECT_DSC1 | 0)
#define S3C2440_DSC1_CS0_10mA (0<<0)
#define S3C2440_DSC1_CS0_8mA (1<<0)
#define S3C2440_DSC1_CS0_6mA (2<<0)

16
include/asm-arm/arch-versatile/system.h
View file

@ -36,16 +36,14 @@ static inline void arch_idle(void)
static inline void arch_reset(char mode)
{
unsigned int hdr_ctrl = (IO_ADDRESS(VERSATILE_SYS_BASE) + VERSATILE_SYS_RESETCTL_OFFSET);
unsigned int val;
u32 val;
/*
* To reset, we hit the on-board reset register
* in the system FPGA
*/
val = __raw_readl(hdr_ctrl);
val |= VERSATILE_SYS_CTRL_RESET_CONFIGCLR;
__raw_writel(val, hdr_ctrl);
val = __raw_readl(IO_ADDRESS(VERSATILE_SYS_RESETCTL)) & ~0x7;
val |= 0x105;
__raw_writel(0xa05f, IO_ADDRESS(VERSATILE_SYS_LOCK));
__raw_writel(val, IO_ADDRESS(VERSATILE_SYS_RESETCTL));
__raw_writel(0, IO_ADDRESS(VERSATILE_SYS_LOCK));
}
#endif

10
include/asm-arm/byteorder.h
View file

@ -22,16 +22,18 @@ static inline __attribute_const__ __u32 ___arch__swab32(__u32 x)
{
__u32 t;
if (__builtin_constant_p(x)) {
t = x ^ ((x << 16) | (x >> 16)); /* eor r1,r0,r0,ror #16 */
} else {
#ifndef __thumb__
if (!__builtin_constant_p(x)) {
/*
* The compiler needs a bit of a hint here to always do the
* right thing and not screw it up to different degrees
* depending on the gcc version.
*/
asm ("eor\t%0, %1, %1, ror #16" : "=r" (t) : "r" (x));
}
} else
#endif
t = x ^ ((x << 16) | (x >> 16)); /* eor r1,r0,r0,ror #16 */
x = (x << 24) | (x >> 8); /* mov r0,r0,ror #8 */
t &= ~0x00FF0000; /* bic r1,r1,#0x00FF0000 */
x ^= (t >> 8); /* eor r0,r0,r1,lsr #8 */

11
include/asm-arm/hardware/sharpsl_pm.h
View file

@ -16,6 +16,7 @@ struct sharpsl_charger_machinfo {
void (*exit)(void);
int gpio_acin;
int gpio_batfull;
int batfull_irq;
int gpio_batlock;
int gpio_fatal;
void (*discharge)(int);
@ -34,9 +35,19 @@ struct sharpsl_charger_machinfo {
#define SHARPSL_STATUS_FATAL 7
unsigned long (*charger_wakeup)(void);
int (*should_wakeup)(unsigned int resume_on_alarm);
void (*backlight_limit)(int);
int (*backlight_get_status) (void);
int charge_on_volt;
int charge_on_temp;
int charge_acin_high;
int charge_acin_low;
int fatal_acin_volt;
int fatal_noacin_volt;
int bat_levels;
struct battery_thresh *bat_levels_noac;
struct battery_thresh *bat_levels_acin;
struct battery_thresh *bat_levels_noac_bl;
struct battery_thresh *bat_levels_acin_bl;
int status_high_acin;
int status_low_acin;
int status_high_noac;

4
include/asm-arm/irq.h
View file

@ -47,10 +47,6 @@ void disable_irq_wake(unsigned int irq);
void enable_irq_wake(unsigned int irq);
int setup_irq(unsigned int, struct irqaction *);
struct irqaction;
struct pt_regs;
int handle_IRQ_event(unsigned int, struct pt_regs *, struct irqaction *);
extern void migrate_irqs(void);
#endif

8
include/asm-arm/mach/serial_at91rm9200.h → include/asm-arm/mach/serial_at91.h
View file

@ -1,5 +1,5 @@
/*
* linux/include/asm-arm/mach/serial_at91rm9200.h
* linux/include/asm-arm/mach/serial_at91.h
*
* Based on serial_sa1100.h by Nicolas Pitre
*
@ -14,7 +14,7 @@ struct uart_port;
* This is a temporary structure for registering these
* functions; it is intended to be discarded after boot.
*/
struct at91rm9200_port_fns {
struct at91_port_fns {
void (*set_mctrl)(struct uart_port *, u_int);
u_int (*get_mctrl)(struct uart_port *);
void (*enable_ms)(struct uart_port *);
@ -25,11 +25,9 @@ struct at91rm9200_port_fns {
};
#if defined(CONFIG_SERIAL_AT91)
void at91_register_uart_fns(struct at91rm9200_port_fns *fns);
void at91_register_uart(int idx, int port);
void at91_register_uart_fns(struct at91_port_fns *fns);
#else
#define at91_register_uart_fns(fns) do { } while (0)
#define at91_register_uart(idx,port) do { } while (0)
#endif

3
include/asm-arm/system.h
View file

@ -107,6 +107,9 @@ extern void __show_regs(struct pt_regs *);
extern int cpu_architecture(void);
extern void cpu_init(void);
void arm_machine_restart(char mode);
extern void (*arm_pm_restart)(char str);
/*
* Intel's XScale3 core supports some v6 features (supersections, L2)
* but advertises itself as v5 as it does not support the v6 ISA. For

48
include/asm-arm/thread_notify.h Normal file
View file

@ -0,0 +1,48 @@
/*
* linux/include/asm-arm/thread_notify.h
*
* Copyright (C) 2006 Russell King.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef ASMARM_THREAD_NOTIFY_H
#define ASMARM_THREAD_NOTIFY_H
#ifdef __KERNEL__
#ifndef __ASSEMBLY__
#include <linux/notifier.h>
#include <asm/thread_info.h>
static inline int thread_register_notifier(struct notifier_block *n)
{
extern struct atomic_notifier_head thread_notify_head;
return atomic_notifier_chain_register(&thread_notify_head, n);
}
static inline void thread_unregister_notifier(struct notifier_block *n)
{
extern struct atomic_notifier_head thread_notify_head;
atomic_notifier_chain_unregister(&thread_notify_head, n);
}
static inline void thread_notify(unsigned long rc, struct thread_info *thread)
{
extern struct atomic_notifier_head thread_notify_head;
atomic_notifier_call_chain(&thread_notify_head, rc, thread);
}
#endif
/*
* These are the reason codes for the thread notifier.
*/
#define THREAD_NOTIFY_FLUSH 0
#define THREAD_NOTIFY_RELEASE 1
#define THREAD_NOTIFY_SWITCH 2
#endif
#endif

2
include/asm-arm/vga.h
View file

@ -4,7 +4,7 @@
#include <asm/hardware.h>
#include <asm/io.h>
#define VGA_MAP_MEM(x) (PCIMEM_BASE + (x))
#define VGA_MAP_MEM(x,s) (PCIMEM_BASE + (x))
#define vga_readb(x) (*((volatile unsigned char *)x))
#define vga_writeb(x,y) (*((volatile unsigned char *)y) = (x))

4
include/asm-arm26/irq.h
View file

@ -44,9 +44,5 @@ extern void enable_irq(unsigned int);
int set_irq_type(unsigned int irq, unsigned int type);
int setup_irq(unsigned int, struct irqaction *);
struct pt_regs;
int handle_IRQ_event(unsigned int, struct pt_regs *, struct irqaction *);
#endif

4
include/asm-frv/atomic.h
View file

@ -227,7 +227,7 @@ extern unsigned long atomic_test_and_XOR_mask(unsigned long mask, volatile unsig
break; \
\
default: \
__xg_orig = 0; \
__xg_orig = (__typeof__(__xg_orig))0; \
asm volatile("break"); \
break; \
} \
@ -247,7 +247,7 @@ extern uint32_t __xchg_32(uint32_t i, volatile void *v);
switch (sizeof(__xg_orig)) { \
case 4: __xg_orig = (__typeof__(*(ptr))) __xchg_32((uint32_t) x, __xg_ptr); break; \
default: \
__xg_orig = 0; \
__xg_orig = (__typeof__(__xg_orig))0; \
asm volatile("break"); \
break; \
} \

2
include/asm-frv/checksum.h
View file

@ -43,7 +43,7 @@ unsigned int csum_partial_copy(const char *src, char *dst, int len, int sum);
* here even more important to align src and dst on a 32-bit (or even
* better 64-bit) boundary
*/
extern unsigned int csum_partial_copy_from_user(const char *src, char *dst,
extern unsigned int csum_partial_copy_from_user(const char __user *src, char *dst,
int len, int sum, int *csum_err);
#define csum_partial_copy_nocheck(src, dst, len, sum) \

2
include/asm-frv/highmem.h
View file

@ -134,7 +134,7 @@ static inline void *kmap_atomic(struct page *page, enum km_type type)
default:
BUG();
return 0;
return NULL;
}
}

40
include/asm-frv/io.h
View file

@ -40,13 +40,13 @@ static inline unsigned long _swapl(unsigned long v)
//#define __iormb() asm volatile("membar")
//#define __iowmb() asm volatile("membar")
#define __raw_readb(addr) __builtin_read8((void *) (addr))
#define __raw_readw(addr) __builtin_read16((void *) (addr))
#define __raw_readl(addr) __builtin_read32((void *) (addr))
#define __raw_readb __builtin_read8
#define __raw_readw __builtin_read16
#define __raw_readl __builtin_read32
#define __raw_writeb(datum, addr) __builtin_write8((void *) (addr), datum)
#define __raw_writew(datum, addr) __builtin_write16((void *) (addr), datum)
#define __raw_writel(datum, addr) __builtin_write32((void *) (addr), datum)
#define __raw_writeb(datum, addr) __builtin_write8(addr, datum)
#define __raw_writew(datum, addr) __builtin_write16(addr, datum)
#define __raw_writel(datum, addr) __builtin_write32(addr, datum)
static inline void io_outsb(unsigned int addr, const void *buf, int len)
{
@ -116,7 +116,7 @@ static inline void memset_io(volatile void __iomem *addr, unsigned char val, int
memset((void __force *) addr, val, count);
}
static inline void memcpy_fromio(void *dst, volatile void __iomem *src, int count)
static inline void memcpy_fromio(void *dst, const volatile void __iomem *src, int count)
{
memcpy(dst, (void __force *) src, count);
}
@ -128,12 +128,12 @@ static inline void memcpy_toio(volatile void __iomem *dst, const void *src, int
static inline uint8_t inb(unsigned long addr)
{
return __builtin_read8((void *)addr);
return __builtin_read8((void __iomem *)addr);
}
static inline uint16_t inw(unsigned long addr)
{
uint16_t ret = __builtin_read16((void *)addr);
uint16_t ret = __builtin_read16((void __iomem *)addr);
if (__is_PCI_IO(addr))
ret = _swapw(ret);
@ -143,7 +143,7 @@ static inline uint16_t inw(unsigned long addr)
static inline uint32_t inl(unsigned long addr)
{
uint32_t ret = __builtin_read32((void *)addr);
uint32_t ret = __builtin_read32((void __iomem *)addr);
if (__is_PCI_IO(addr))
ret = _swapl(ret);
@ -153,21 +153,21 @@ static inline uint32_t inl(unsigned long addr)
static inline void outb(uint8_t datum, unsigned long addr)
{
__builtin_write8((void *)addr, datum);
__builtin_write8((void __iomem *)addr, datum);
}
static inline void outw(uint16_t datum, unsigned long addr)
{
if (__is_PCI_IO(addr))
datum = _swapw(datum);
__builtin_write16((void *)addr, datum);
__builtin_write16((void __iomem *)addr, datum);
}
static inline void outl(uint32_t datum, unsigned long addr)
{
if (__is_PCI_IO(addr))
datum = _swapl(datum);
__builtin_write32((void *)addr, datum);
__builtin_write32((void __iomem *)addr, datum);
}
#define inb_p(addr) inb(addr)
@ -189,12 +189,12 @@ static inline void outl(uint32_t datum, unsigned long addr)
static inline uint8_t readb(const volatile void __iomem *addr)
{
return __builtin_read8((volatile uint8_t __force *) addr);
return __builtin_read8((__force void volatile __iomem *) addr);
}
static inline uint16_t readw(const volatile void __iomem *addr)
{
uint16_t ret = __builtin_read16((volatile uint16_t __force *)addr);
uint16_t ret = __builtin_read16((__force void volatile __iomem *)addr);
if (__is_PCI_MEM(addr))
ret = _swapw(ret);
@ -203,7 +203,7 @@ static inline uint16_t readw(const volatile void __iomem *addr)
static inline uint32_t readl(const volatile void __iomem *addr)
{
uint32_t ret = __builtin_read32((volatile uint32_t __force *)addr);
uint32_t ret = __builtin_read32((__force void volatile __iomem *)addr);
if (__is_PCI_MEM(addr))
ret = _swapl(ret);
@ -217,7 +217,7 @@ static inline uint32_t readl(const volatile void __iomem *addr)
static inline void writeb(uint8_t datum, volatile void __iomem *addr)
{
__builtin_write8((volatile uint8_t __force *) addr, datum);
__builtin_write8(addr, datum);
if (__is_PCI_MEM(addr))
__flush_PCI_writes();
}
@ -227,7 +227,7 @@ static inline void writew(uint16_t datum, volatile void __iomem *addr)
if (__is_PCI_MEM(addr))
datum = _swapw(datum);
__builtin_write16((volatile uint16_t __force *) addr, datum);
__builtin_write16(addr, datum);
if (__is_PCI_MEM(addr))
__flush_PCI_writes();
}
@ -237,7 +237,7 @@ static inline void writel(uint32_t datum, volatile void __iomem *addr)
if (__is_PCI_MEM(addr))
datum = _swapl(datum);
__builtin_write32((volatile uint32_t __force *) addr, datum);
__builtin_write32(addr, datum);
if (__is_PCI_MEM(addr))
__flush_PCI_writes();
}
@ -271,7 +271,7 @@ static inline void __iomem *ioremap_fullcache(unsigned long physaddr, unsigned l
return __ioremap(physaddr, size, IOMAP_FULL_CACHING);
}
extern void iounmap(void __iomem *addr);
extern void iounmap(void volatile __iomem *addr);
static inline void __iomem *ioport_map(unsigned long port, unsigned int nr)
{

27
include/asm-frv/mb-regs.h
View file

@ -16,6 +16,17 @@
#include <asm/sections.h>
#include <asm/mem-layout.h>
#ifndef __ASSEMBLY__
/* gcc builtins, annotated */
unsigned long __builtin_read8(volatile void __iomem *);
unsigned long __builtin_read16(volatile void __iomem *);
unsigned long __builtin_read32(volatile void __iomem *);
void __builtin_write8(volatile void __iomem *, unsigned char);
void __builtin_write16(volatile void __iomem *, unsigned short);
void __builtin_write32(volatile void __iomem *, unsigned long);
#endif
#define __region_IO KERNEL_IO_START /* the region from 0xe0000000 to 0xffffffff has suitable
* protection laid over the top for use in memory-mapped
* I/O
@ -59,7 +70,7 @@
#define __region_PCI_MEM (__region_CS2 + 0x08000000UL)
#define __flush_PCI_writes() \
do { \
__builtin_write8((volatile void *) __region_PCI_MEM, 0); \
__builtin_write8((volatile void __iomem *) __region_PCI_MEM, 0); \
} while(0)
#define __is_PCI_IO(addr) \
@ -83,15 +94,15 @@ extern int __nongprelbss mb93090_mb00_detected;
#define __set_LEDS(X) \
do { \
if (mb93090_mb00_detected) \
__builtin_write32((void *) __addr_LEDS(), ~(X)); \
__builtin_write32((void __iomem *) __addr_LEDS(), ~(X)); \
} while (0)
#else
#define __set_LEDS(X)
#endif
#define __addr_LCD() (__region_CS2 + 0x01200008UL)
#define __get_LCD(B) __builtin_read32((volatile void *) (B))
#define __set_LCD(B,X) __builtin_write32((volatile void *) (B), (X))
#define __get_LCD(B) __builtin_read32((volatile void __iomem *) (B))
#define __set_LCD(B,X) __builtin_write32((volatile void __iomem *) (B), (X))
#define LCD_D 0x000000ff /* LCD data bus */
#define LCD_RW 0x00000100 /* LCD R/W signal */
@ -161,11 +172,11 @@ do { \
#define __get_CLKIN() 66000000UL
#define __addr_LEDS() (__region_CS2 + 0x00000023UL)
#define __set_LEDS(X) __builtin_write8((volatile void *) __addr_LEDS(), (X))
#define __set_LEDS(X) __builtin_write8((volatile void __iomem *) __addr_LEDS(), (X))
#define __addr_FPGATR() (__region_CS2 + 0x00000030UL)
#define __set_FPGATR(X) __builtin_write32((volatile void *) __addr_FPGATR(), (X))
#define __get_FPGATR() __builtin_read32((volatile void *) __addr_FPGATR())
#define __set_FPGATR(X) __builtin_write32((volatile void __iomem *) __addr_FPGATR(), (X))
#define __get_FPGATR() __builtin_read32((volatile void __iomem *) __addr_FPGATR())
#define MB93093_FPGA_FPGATR_AUDIO_CLK 0x00000003
@ -180,7 +191,7 @@ do { \
#define MB93093_FPGA_SWR_PUSHSWMASK (0x1F<<26)
#define MB93093_FPGA_SWR_PUSHSW4 (1<<29)
#define __addr_FPGA_SWR ((volatile void *)(__region_CS2 + 0x28UL))
#define __addr_FPGA_SWR ((volatile void __iomem *)(__region_CS2 + 0x28UL))
#define __get_FPGA_PUSHSW1_5() (__builtin_read32(__addr_FPGA_SWR) & MB93093_FPGA_SWR_PUSHSWMASK)

6
include/asm-frv/signal.h
View file

@ -114,13 +114,13 @@ struct old_sigaction {
__sighandler_t sa_handler;
old_sigset_t sa_mask;
unsigned long sa_flags;
void (*sa_restorer)(void);
__sigrestore_t sa_restorer;
};
struct sigaction {
__sighandler_t sa_handler;
unsigned long sa_flags;
void (*sa_restorer)(void);
__sigrestore_t sa_restorer;
sigset_t sa_mask; /* mask last for extensibility */
};
@ -146,7 +146,7 @@ struct sigaction {
#endif /* __KERNEL__ */
typedef struct sigaltstack {
void *ss_sp;
void __user *ss_sp;
int ss_flags;
size_t ss_size;
} stack_t;

64
include/asm-frv/uaccess.h
View file

@ -22,7 +22,7 @@
#define HAVE_ARCH_UNMAPPED_AREA /* we decide where to put mmaps */
#define __ptr(x) ((unsigned long *)(x))
#define __ptr(x) ((unsigned long __force *)(x))
#define VERIFY_READ 0
#define VERIFY_WRITE 1
@ -64,7 +64,7 @@ static inline int ___range_ok(unsigned long addr, unsigned long size)
#define __range_ok(addr,size) ___range_ok((unsigned long) (addr), (unsigned long) (size))
#define access_ok(type,addr,size) (__range_ok((addr), (size)) == 0)
#define access_ok(type,addr,size) (__range_ok((void __user *)(addr), (size)) == 0)
#define __access_ok(addr,size) (__range_ok((addr), (size)) == 0)
/*
@ -97,6 +97,7 @@ extern unsigned long search_exception_table(unsigned long);
int __pu_err = 0; \
\
typeof(*(ptr)) __pu_val = (x); \
__chk_user_ptr(ptr); \
\
switch (sizeof (*(ptr))) { \
case 1: \
@ -120,7 +121,7 @@ extern unsigned long search_exception_table(unsigned long);
#define put_user(x, ptr) \
({ \
typeof(&*ptr) _p = (ptr); \
typeof(*(ptr)) __user *_p = (ptr); \
int _e; \
\
_e = __range_ok(_p, sizeof(*_p)); \
@ -175,33 +176,44 @@ do { \
*/
#define __get_user(x, ptr) \
({ \
typeof(*(ptr)) __gu_val = 0; \
int __gu_err = 0; \
__chk_user_ptr(ptr); \
\
switch (sizeof(*(ptr))) { \
case 1: \
__get_user_asm(__gu_err, *(u8*)&__gu_val, ptr, "ub", "=r"); \
case 1: { \
unsigned char __gu_val; \
__get_user_asm(__gu_err, __gu_val, ptr, "ub", "=r"); \
(x) = *(__force __typeof__(*(ptr)) *) &__gu_val; \
break; \
case 2: \
__get_user_asm(__gu_err, *(u16*)&__gu_val, ptr, "uh", "=r"); \
} \
case 2: { \
unsigned short __gu_val; \
__get_user_asm(__gu_err, __gu_val, ptr, "uh", "=r"); \
(x) = *(__force __typeof__(*(ptr)) *) &__gu_val; \
break; \
case 4: \
__get_user_asm(__gu_err, *(u32*)&__gu_val, ptr, "", "=r"); \
} \
case 4: { \
unsigned int __gu_val; \
__get_user_asm(__gu_err, __gu_val, ptr, "", "=r"); \
(x) = *(__force __typeof__(*(ptr)) *) &__gu_val; \
break; \
case 8: \
__get_user_asm(__gu_err, *(u64*)&__gu_val, ptr, "d", "=e"); \
} \
case 8: { \
unsigned long long __gu_val; \
__get_user_asm(__gu_err, __gu_val, ptr, "d", "=e"); \
(x) = *(__force __typeof__(*(ptr)) *) &__gu_val; \
break; \
} \
default: \
__gu_err = __get_user_bad(); \
break; \
} \
(x) = __gu_val; \
__gu_err; \
})
#define get_user(x, ptr) \
({ \
typeof(&*ptr) _p = (ptr); \
const typeof(*(ptr)) __user *_p = (ptr);\
int _e; \
\
_e = __range_ok(_p, sizeof(*_p)); \
@ -248,19 +260,20 @@ do { \
/*
*
*/
#define ____force(x) (__force void *)(void __user *)(x)
#ifdef CONFIG_MMU
extern long __memset_user(void *dst, unsigned long count);
extern long __memcpy_user(void *dst, const void *src, unsigned long count);
#define clear_user(dst,count) __memset_user((dst), (count))
#define __copy_from_user_inatomic(to, from, n) __memcpy_user((to), (from), (n))
#define __copy_to_user_inatomic(to, from, n) __memcpy_user((to), (from), (n))
#define clear_user(dst,count) __memset_user(____force(dst), (count))
#define __copy_from_user_inatomic(to, from, n) __memcpy_user((to), ____force(from), (n))
#define __copy_to_user_inatomic(to, from, n) __memcpy_user(____force(to), (from), (n))
#else
#define clear_user(dst,count) (memset((dst), 0, (count)), 0)
#define __copy_from_user_inatomic(to, from, n) (memcpy((to), (from), (n)), 0)
#define __copy_to_user_inatomic(to, from, n) (memcpy((to), (from), (n)), 0)
#define clear_user(dst,count) (memset(____force(dst), 0, (count)), 0)
#define __copy_from_user_inatomic(to, from, n) (memcpy((to), ____force(from), (n)), 0)
#define __copy_to_user_inatomic(to, from, n) (memcpy(____force(to), (from), (n)), 0)
#endif
@ -278,7 +291,7 @@ __copy_from_user(void *to, const void __user *from, unsigned long n)
return __copy_from_user_inatomic(to, from, n);
}
static inline long copy_from_user(void *to, const void *from, unsigned long n)
static inline long copy_from_user(void *to, const void __user *from, unsigned long n)
{
unsigned long ret = n;
@ -291,16 +304,13 @@ static inline long copy_from_user(void *to, const void *from, unsigned long n)
return ret;
}
static inline long copy_to_user(void *to, const void *from, unsigned long n)
static inline long copy_to_user(void __user *to, const void *from, unsigned long n)
{
return likely(__access_ok(to, n)) ? __copy_to_user(to, from, n) : n;
}
#define copy_to_user_ret(to,from,n,retval) ({ if (copy_to_user(to,from,n)) return retval; })
#define copy_from_user_ret(to,from,n,retval) ({ if (copy_from_user(to,from,n)) return retval; })
extern long strncpy_from_user(char *dst, const char *src, long count);
extern long strnlen_user(const char *src, long count);
extern long strncpy_from_user(char *dst, const char __user *src, long count);
extern long strnlen_user(const char __user *src, long count);
#define strlen_user(str) strnlen_user(str, 32767)

19
include/asm-frv/unistd.h
View file

@ -306,7 +306,7 @@
#define __NR_mknodat 297
#define __NR_fchownat 298
#define __NR_futimesat 299
#define __NR_newfstatat 300
#define __NR_fstatat64 300
#define __NR_unlinkat 301
#define __NR_renameat 302
#define __NR_linkat 303
@ -460,24 +460,7 @@ type name (type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5, type6 arg
* some others too.
*/
#define __NR__exit __NR_exit
static inline _syscall0(int,pause)
static inline _syscall0(int,sync)
static inline _syscall0(pid_t,setsid)
static inline _syscall3(int,write,int,fd,const char *,buf,off_t,count)
static inline _syscall3(int,read,int,fd,char *,buf,off_t,count)
static inline _syscall3(off_t,lseek,int,fd,off_t,offset,int,count)
static inline _syscall1(int,dup,int,fd)
static inline _syscall3(int,execve,const char *,file,char **,argv,char **,envp)
static inline _syscall3(int,open,const char *,file,int,flag,int,mode)
static inline _syscall1(int,close,int,fd)
static inline _syscall1(int,_exit,int,exitcode)
static inline _syscall3(pid_t,waitpid,pid_t,pid,int *,wait_stat,int,options)
static inline _syscall1(int,delete_module,const char *,name)
static inline pid_t wait(int * wait_stat)
{
return waitpid(-1,wait_stat,0);
}
#endif /* __KERNEL_SYSCALLS__ */

27
include/asm-generic/memory_model.h
View file

@ -23,29 +23,23 @@
#endif /* CONFIG_DISCONTIGMEM */
#ifdef CONFIG_OUT_OF_LINE_PFN_TO_PAGE
struct page;
/* this is useful when inlined pfn_to_page is too big */
extern struct page *pfn_to_page(unsigned long pfn);
extern unsigned long page_to_pfn(struct page *page);
#else
/*
* supports 3 memory models.
*/
#if defined(CONFIG_FLATMEM)
#define pfn_to_page(pfn) (mem_map + ((pfn) - ARCH_PFN_OFFSET))
#define page_to_pfn(page) ((unsigned long)((page) - mem_map) + \
#define __pfn_to_page(pfn) (mem_map + ((pfn) - ARCH_PFN_OFFSET))
#define __page_to_pfn(page) ((unsigned long)((page) - mem_map) + \
ARCH_PFN_OFFSET)
#elif defined(CONFIG_DISCONTIGMEM)
#define pfn_to_page(pfn) \
#define __pfn_to_page(pfn) \
({ unsigned long __pfn = (pfn); \
unsigned long __nid = arch_pfn_to_nid(pfn); \
NODE_DATA(__nid)->node_mem_map + arch_local_page_offset(__pfn, __nid);\
})
#define page_to_pfn(pg) \
#define __page_to_pfn(pg) \
({ struct page *__pg = (pg); \
struct pglist_data *__pgdat = NODE_DATA(page_to_nid(__pg)); \
(unsigned long)(__pg - __pgdat->node_mem_map) + \
@ -57,18 +51,27 @@ extern unsigned long page_to_pfn(struct page *page);
* Note: section's mem_map is encorded to reflect its start_pfn.
* section[i].section_mem_map == mem_map's address - start_pfn;
*/
#define page_to_pfn(pg) \
#define __page_to_pfn(pg) \
({ struct page *__pg = (pg); \
int __sec = page_to_section(__pg); \
__pg - __section_mem_map_addr(__nr_to_section(__sec)); \
})
#define pfn_to_page(pfn) \
#define __pfn_to_page(pfn) \
({ unsigned long __pfn = (pfn); \
struct mem_section *__sec = __pfn_to_section(__pfn); \
__section_mem_map_addr(__sec) + __pfn; \
})
#endif /* CONFIG_FLATMEM/DISCONTIGMEM/SPARSEMEM */
#ifdef CONFIG_OUT_OF_LINE_PFN_TO_PAGE
struct page;
/* this is useful when inlined pfn_to_page is too big */
extern struct page *pfn_to_page(unsigned long pfn);
extern unsigned long page_to_pfn(struct page *page);
#else
#define page_to_pfn __page_to_pfn
#define pfn_to_page __pfn_to_page
#endif /* CONFIG_OUT_OF_LINE_PFN_TO_PAGE */
#endif /* __ASSEMBLY__ */

4
include/asm-h8300/irq.h
View file

@ -63,8 +63,4 @@ extern void enable_irq(unsigned int);
extern void disable_irq(unsigned int);
#define disable_irq_nosync(x) disable_irq(x)
struct irqaction;
struct pt_regs;
int handle_IRQ_event(unsigned int, struct pt_regs *, struct irqaction *);
#endif /* _H8300_IRQ_H_ */

2
include/asm-i386/alternative.h
View file

@ -3,6 +3,8 @@
#ifdef __KERNEL__
#include <asm/types.h>
struct alt_instr {
u8 *instr; /* original instruction */
u8 *replacement;

2
include/asm-i386/apic.h
View file

@ -138,8 +138,6 @@ void switch_ipi_to_APIC_timer(void *cpumask);
extern int timer_over_8254;
extern int modern_apic(void);
#else /* !CONFIG_X86_LOCAL_APIC */
static inline void lapic_shutdown(void) { }

1
include/asm-i386/apicdef.h
View file

@ -121,7 +121,6 @@
*/
#define u32 unsigned int
#define lapic ((volatile struct local_apic *)APIC_BASE)
struct local_apic {

12
include/asm-i386/cpufeature.h
View file

@ -88,6 +88,12 @@
#define X86_FEATURE_XSTORE_EN (5*32+ 3) /* on-CPU RNG enabled */
#define X86_FEATURE_XCRYPT (5*32+ 6) /* on-CPU crypto (xcrypt insn) */
#define X86_FEATURE_XCRYPT_EN (5*32+ 7) /* on-CPU crypto enabled */
#define X86_FEATURE_ACE2 (5*32+ 8) /* Advanced Cryptography Engine v2 */
#define X86_FEATURE_ACE2_EN (5*32+ 9) /* ACE v2 enabled */
#define X86_FEATURE_PHE (5*32+ 10) /* PadLock Hash Engine */
#define X86_FEATURE_PHE_EN (5*32+ 11) /* PHE enabled */
#define X86_FEATURE_PMM (5*32+ 12) /* PadLock Montgomery Multiplier */
#define X86_FEATURE_PMM_EN (5*32+ 13) /* PMM enabled */
/* More extended AMD flags: CPUID level 0x80000001, ecx, word 6 */
#define X86_FEATURE_LAHF_LM (6*32+ 0) /* LAHF/SAHF in long mode */
@ -121,6 +127,12 @@
#define cpu_has_xstore_enabled boot_cpu_has(X86_FEATURE_XSTORE_EN)
#define cpu_has_xcrypt boot_cpu_has(X86_FEATURE_XCRYPT)
#define cpu_has_xcrypt_enabled boot_cpu_has(X86_FEATURE_XCRYPT_EN)
#define cpu_has_ace2 boot_cpu_has(X86_FEATURE_ACE2)
#define cpu_has_ace2_enabled boot_cpu_has(X86_FEATURE_ACE2_EN)
#define cpu_has_phe boot_cpu_has(X86_FEATURE_PHE)
#define cpu_has_phe_enabled boot_cpu_has(X86_FEATURE_PHE_EN)
#define cpu_has_pmm boot_cpu_has(X86_FEATURE_PMM)
#define cpu_has_pmm_enabled boot_cpu_has(X86_FEATURE_PMM_EN)
#endif /* __ASM_I386_CPUFEATURE_H */

5
include/asm-i386/mce.h Normal file
View file

@ -0,0 +1,5 @@
#ifdef CONFIG_X86_MCE
extern void mcheck_init(struct cpuinfo_x86 *c);
#else
#define mcheck_init(c) do {} while(0)
#endif

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