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Cleanup of ARM DTS for v5.20

Browse source 
Series of cleanups for ARM DTS:
 1. White-spaces, gpio-key subnode names, USB DWC3/EHCI node names,
 2. Add board-level compatibles to Aspeed evaluation boards.
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Merge tag 'dt-cleanup-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt

Cleanup of ARM DTS for v5.20

Series of cleanups for ARM DTS:
1. White-spaces, gpio-key subnode names, USB DWC3/EHCI node names,
2. Add board-level compatibles to Aspeed evaluation boards.

* tag 'dt-cleanup-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  ARM: dts: stih407-family: Harmonize DWC USB3 DT nodes name
  ARM: dts: lpc18xx: Harmonize EHCI/OHCI DT nodes name
  ARM: dts: ast2600-evb-a1: fix board compatible
  ARM: dts: ast2600-evb: fix board compatible
  ARM: dts: ast2500-evb: fix board compatible
  ARM: dts: animeo: correct gpio-keys properties
  ARM: dts: animeo: align gpio-key node names with dtschema
  ARM: dts: sd: adjust whitespace around '='
  ARM: dts: sti: adjust whitespace around '='
  ARM: dts: ste: adjust whitespace around '='
  ARM: dts: nuvoton: adjust whitespace around '='
  ARM: dts: lpc: adjust whitespace around '='
  ARM: dts: ecx: adjust whitespace around '='
  ARM: dts: alpine: adjust whitespace around '='
  ARM: dts: spear: adjust whitespace around '='
  ARM: dts: axm: adjust whitespace around '='
  ARM: dts: at91: adjust whitespace around '='
  ARM: dts: aspeed: adjust whitespace around '='
  ARM: dts: pxa: adjust whitespace around '='

Link: https://lore.kernel.org/r/20220627082842.50508-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2022-07-01 16:14:16 +02:00
commit 7ccd1f6dce
37 changed files with 170 additions and 171 deletions
Download patch file Download diff file Expand all files Collapse all files

2
arch/arm/boot/dts/alpine.dtsi
View file

@ -154,7 +154,7 @@
reg = <0x0 0xfbc00000 0x0 0x100000>;
interrupt-map-mask = <0xf800 0 0 7>;
/* Add legacy interrupts for SATA devices only */
interrupt-map = <0x4000 0 0 1 &gic 0 43 4>,
interrupt-map = <0x4000 0 0 1 &gic 0 43 4>,
<0x4800 0 0 1 &gic 0 44 4>;
/* 32 bit non prefetchable memory space */

10
arch/arm/boot/dts/animeo_ip.dts
View file

@ -168,26 +168,24 @@
};
};
gpio_keys {
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
keyswitch_in {
key-switch-in {
label = "keyswitch_in";
gpios = <&pioB 1 GPIO_ACTIVE_HIGH>;
linux,code = <28>;
wakeup-source;
};
error_in {
key-error-in {
label = "error_in";
gpios = <&pioB 2 GPIO_ACTIVE_HIGH>;
linux,code = <29>;
wakeup-source;
};
btn {
key-s {
label = "btn";
gpios = <&pioC 23 GPIO_ACTIVE_HIGH>;
linux,code = <31>;

2
arch/arm/boot/dts/aspeed-ast2500-evb.dts
View file

@ -5,7 +5,7 @@
/ {
model = "AST2500 EVB";
compatible = "aspeed,ast2500";
compatible = "aspeed,ast2500-evb", "aspeed,ast2500";
aliases {
serial4 = &uart5;

1
arch/arm/boot/dts/aspeed-ast2600-evb-a1.dts
View file

@ -5,6 +5,7 @@
/ {
model = "AST2600 A1 EVB";
compatible = "aspeed,ast2600-evb-a1", "aspeed,ast2600";
/delete-node/regulator-vcc-sdhci0;
/delete-node/regulator-vcc-sdhci1;

2
arch/arm/boot/dts/aspeed-ast2600-evb.dts
View file

@ -8,7 +8,7 @@
/ {
model = "AST2600 EVB";
compatible = "aspeed,ast2600";
compatible = "aspeed,ast2600-evb-a1", "aspeed,ast2600";
aliases {
serial4 = &uart5;

6
arch/arm/boot/dts/aspeed-bmc-portwell-neptune.dts
View file

@ -24,17 +24,17 @@
leds {
compatible = "gpio-leds";
postcode0 {
label="BMC_UP";
label = "BMC_UP";
gpios = <&gpio ASPEED_GPIO(H, 0) GPIO_ACTIVE_HIGH>;
default-state = "on";
};
postcode1 {
label="BMC_HB";
label = "BMC_HB";
gpios = <&gpio ASPEED_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
postcode2 {
label="FAULT";
label = "FAULT";
gpios = <&gpio ASPEED_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
};
// postcode3-7 are GPIOH3-H7

6
arch/arm/boot/dts/aspeed-bmc-quanta-s6q.dts
View file

@ -65,19 +65,19 @@
compatible = "gpio-leds";
BMC_HEARTBEAT_N {
label="BMC_HEARTBEAT_N";
label = "BMC_HEARTBEAT_N";
gpios = <&gpio0 ASPEED_GPIO(P, 7) GPIO_ACTIVE_LOW>;
linux,default-trigger = "heartbeat";
};
BMC_LED_STATUS_AMBER_N {
label="BMC_LED_STATUS_AMBER_N";
label = "BMC_LED_STATUS_AMBER_N";
gpios = <&gpio0 ASPEED_GPIO(S, 6) GPIO_ACTIVE_LOW>;
default-state = "off";
};
FM_ID_LED_N {
label="FM_ID_LED_N";
label = "FM_ID_LED_N";
gpios = <&gpio0 ASPEED_GPIO(B, 5) GPIO_ACTIVE_LOW>;
default-state = "off";
};

2
arch/arm/boot/dts/at91-kizbox3-hs.dts
View file

@ -186,7 +186,7 @@
&pioA {
pinctrl_key_gpio_default: key_gpio_default {
pinmux= <PIN_PA22__GPIO>,
pinmux = <PIN_PA22__GPIO>,
<PIN_PA24__GPIO>,
<PIN_PA26__GPIO>,
<PIN_PA29__GPIO>,

2
arch/arm/boot/dts/at91-sam9x60ek.dts
View file

@ -85,7 +85,7 @@
sw1 {
label = "SW1";
gpios = <&pioD 18 GPIO_ACTIVE_LOW>;
linux,code=<KEY_PROG1>;
linux,code = <KEY_PROG1>;
wakeup-source;
};
};

2
arch/arm/boot/dts/at91-sama5d27_som1.dtsi
View file

@ -15,7 +15,7 @@
compatible = "atmel,sama5d27-som1", "atmel,sama5d27", "atmel,sama5d2", "atmel,sama5";
aliases {
i2c0 = &i2c0;
i2c0 = &i2c0;
};
clocks {

4
arch/arm/boot/dts/at91-sama5d27_som1_ek.dts
View file

@ -21,8 +21,8 @@
serial0 = &uart1; /* DBGU */
serial1 = &uart4; /* mikro BUS 1 */
serial2 = &uart2; /* mikro BUS 2 */
i2c1 = &i2c1;
i2c2 = &i2c3;
i2c1 = &i2c1;
i2c2 = &i2c3;
};
chosen {

2
arch/arm/boot/dts/at91-sama5d27_wlsom1_ek.dts
View file

@ -19,7 +19,7 @@
serial1 = &uart6; /* BT */
serial2 = &uart5; /* mikro BUS 2 */
serial3 = &uart3; /* mikro BUS 1 */
i2c1 = &i2c1;
i2c1 = &i2c1;
};
chosen {

4
arch/arm/boot/dts/at91-sama5d2_icp.dts
View file

@ -24,8 +24,8 @@
serial1 = &uart1; /* mikro BUS 3 */
serial3 = &uart3; /* mikro BUS 2 */
serial5 = &uart7; /* flx2 */
i2c0 = &i2c0;
i2c1 = &i2c1;
i2c0 = &i2c0;
i2c1 = &i2c1;
};
chosen {

6
arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts
View file

@ -20,9 +20,9 @@
aliases {
serial0 = &uart0; /* DBGU */
i2c0 = &i2c0; /* mikroBUS 1 */
i2c1 = &i2c1; /* XPRO EXT1 */
i2c2 = &i2c2;
i2c0 = &i2c0; /* mikroBUS 1 */
i2c1 = &i2c1; /* XPRO EXT1 */
i2c2 = &i2c2;
};
chosen {

6
arch/arm/boot/dts/at91-sama5d2_xplained.dts
View file

@ -205,10 +205,10 @@
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-min-microvolt=<1400000>;
regulator-suspend-max-microvolt=<1400000>;
regulator-suspend-min-microvolt = <1400000>;
regulator-suspend-max-microvolt = <1400000>;
regulator-changeable-in-suspend;
regulator-mode=<ACT8945A_REGULATOR_MODE_LOWPOWER>;
regulator-mode = <ACT8945A_REGULATOR_MODE_LOWPOWER>;
};
};

32
arch/arm/boot/dts/axm5516-cpus.dtsi
View file

@ -73,7 +73,7 @@
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <0x00>;
clock-frequency= <1400000000>;
clock-frequency = <1400000000>;
cpu-release-addr = <0>; // Fixed by the boot loader
};
@ -81,7 +81,7 @@
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <0x01>;
clock-frequency= <1400000000>;
clock-frequency = <1400000000>;
cpu-release-addr = <0>; // Fixed by the boot loader
};
@ -89,7 +89,7 @@
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <0x02>;
clock-frequency= <1400000000>;
clock-frequency = <1400000000>;
cpu-release-addr = <0>; // Fixed by the boot loader
};
@ -97,7 +97,7 @@
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <0x03>;
clock-frequency= <1400000000>;
clock-frequency = <1400000000>;
cpu-release-addr = <0>; // Fixed by the boot loader
};
@ -105,7 +105,7 @@
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <0x100>;
clock-frequency= <1400000000>;
clock-frequency = <1400000000>;
cpu-release-addr = <0>; // Fixed by the boot loader
};
@ -113,7 +113,7 @@
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <0x101>;
clock-frequency= <1400000000>;
clock-frequency = <1400000000>;
cpu-release-addr = <0>; // Fixed by the boot loader
};
@ -121,7 +121,7 @@
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <0x102>;
clock-frequency= <1400000000>;
clock-frequency = <1400000000>;
cpu-release-addr = <0>; // Fixed by the boot loader
};
@ -129,7 +129,7 @@
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <0x103>;
clock-frequency= <1400000000>;
clock-frequency = <1400000000>;
cpu-release-addr = <0>; // Fixed by the boot loader
};
@ -137,7 +137,7 @@
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <0x200>;
clock-frequency= <1400000000>;
clock-frequency = <1400000000>;
cpu-release-addr = <0>; // Fixed by the boot loader
};
@ -145,7 +145,7 @@
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <0x201>;
clock-frequency= <1400000000>;
clock-frequency = <1400000000>;
cpu-release-addr = <0>; // Fixed by the boot loader
};
@ -153,7 +153,7 @@
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <0x202>;
clock-frequency= <1400000000>;
clock-frequency = <1400000000>;
cpu-release-addr = <0>; // Fixed by the boot loader
};
@ -161,7 +161,7 @@
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <0x203>;
clock-frequency= <1400000000>;
clock-frequency = <1400000000>;
cpu-release-addr = <0>; // Fixed by the boot loader
};
@ -169,7 +169,7 @@
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <0x300>;
clock-frequency= <1400000000>;
clock-frequency = <1400000000>;
cpu-release-addr = <0>; // Fixed by the boot loader
};
@ -177,7 +177,7 @@
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <0x301>;
clock-frequency= <1400000000>;
clock-frequency = <1400000000>;
cpu-release-addr = <0>; // Fixed by the boot loader
};
@ -185,7 +185,7 @@
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <0x302>;
clock-frequency= <1400000000>;
clock-frequency = <1400000000>;
cpu-release-addr = <0>; // Fixed by the boot loader
};
@ -193,7 +193,7 @@
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <0x303>;
clock-frequency= <1400000000>;
clock-frequency = <1400000000>;
cpu-release-addr = <0>; // Fixed by the boot loader
};
};

10
arch/arm/boot/dts/ecx-common.dtsi
View file

@ -9,11 +9,11 @@
};
psci {
compatible = "arm,psci";
method = "smc";
cpu_suspend = <0x84000002>;
cpu_off = <0x84000004>;
cpu_on = <0x84000006>;
compatible = "arm,psci";
method = "smc";
cpu_suspend = <0x84000002>;
cpu_off = <0x84000004>;
cpu_on = <0x84000006>;
};
soc {

6
arch/arm/boot/dts/lpc18xx.dtsi
View file

@ -121,7 +121,7 @@
status = "disabled";
};
usb0: ehci@40006100 {
usb0: usb@40006100 {
compatible = "nxp,lpc1850-ehci", "generic-ehci";
reg = <0x40006100 0x100>;
interrupts = <8>;
@ -133,7 +133,7 @@
status = "disabled";
};
usb1: ehci@40007100 {
usb1: usb@40007100 {
compatible = "nxp,lpc1850-ehci", "generic-ehci";
reg = <0x40007100 0x100>;
interrupts = <9>;
@ -183,7 +183,7 @@
compatible = "nxp,lpc1850-dwmac", "snps,dwmac-3.611", "snps,dwmac";
reg = <0x40010000 0x2000>;
interrupts = <5>;
interrupt-names = "macirq";
interrupt-names = "macirq";
clocks = <&ccu1 CLK_CPU_ETHERNET>;
clock-names = "stmmaceth";
resets = <&rgu 22>;

2
arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi
View file

@ -128,7 +128,7 @@
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq";
ethernet = <0>;
clocks = <&clk_rg1refck>, <&clk NPCM7XX_CLK_AHB>;
clocks = <&clk_rg1refck>, <&clk NPCM7XX_CLK_AHB>;
clock-names = "stmmaceth", "clk_gmac";
pinctrl-names = "default";
pinctrl-0 = <&rg1_pins

2
arch/arm/boot/dts/nuvoton-npcm750.dtsi
View file

@ -51,7 +51,7 @@
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq";
ethernet = <1>;
clocks = <&clk_rg2refck>, <&clk NPCM7XX_CLK_AHB>;
clocks = <&clk_rg2refck>, <&clk NPCM7XX_CLK_AHB>;
clock-names = "stmmaceth", "clk_gmac";
pinctrl-names = "default";
pinctrl-0 = <&rg2_pins

10
arch/arm/boot/dts/pxa300-raumfeld-common.dtsi
View file

@ -189,31 +189,31 @@
regulators {
regulator-v3 {
regulator-compatible= "V3(DCDC)";
regulator-compatible = "V3(DCDC)";
regulator-min-microvolt = <725000>;
regulator-max-microvolt = <1800000>;
};
regulator-v4 {
regulator-compatible= "V4(DCDC)";
regulator-compatible = "V4(DCDC)";
regulator-min-microvolt = <725000>;
regulator-max-microvolt = <1800000>;
};
regulator-v5 {
regulator-compatible= "V5(LDO)";
regulator-compatible = "V5(LDO)";
regulator-min-microvolt = <1700000>;
regulator-max-microvolt = <2000000>;
};
reg_vcc_sdio: regulator-v6 {
regulator-compatible= "V6(LDO)";
regulator-compatible = "V6(LDO)";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
regulator-v7 {
regulator-compatible= "V7(LDO)";
regulator-compatible = "V7(LDO)";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
};

2
arch/arm/boot/dts/sam9x60.dtsi
View file

@ -464,7 +464,7 @@
interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 18>;
#pwm-cells = <3>;
status="disabled";
status = "disabled";
};
hlcdc: hlcdc@f8038000 {

2
arch/arm/boot/dts/sd5203.dts
View file

@ -15,7 +15,7 @@
#size-cells = <1>;
chosen {
bootargs="console=ttyS0,9600 earlycon=uart8250,mmio32,0x1600d000";
bootargs = "console=ttyS0,9600 earlycon=uart8250,mmio32,0x1600d000";
};
aliases {

2
arch/arm/boot/dts/spear1310-evb.dts
View file

@ -170,7 +170,7 @@
smi: flash@ea000000 {
status = "okay";
clock-rate=<50000000>;
clock-rate = <50000000>;
flash@e6000000 {
#address-cells = <1>;

2
arch/arm/boot/dts/spear1340-evb.dts
View file

@ -168,7 +168,7 @@
smi: flash@ea000000 {
status = "okay";
clock-rate=<50000000>;
clock-rate = <50000000>;
flash@e6000000 {
#address-cells = <1>;

2
arch/arm/boot/dts/spear1340.dtsi
View file

@ -88,7 +88,7 @@
};
pwm: pwm@e0180000 {
compatible ="st,spear13xx-pwm";
compatible = "st,spear13xx-pwm";
reg = <0xe0180000 0x1000>;
#pwm-cells = <2>;
status = "disabled";

2
arch/arm/boot/dts/spear300-evb.dts
View file

@ -80,7 +80,7 @@
smi: flash@fc000000 {
status = "okay";
clock-rate=<50000000>;
clock-rate = <50000000>;
flash@f8000000 {
#address-cells = <1>;

2
arch/arm/boot/dts/spear310-evb.dts
View file

@ -94,7 +94,7 @@
smi: flash@fc000000 {
status = "okay";
clock-rate=<50000000>;
clock-rate = <50000000>;
flash@f8000000 {
#address-cells = <1>;

2
arch/arm/boot/dts/spear320-evb.dts
View file

@ -95,7 +95,7 @@
smi: flash@fc000000 {
status = "okay";
clock-rate=<50000000>;
clock-rate = <50000000>;
flash@f8000000 {
#address-cells = <1>;

2
arch/arm/boot/dts/spear320-hmi.dts
View file

@ -167,7 +167,7 @@
smi: flash@fc000000 {
status = "okay";
clock-rate=<50000000>;
clock-rate = <50000000>;
flash@f8000000 {
#address-cells = <1>;

2
arch/arm/boot/dts/spear320.dtsi
View file

@ -78,7 +78,7 @@
};
pwm: pwm@a8000000 {
compatible ="st,spear-pwm";
compatible = "st,spear-pwm";
reg = <0xa8000000 0x1000>;
#pwm-cells = <2>;
status = "disabled";

6
arch/arm/boot/dts/ste-ab8500.dtsi
View file

@ -195,7 +195,7 @@
"CH_WD_EXP",
"VBUS_CH_DROP_END";
monitored-battery = <&battery>;
vddadc-supply = <&ab8500_ldo_tvout_reg>;
vddadc-supply = <&ab8500_ldo_tvout_reg>;
io-channels = <&gpadc 0x03>,
<&gpadc 0x0a>,
<&gpadc 0x09>,
@ -207,8 +207,8 @@
};
ab8500_chargalg {
compatible = "stericsson,ab8500-chargalg";
monitored-battery = <&battery>;
compatible = "stericsson,ab8500-chargalg";
monitored-battery = <&battery>;
};
ab8500_usb: phy {

4
arch/arm/boot/dts/ste-hrefv60plus.dtsi
View file

@ -353,11 +353,11 @@
* Drive DISP1 reset high (not reset), driver DISP2 reset low (reset)
*/
hrefv60_cfg1 {
pins ="GPIO65_F1";
pins = "GPIO65_F1";
ste,config = <&gpio_out_hi>;
};
hrefv60_cfg2 {
pins ="GPIO66_G3";
pins = "GPIO66_G3";
ste,config = <&gpio_out_lo>;
};
};

176
arch/arm/boot/dts/stih407-family.dtsi
View file

@ -137,8 +137,8 @@
};
irq-syscfg {
compatible = "st,stih407-irq-syscfg";
st,syscfg = <&syscfg_core>;
compatible = "st,stih407-irq-syscfg";
st,syscfg = <&syscfg_core>;
st,irq-device = <ST_IRQ_SYSCFG_PMU_0>,
<ST_IRQ_SYSCFG_PMU_1>;
st,fiq-device = <ST_IRQ_SYSCFG_DISABLED>,
@ -157,8 +157,8 @@
miphy28lp_phy: miphy28lp {
compatible = "st,miphy28lp-phy";
st,syscfg = <&syscfg_core>;
#address-cells = <1>;
#size-cells = <1>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
phy_port0: port@9b22000 {
@ -208,26 +208,26 @@
};
st231_gp0: st231-gp0 {
compatible = "st,st231-rproc";
memory-region = <&gp0_reserved>;
resets = <&softreset STIH407_ST231_GP0_SOFTRESET>;
reset-names = "sw_reset";
clocks = <&clk_s_c0_flexgen CLK_ST231_GP_0>;
clock-frequency = <600000000>;
st,syscfg = <&syscfg_core 0x22c>;
compatible = "st,st231-rproc";
memory-region = <&gp0_reserved>;
resets = <&softreset STIH407_ST231_GP0_SOFTRESET>;
reset-names = "sw_reset";
clocks = <&clk_s_c0_flexgen CLK_ST231_GP_0>;
clock-frequency = <600000000>;
st,syscfg = <&syscfg_core 0x22c>;
#mbox-cells = <1>;
mbox-names = "vq0_rx", "vq0_tx", "vq1_rx", "vq1_tx";
mboxes = <&mailbox0 0 2>, <&mailbox2 0 1>, <&mailbox0 0 3>, <&mailbox2 0 0>;
};
st231_delta: st231-delta {
compatible = "st,st231-rproc";
memory-region = <&delta_reserved>;
resets = <&softreset STIH407_ST231_DMU_SOFTRESET>;
reset-names = "sw_reset";
clocks = <&clk_s_c0_flexgen CLK_ST231_DMU>;
clock-frequency = <600000000>;
st,syscfg = <&syscfg_core 0x224>;
compatible = "st,st231-rproc";
memory-region = <&delta_reserved>;
resets = <&softreset STIH407_ST231_DMU_SOFTRESET>;
reset-names = "sw_reset";
clocks = <&clk_s_c0_flexgen CLK_ST231_DMU>;
clock-frequency = <600000000>;
st,syscfg = <&syscfg_core 0x224>;
#mbox-cells = <1>;
mbox-names = "vq0_rx", "vq0_tx", "vq1_rx", "vq1_tx";
mboxes = <&mailbox0 0 0>, <&mailbox3 0 1>, <&mailbox0 0 1>, <&mailbox3 0 0>;
@ -710,78 +710,78 @@
st_dwc3: dwc3@8f94000 {
compatible = "st,stih407-dwc3";
reg = <0x08f94000 0x1000>, <0x110 0x4>;
reg-names = "reg-glue", "syscfg-reg";
st,syscfg = <&syscfg_core>;
resets = <&powerdown STIH407_USB3_POWERDOWN>,
<&softreset STIH407_MIPHY2_SOFTRESET>;
reset-names = "powerdown", "softreset";
#address-cells = <1>;
#size-cells = <1>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb3>;
compatible = "st,stih407-dwc3";
reg = <0x08f94000 0x1000>, <0x110 0x4>;
reg-names = "reg-glue", "syscfg-reg";
st,syscfg = <&syscfg_core>;
resets = <&powerdown STIH407_USB3_POWERDOWN>,
<&softreset STIH407_MIPHY2_SOFTRESET>;
reset-names = "powerdown", "softreset";
#address-cells = <1>;
#size-cells = <1>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb3>;
ranges;
status = "disabled";
dwc3: dwc3@9900000 {
compatible = "snps,dwc3";
reg = <0x09900000 0x100000>;
interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
dr_mode = "host";
phy-names = "usb2-phy", "usb3-phy";
phys = <&usb2_picophy0>,
<&phy_port2 PHY_TYPE_USB3>;
dwc3: usb@9900000 {
compatible = "snps,dwc3";
reg = <0x09900000 0x100000>;
interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
dr_mode = "host";
phy-names = "usb2-phy", "usb3-phy";
phys = <&usb2_picophy0>,
<&phy_port2 PHY_TYPE_USB3>;
snps,dis_u3_susphy_quirk;
};
};
/* COMMS PWM Module */
pwm0: pwm@9810000 {
compatible = "st,sti-pwm";
#pwm-cells = <2>;
reg = <0x9810000 0x68>;
interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm0_chan0_default>;
clock-names = "pwm";
clocks = <&clk_sysin>;
compatible = "st,sti-pwm";
#pwm-cells = <2>;
reg = <0x9810000 0x68>;
interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm0_chan0_default>;
clock-names = "pwm";
clocks = <&clk_sysin>;
st,pwm-num-chan = <1>;
status = "disabled";
status = "disabled";
};
/* SBC PWM Module */
pwm1: pwm@9510000 {
compatible = "st,sti-pwm";
#pwm-cells = <2>;
reg = <0x9510000 0x68>;
interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm1_chan0_default
&pinctrl_pwm1_chan1_default
&pinctrl_pwm1_chan2_default
&pinctrl_pwm1_chan3_default>;
clock-names = "pwm";
clocks = <&clk_sysin>;
compatible = "st,sti-pwm";
#pwm-cells = <2>;
reg = <0x9510000 0x68>;
interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm1_chan0_default
&pinctrl_pwm1_chan1_default
&pinctrl_pwm1_chan2_default
&pinctrl_pwm1_chan3_default>;
clock-names = "pwm";
clocks = <&clk_sysin>;
st,pwm-num-chan = <4>;
status = "disabled";
status = "disabled";
};
rng10: rng@8a89000 {
compatible = "st,rng";
reg = <0x08a89000 0x1000>;
clocks = <&clk_sysin>;
status = "okay";
compatible = "st,rng";
reg = <0x08a89000 0x1000>;
clocks = <&clk_sysin>;
status = "okay";
};
rng11: rng@8a8a000 {
compatible = "st,rng";
reg = <0x08a8a000 0x1000>;
clocks = <&clk_sysin>;
status = "okay";
compatible = "st,rng";
reg = <0x08a8a000 0x1000>;
clocks = <&clk_sysin>;
status = "okay";
};
ethernet0: dwmac@9630000 {
@ -812,36 +812,36 @@
};
mailbox0: mailbox@8f00000 {
compatible = "st,stih407-mailbox";
reg = <0x8f00000 0x1000>;
interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
#mbox-cells = <2>;
mbox-name = "a9";
status = "okay";
compatible = "st,stih407-mailbox";
reg = <0x8f00000 0x1000>;
interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
#mbox-cells = <2>;
mbox-name = "a9";
status = "okay";
};
mailbox1: mailbox@8f01000 {
compatible = "st,stih407-mailbox";
reg = <0x8f01000 0x1000>;
#mbox-cells = <2>;
mbox-name = "st231_gp_1";
status = "okay";
compatible = "st,stih407-mailbox";
reg = <0x8f01000 0x1000>;
#mbox-cells = <2>;
mbox-name = "st231_gp_1";
status = "okay";
};
mailbox2: mailbox@8f02000 {
compatible = "st,stih407-mailbox";
reg = <0x8f02000 0x1000>;
#mbox-cells = <2>;
mbox-name = "st231_gp_0";
status = "okay";
compatible = "st,stih407-mailbox";
reg = <0x8f02000 0x1000>;
#mbox-cells = <2>;
mbox-name = "st231_gp_0";
status = "okay";
};
mailbox3: mailbox@8f03000 {
compatible = "st,stih407-mailbox";
reg = <0x8f03000 0x1000>;
#mbox-cells = <2>;
mbox-name = "st231_audio_video";
status = "okay";
compatible = "st,stih407-mailbox";
reg = <0x8f03000 0x1000>;
#mbox-cells = <2>;
mbox-name = "st231_audio_video";
status = "okay";
};
/* fdma audio */
@ -913,7 +913,7 @@
dmas = <&fdma0 2 0 1>;
dma-names = "tx";
status = "disabled";
status = "disabled";
};
sti_uni_player1: sti-uni-player@8d81000 {

4
arch/arm/boot/dts/stih407.dtsi
View file

@ -13,7 +13,7 @@
#address-cells = <1>;
#size-cells = <1>;
reg = <0 0>;
assigned-clocks = <&clk_s_d2_quadfs 0>,
assigned-clocks = <&clk_s_d2_quadfs 0>,
<&clk_s_d2_quadfs 1>,
<&clk_s_c0_pll1 0>,
<&clk_s_c0_flexgen CLK_COMPO_DVP>,
@ -106,7 +106,7 @@
reg-names = "hdmi-reg";
#sound-dai-cells = <0>;
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "irq";
interrupt-names = "irq";
clock-names = "pix",
"tmds",
"phy",

4
arch/arm/boot/dts/stih410.dtsi
View file

@ -105,7 +105,7 @@
#size-cells = <1>;
reg = <0 0>;
assigned-clocks = <&clk_s_d2_quadfs 0>,
assigned-clocks = <&clk_s_d2_quadfs 0>,
<&clk_s_d2_quadfs 1>,
<&clk_s_c0_pll1 0>,
<&clk_s_c0_flexgen CLK_COMPO_DVP>,
@ -198,7 +198,7 @@
reg-names = "hdmi-reg";
#sound-dai-cells = <0>;
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "irq";
interrupt-names = "irq";
clock-names = "pix",
"tmds",
"phy",

8
arch/arm/boot/dts/stihxxx-b2120.dtsi
View file

@ -175,11 +175,11 @@
/* tsin0 is TSA on NIMA */
tsin0: port {
tsin-num = <0>;
tsin-num = <0>;
serial-not-parallel;
i2c-bus = <&ssc2>;
reset-gpios = <&pio15 4 GPIO_ACTIVE_HIGH>;
dvb-card = <STV0367_TDA18212_NIMA_1>;
i2c-bus = <&ssc2>;
reset-gpios = <&pio15 4 GPIO_ACTIVE_HIGH>;
dvb-card = <STV0367_TDA18212_NIMA_1>;
};
};