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[SUBMITME?] drm/msm: Add ctl_no_start_read_quirk for MSM8998

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This commit is contained in:
Jami Kettunen 2022-03-17 23:05:58 +02:00
parent 0ec44cc275
commit 6b4c55ae52
4 changed files with 8 additions and 1 deletions
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1
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
View file

@ -743,6 +743,7 @@ struct dpu_mdss_cfg {
const struct dpu_mdp_cfg *mdp;
u32 ctl_count;
bool ctl_no_start_read_quirk;
const struct dpu_ctl_cfg *ctl;
u32 sspp_count;

3
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
View file

@ -94,7 +94,7 @@ static inline void dpu_hw_ctl_trigger_start(struct dpu_hw_ctl *ctx)
static inline bool dpu_hw_ctl_is_started(struct dpu_hw_ctl *ctx)
{
return !!(DPU_REG_READ(&ctx->hw, CTL_START) & BIT(0));
return !!(DPU_REG_READ(&ctx->hw, CTL_START) & BIT(0)) || ctx->ctl_no_start_read_quirk;
}
static inline void dpu_hw_ctl_trigger_pending(struct dpu_hw_ctl *ctx)
@ -628,6 +628,7 @@ struct dpu_hw_ctl *dpu_hw_ctl_init(enum dpu_ctl idx,
c->idx = idx;
c->mixer_count = m->mixer_count;
c->mixer_hw_caps = m->mixer;
c->ctl_no_start_read_quirk = m->ctl_no_start_read_quirk;
return c;
}

1
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h
View file

@ -203,6 +203,7 @@ struct dpu_hw_ctl {
u32 pending_flush_mask;
u32 pending_intf_flush_mask;
u32 pending_merge_3d_flush_mask;
bool ctl_no_start_read_quirk;
/* ops */
struct dpu_hw_ctl_ops ops;

4
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
View file

@ -1072,6 +1072,10 @@ static int dpu_kms_hw_init(struct msm_kms *kms)
goto power_error;
}
if (of_property_read_bool(dpu_kms->pdev->dev.of_node, "qcom,ctl-no-start-read-quirk")) {
dpu_kms->catalog->ctl_no_start_read_quirk = true;
}
/*
* Now we need to read the HW catalog and initialize resources such as
* clocks, regulators, GDSC/MMAGIC, ioremap the register ranges etc