ARM: SoC driver updates for v4.9
Driver updates for ARM SoCs, including a couple of newly added drivers:
- The Qualcomm external bus interface 2 (EBI2), used in some of their
mobile phone chips for connecting flash memory, LCD displays or
other peripherals
- Secure monitor firmware for Amlogic SoCs, and an NVMEM driver for the
EFUSE based on that firmware interface.
- Perf support for the AppliedMicro X-Gene performance monitor unit
- Reset driver for STMicroelectronics STM32
- Reset driver for SocioNext UniPhier SoCs
Aside from these, there are minor updates to SoC-specific bus,
clocksource, firmware, pinctrl, reset, rtc and pmic drivers.
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Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Arnd Bergmann:
"Driver updates for ARM SoCs, including a couple of newly added
drivers:
- The Qualcomm external bus interface 2 (EBI2), used in some of their
mobile phone chips for connecting flash memory, LCD displays or
other peripherals
- Secure monitor firmware for Amlogic SoCs, and an NVMEM driver for
the EFUSE based on that firmware interface.
- Perf support for the AppliedMicro X-Gene performance monitor unit
- Reset driver for STMicroelectronics STM32
- Reset driver for SocioNext UniPhier SoCs
Aside from these, there are minor updates to SoC-specific bus,
clocksource, firmware, pinctrl, reset, rtc and pmic drivers"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (50 commits)
bus: qcom-ebi2: depend on HAS_IOMEM
pinctrl: mvebu: orion5x: Generalise mv88f5181l support for 88f5181
clk: mvebu: Add clk support for the orion5x SoC mv88f5181
dt-bindings: EXYNOS: Add Exynos5433 PMU compatible
clocksource: exynos_mct: Add the support for ARM64
perf: xgene: Add APM X-Gene SoC Performance Monitoring Unit driver
Documentation: Add documentation for APM X-Gene SoC PMU DTS binding
MAINTAINERS: Add entry for APM X-Gene SoC PMU driver
bus: qcom: add EBI2 driver
bus: qcom: add EBI2 device tree bindings
rtc: rtc-pm8xxx: Add support for pm8018 rtc
nvmem: amlogic: Add Amlogic Meson EFUSE driver
firmware: Amlogic: Add secure monitor driver
soc: qcom: smd: Reset rx tail rather than tx
memory: atmel-sdramc: fix a possible NULL dereference
reset: hi6220: allow to compile test driver on other architectures
reset: zynq: add driver Kconfig option
reset: sunxi: add driver Kconfig option
reset: stm32: add driver Kconfig option
reset: socfpga: add driver Kconfig option
...
This commit is contained in:
Linus Torvalds
commit
6afd563d4b
52 changed files with 3790 additions and 291 deletions
31
include/linux/firmware/meson/meson_sm.h
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31
include/linux/firmware/meson/meson_sm.h
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@ -0,0 +1,31 @@
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/*
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* Copyright (C) 2016 Endless Mobile, Inc.
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* Author: Carlo Caione <carlo@endlessm.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef _MESON_SM_FW_H_
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#define _MESON_SM_FW_H_
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enum {
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SM_EFUSE_READ,
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SM_EFUSE_WRITE,
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SM_EFUSE_USER_MAX,
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};
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struct meson_sm_firmware;
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int meson_sm_call(unsigned int cmd_index, u32 *ret, u32 arg0, u32 arg1,
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u32 arg2, u32 arg3, u32 arg4);
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int meson_sm_call_write(void *buffer, unsigned int b_size, unsigned int cmd_index,
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u32 arg0, u32 arg1, u32 arg2, u32 arg3, u32 arg4);
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int meson_sm_call_read(void *buffer, unsigned int cmd_index, u32 arg0, u32 arg1,
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u32 arg2, u32 arg3, u32 arg4);
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#endif /* _MESON_SM_FW_H_ */
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@ -29,8 +29,8 @@ struct gpmc_nand_regs;
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struct gpmc_nand_ops *gpmc_omap_get_nand_ops(struct gpmc_nand_regs *regs,
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int cs);
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#else
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static inline gpmc_nand_ops *gpmc_omap_get_nand_ops(struct gpmc_nand_regs *regs,
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int cs)
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static inline struct gpmc_nand_ops *gpmc_omap_get_nand_ops(struct gpmc_nand_regs *regs,
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int cs)
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{
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return NULL;
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}
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@ -55,11 +55,16 @@ void qcom_smd_driver_unregister(struct qcom_smd_driver *drv);
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struct qcom_smd_channel *qcom_smd_open_channel(struct qcom_smd_channel *channel,
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const char *name,
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qcom_smd_cb_t cb);
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void qcom_smd_close_channel(struct qcom_smd_channel *channel);
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void *qcom_smd_get_drvdata(struct qcom_smd_channel *channel);
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void qcom_smd_set_drvdata(struct qcom_smd_channel *channel, void *data);
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int qcom_smd_send(struct qcom_smd_channel *channel, const void *data, int len);
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struct qcom_smd_edge *qcom_smd_register_edge(struct device *parent,
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struct device_node *node);
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int qcom_smd_unregister_edge(struct qcom_smd_edge *edge);
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#else
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static inline int qcom_smd_driver_register(struct qcom_smd_driver *drv)
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@ -83,14 +88,20 @@ qcom_smd_open_channel(struct qcom_smd_channel *channel,
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return NULL;
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}
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void *qcom_smd_get_drvdata(struct qcom_smd_channel *channel)
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static inline void qcom_smd_close_channel(struct qcom_smd_channel *channel)
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{
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/* This shouldn't be possible */
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WARN_ON(1);
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}
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static inline void *qcom_smd_get_drvdata(struct qcom_smd_channel *channel)
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{
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/* This shouldn't be possible */
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WARN_ON(1);
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return NULL;
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}
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void qcom_smd_set_drvdata(struct qcom_smd_channel *channel, void *data)
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static inline void qcom_smd_set_drvdata(struct qcom_smd_channel *channel, void *data)
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{
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/* This shouldn't be possible */
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WARN_ON(1);
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@ -104,6 +115,20 @@ static inline int qcom_smd_send(struct qcom_smd_channel *channel,
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return -ENXIO;
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}
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static inline struct qcom_smd_edge *
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qcom_smd_register_edge(struct device *parent,
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struct device_node *node)
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{
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return ERR_PTR(-ENXIO);
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}
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static inline int qcom_smd_unregister_edge(struct qcom_smd_edge *edge)
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{
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/* This shouldn't be possible */
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WARN_ON(1);
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return -ENXIO;
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}
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#endif
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#define module_qcom_smd_driver(__smd_driver) \
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