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i.MX SoC update for 4.18:

Browse source 
- A series from Bartosz to convert all i.MX plaform code using
    at24_platform_data to use at24 eeprom generic device properties.
  - Enable pinctrl driver support for i.MX6SLL SoC.
  - Clean up i.MX platform code using spi_imx platform data on outdated
    documentation and chip select array usage.
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Merge tag 'imx-soc-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc

i.MX SoC update for 4.18:
 - A series from Bartosz to convert all i.MX plaform code using
   at24_platform_data to use at24 eeprom generic device properties.
 - Enable pinctrl driver support for i.MX6SLL SoC.
 - Clean up i.MX platform code using spi_imx platform data on outdated
   documentation and chip select array usage.

* tag 'imx-soc-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  ARM: imx: select imx6sll pinctrl when imx6sll enabled
  ARM: imx: pcm037: use device properties for at24 eeprom
  ARM: imx: pca100: use device properties for at24 eeprom
  ARM: imx: pcm043: use device properties for at24 eeprom
  ARM: imx: vpr200: drop at24_platform_data
  ARM: imx: Update spi_imx platform data to reflect current state

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2018-05-25 13:47:42 -07:00
commit 68fc6c839a
11 changed files with 47 additions and 99 deletions
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29
include/linux/platform_data/spi-imx.h
View file

@ -5,24 +5,29 @@
/*
* struct spi_imx_master - device.platform_data for SPI controller devices.
* @chipselect: Array of chipselects for this master. Numbers >= 0 mean gpio
* pins, numbers < 0 mean internal CSPI chipselects according
* to MXC_SPI_CS(). Normally you want to use gpio based chip
* selects as the CSPI module tries to be intelligent about
* when to assert the chipselect: The CSPI module deasserts the
* chipselect once it runs out of input data. The other problem
* is that it is not possible to mix between high active and low
* active chipselects on one single bus using the internal
* chipselects. Unfortunately Freescale decided to put some
* @chipselect: Array of chipselects for this master or NULL. Numbers >= 0
* mean GPIO pins, -ENOENT means internal CSPI chipselect
* matching the position in the array. E.g., if chipselect[1] =
* -ENOENT then a SPI slave using chip select 1 will use the
* native SS1 line of the CSPI. Omitting the array will use
* all native chip selects.
* Normally you want to use gpio based chip selects as the CSPI
* module tries to be intelligent about when to assert the
* chipselect: The CSPI module deasserts the chipselect once it
* runs out of input data. The other problem is that it is not
* possible to mix between high active and low active chipselects
* on one single bus using the internal chipselects.
* Unfortunately, on some SoCs, Freescale decided to put some
* chipselects on dedicated pins which are not usable as gpios,
* so we have to support the internal chipselects.
* @num_chipselect: ARRAY_SIZE(chipselect)
*
* @num_chipselect: If @chipselect is specified, ARRAY_SIZE(chipselect),
* otherwise the number of native chip selects.
*/
struct spi_imx_master {
int *chipselect;
int num_chipselect;
};
#define MXC_SPI_CS(no) ((no) - 32)
#endif /* __MACH_SPI_H_*/