virtio-gpu: add 3d/virgl support
Add the bits needed for opengl rendering support: query capabilities, new virtio commands, drm ioctls. Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
This commit is contained in:
Gerd Hoffmann
parent
7552ed8a1a
commit
62fb7a5e10
11 changed files with 1368 additions and 3 deletions
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@ -17,3 +17,4 @@ header-y += tegra_drm.h
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header-y += via_drm.h
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header-y += vmwgfx_drm.h
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header-y += msm_drm.h
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header-y += virtgpu_drm.h
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167
include/uapi/drm/virtgpu_drm.h
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167
include/uapi/drm/virtgpu_drm.h
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@ -0,0 +1,167 @@
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/*
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* Copyright 2013 Red Hat
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#ifndef VIRTGPU_DRM_H
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#define VIRTGPU_DRM_H
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#include <stddef.h>
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#include "drm/drm.h"
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/* Please note that modifications to all structs defined here are
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* subject to backwards-compatibility constraints.
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*
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* Do not use pointers, use uint64_t instead for 32 bit / 64 bit user/kernel
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* compatibility Keep fields aligned to their size
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*/
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#define DRM_VIRTGPU_MAP 0x01
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#define DRM_VIRTGPU_EXECBUFFER 0x02
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#define DRM_VIRTGPU_GETPARAM 0x03
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#define DRM_VIRTGPU_RESOURCE_CREATE 0x04
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#define DRM_VIRTGPU_RESOURCE_INFO 0x05
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#define DRM_VIRTGPU_TRANSFER_FROM_HOST 0x06
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#define DRM_VIRTGPU_TRANSFER_TO_HOST 0x07
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#define DRM_VIRTGPU_WAIT 0x08
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#define DRM_VIRTGPU_GET_CAPS 0x09
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struct drm_virtgpu_map {
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uint64_t offset; /* use for mmap system call */
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uint32_t handle;
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uint32_t pad;
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};
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struct drm_virtgpu_execbuffer {
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uint32_t flags; /* for future use */
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uint32_t size;
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uint64_t command; /* void* */
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uint64_t bo_handles;
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uint32_t num_bo_handles;
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uint32_t pad;
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};
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#define VIRTGPU_PARAM_3D_FEATURES 1 /* do we have 3D features in the hw */
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struct drm_virtgpu_getparam {
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uint64_t param;
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uint64_t value;
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};
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/* NO_BO flags? NO resource flag? */
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/* resource flag for y_0_top */
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struct drm_virtgpu_resource_create {
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uint32_t target;
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uint32_t format;
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uint32_t bind;
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uint32_t width;
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uint32_t height;
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uint32_t depth;
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uint32_t array_size;
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uint32_t last_level;
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uint32_t nr_samples;
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uint32_t flags;
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uint32_t bo_handle; /* if this is set - recreate a new resource attached to this bo ? */
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uint32_t res_handle; /* returned by kernel */
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uint32_t size; /* validate transfer in the host */
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uint32_t stride; /* validate transfer in the host */
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};
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struct drm_virtgpu_resource_info {
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uint32_t bo_handle;
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uint32_t res_handle;
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uint32_t size;
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uint32_t stride;
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};
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struct drm_virtgpu_3d_box {
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uint32_t x;
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uint32_t y;
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uint32_t z;
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uint32_t w;
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uint32_t h;
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uint32_t d;
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};
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struct drm_virtgpu_3d_transfer_to_host {
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uint32_t bo_handle;
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struct drm_virtgpu_3d_box box;
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uint32_t level;
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uint32_t offset;
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};
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struct drm_virtgpu_3d_transfer_from_host {
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uint32_t bo_handle;
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struct drm_virtgpu_3d_box box;
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uint32_t level;
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uint32_t offset;
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};
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#define VIRTGPU_WAIT_NOWAIT 1 /* like it */
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struct drm_virtgpu_3d_wait {
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uint32_t handle; /* 0 is an invalid handle */
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uint32_t flags;
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};
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struct drm_virtgpu_get_caps {
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uint32_t cap_set_id;
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uint32_t cap_set_ver;
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uint64_t addr;
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uint32_t size;
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uint32_t pad;
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};
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#define DRM_IOCTL_VIRTGPU_MAP \
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DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_MAP, struct drm_virtgpu_map)
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#define DRM_IOCTL_VIRTGPU_EXECBUFFER \
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DRM_IOW(DRM_COMMAND_BASE + DRM_VIRTGPU_EXECBUFFER,\
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struct drm_virtgpu_execbuffer)
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#define DRM_IOCTL_VIRTGPU_GETPARAM \
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DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_GETPARAM,\
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struct drm_virtgpu_getparam)
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#define DRM_IOCTL_VIRTGPU_RESOURCE_CREATE \
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DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_RESOURCE_CREATE, \
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struct drm_virtgpu_resource_create)
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#define DRM_IOCTL_VIRTGPU_RESOURCE_INFO \
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DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_RESOURCE_INFO, \
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struct drm_virtgpu_resource_info)
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#define DRM_IOCTL_VIRTGPU_TRANSFER_FROM_HOST \
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DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_TRANSFER_FROM_HOST, \
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struct drm_virtgpu_3d_transfer_from_host)
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#define DRM_IOCTL_VIRTGPU_TRANSFER_TO_HOST \
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DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_TRANSFER_TO_HOST, \
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struct drm_virtgpu_3d_transfer_to_host)
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#define DRM_IOCTL_VIRTGPU_WAIT \
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DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_WAIT, \
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struct drm_virtgpu_3d_wait)
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#define DRM_IOCTL_VIRTGPU_GET_CAPS \
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DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_GET_CAPS, \
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struct drm_virtgpu_get_caps)
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#endif
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@ -40,6 +40,8 @@
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#include <linux/types.h>
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#define VIRTIO_GPU_F_VIRGL 0
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enum virtio_gpu_ctrl_type {
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VIRTIO_GPU_UNDEFINED = 0,
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@ -52,6 +54,18 @@ enum virtio_gpu_ctrl_type {
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VIRTIO_GPU_CMD_TRANSFER_TO_HOST_2D,
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VIRTIO_GPU_CMD_RESOURCE_ATTACH_BACKING,
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VIRTIO_GPU_CMD_RESOURCE_DETACH_BACKING,
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VIRTIO_GPU_CMD_GET_CAPSET_INFO,
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VIRTIO_GPU_CMD_GET_CAPSET,
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/* 3d commands */
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VIRTIO_GPU_CMD_CTX_CREATE = 0x0200,
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VIRTIO_GPU_CMD_CTX_DESTROY,
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VIRTIO_GPU_CMD_CTX_ATTACH_RESOURCE,
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VIRTIO_GPU_CMD_CTX_DETACH_RESOURCE,
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VIRTIO_GPU_CMD_RESOURCE_CREATE_3D,
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VIRTIO_GPU_CMD_TRANSFER_TO_HOST_3D,
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VIRTIO_GPU_CMD_TRANSFER_FROM_HOST_3D,
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VIRTIO_GPU_CMD_SUBMIT_3D,
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/* cursor commands */
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VIRTIO_GPU_CMD_UPDATE_CURSOR = 0x0300,
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@ -60,6 +74,8 @@ enum virtio_gpu_ctrl_type {
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/* success responses */
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VIRTIO_GPU_RESP_OK_NODATA = 0x1100,
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VIRTIO_GPU_RESP_OK_DISPLAY_INFO,
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VIRTIO_GPU_RESP_OK_CAPSET_INFO,
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VIRTIO_GPU_RESP_OK_CAPSET,
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/* error responses */
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VIRTIO_GPU_RESP_ERR_UNSPEC = 0x1200,
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@ -180,13 +196,107 @@ struct virtio_gpu_resp_display_info {
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} pmodes[VIRTIO_GPU_MAX_SCANOUTS];
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};
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/* data passed in the control vq, 3d related */
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struct virtio_gpu_box {
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__le32 x, y, z;
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__le32 w, h, d;
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};
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/* VIRTIO_GPU_CMD_TRANSFER_TO_HOST_3D, VIRTIO_GPU_CMD_TRANSFER_FROM_HOST_3D */
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struct virtio_gpu_transfer_host_3d {
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struct virtio_gpu_ctrl_hdr hdr;
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struct virtio_gpu_box box;
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__le64 offset;
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__le32 resource_id;
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__le32 level;
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__le32 stride;
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__le32 layer_stride;
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};
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/* VIRTIO_GPU_CMD_RESOURCE_CREATE_3D */
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#define VIRTIO_GPU_RESOURCE_FLAG_Y_0_TOP (1 << 0)
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struct virtio_gpu_resource_create_3d {
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struct virtio_gpu_ctrl_hdr hdr;
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__le32 resource_id;
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__le32 target;
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__le32 format;
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__le32 bind;
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__le32 width;
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__le32 height;
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__le32 depth;
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__le32 array_size;
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__le32 last_level;
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__le32 nr_samples;
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__le32 flags;
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__le32 padding;
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};
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/* VIRTIO_GPU_CMD_CTX_CREATE */
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struct virtio_gpu_ctx_create {
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struct virtio_gpu_ctrl_hdr hdr;
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__le32 nlen;
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__le32 padding;
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char debug_name[64];
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};
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/* VIRTIO_GPU_CMD_CTX_DESTROY */
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struct virtio_gpu_ctx_destroy {
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struct virtio_gpu_ctrl_hdr hdr;
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};
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/* VIRTIO_GPU_CMD_CTX_ATTACH_RESOURCE, VIRTIO_GPU_CMD_CTX_DETACH_RESOURCE */
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struct virtio_gpu_ctx_resource {
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struct virtio_gpu_ctrl_hdr hdr;
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__le32 resource_id;
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__le32 padding;
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};
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/* VIRTIO_GPU_CMD_SUBMIT_3D */
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struct virtio_gpu_cmd_submit {
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struct virtio_gpu_ctrl_hdr hdr;
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__le32 size;
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__le32 padding;
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};
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#define VIRTIO_GPU_CAPSET_VIRGL 1
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/* VIRTIO_GPU_CMD_GET_CAPSET_INFO */
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struct virtio_gpu_get_capset_info {
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struct virtio_gpu_ctrl_hdr hdr;
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__le32 capset_index;
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__le32 padding;
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};
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/* VIRTIO_GPU_RESP_OK_CAPSET_INFO */
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struct virtio_gpu_resp_capset_info {
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struct virtio_gpu_ctrl_hdr hdr;
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__le32 capset_id;
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__le32 capset_max_version;
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__le32 capset_max_size;
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__le32 padding;
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};
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/* VIRTIO_GPU_CMD_GET_CAPSET */
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struct virtio_gpu_get_capset {
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struct virtio_gpu_ctrl_hdr hdr;
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__le32 capset_id;
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__le32 capset_version;
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};
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/* VIRTIO_GPU_RESP_OK_CAPSET */
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struct virtio_gpu_resp_capset {
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struct virtio_gpu_ctrl_hdr hdr;
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uint8_t capset_data[];
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};
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#define VIRTIO_GPU_EVENT_DISPLAY (1 << 0)
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struct virtio_gpu_config {
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__u32 events_read;
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__u32 events_clear;
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__u32 num_scanouts;
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__u32 reserved;
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__u32 num_capsets;
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};
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/* simple formats for fbcon/X use */
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