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ARM: EXYNOS: Constify data tables for pmu

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These tables are all immutable, make them const to save 4416 bytes of RAM.

size arch/arm/mach-exynos/pmu.o
   text	   data	    bss
    848	   4420	      4		// before
   5264	      4	      4		// after

Signed-off-by: Daniel Kurtz <djkurtz@chromium.org>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This commit is contained in:
Daniel Kurtz 2013-12-12 07:07:23 +09:00 • committed by Kukjin Kim
parent fa53d5cdbf
commit 53302222de
1 changed files with 7 additions and 7 deletions
Download patch file Download diff file Expand all files Collapse all files

14
arch/arm/mach-exynos/pmu.c
View file

@ -17,9 +17,9 @@
#include "common.h"
static struct exynos_pmu_conf *exynos_pmu_config;
static const struct exynos_pmu_conf *exynos_pmu_config;
static struct exynos_pmu_conf exynos4210_pmu_config[] = {
static const struct exynos_pmu_conf exynos4210_pmu_config[] = {
/* { .reg = address, .val = { AFTR, LPA, SLEEP } */
{ S5P_ARM_CORE0_LOWPWR, { 0x0, 0x0, 0x2 } },
{ S5P_DIS_IRQ_CORE0, { 0x0, 0x0, 0x0 } },
@ -95,7 +95,7 @@ static struct exynos_pmu_conf exynos4210_pmu_config[] = {
{ PMU_TABLE_END,},
};
static struct exynos_pmu_conf exynos4x12_pmu_config[] = {
static const struct exynos_pmu_conf exynos4x12_pmu_config[] = {
{ S5P_ARM_CORE0_LOWPWR, { 0x0, 0x0, 0x2 } },
{ S5P_DIS_IRQ_CORE0, { 0x0, 0x0, 0x0 } },
{ S5P_DIS_IRQ_CENTRAL0, { 0x0, 0x0, 0x0 } },
@ -203,7 +203,7 @@ static struct exynos_pmu_conf exynos4x12_pmu_config[] = {
{ PMU_TABLE_END,},
};
static struct exynos_pmu_conf exynos4412_pmu_config[] = {
static const struct exynos_pmu_conf exynos4412_pmu_config[] = {
{ S5P_ARM_CORE2_LOWPWR, { 0x0, 0x0, 0x2 } },
{ S5P_DIS_IRQ_CORE2, { 0x0, 0x0, 0x0 } },
{ S5P_DIS_IRQ_CENTRAL2, { 0x0, 0x0, 0x0 } },
@ -213,7 +213,7 @@ static struct exynos_pmu_conf exynos4412_pmu_config[] = {
{ PMU_TABLE_END,},
};
static struct exynos_pmu_conf exynos5250_pmu_config[] = {
static const struct exynos_pmu_conf exynos5250_pmu_config[] = {
/* { .reg = address, .val = { AFTR, LPA, SLEEP } */
{ EXYNOS5_ARM_CORE0_SYS_PWR_REG, { 0x0, 0x0, 0x2} },
{ EXYNOS5_DIS_IRQ_ARM_CORE0_LOCAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
@ -317,7 +317,7 @@ static struct exynos_pmu_conf exynos5250_pmu_config[] = {
{ PMU_TABLE_END,},
};
static void __iomem *exynos5_list_both_cnt_feed[] = {
static void __iomem * const exynos5_list_both_cnt_feed[] = {
EXYNOS5_ARM_CORE0_OPTION,
EXYNOS5_ARM_CORE1_OPTION,
EXYNOS5_ARM_COMMON_OPTION,
@ -331,7 +331,7 @@ static void __iomem *exynos5_list_both_cnt_feed[] = {
EXYNOS5_TOP_PWR_SYSMEM_OPTION,
};
static void __iomem *exynos5_list_diable_wfi_wfe[] = {
static void __iomem * const exynos5_list_diable_wfi_wfe[] = {
EXYNOS5_ARM_CORE1_OPTION,
EXYNOS5_FSYS_ARM_OPTION,
EXYNOS5_ISP_ARM_OPTION,