Merge branch 'regulator-4.20' into regulator-next
This commit is contained in:
Mark Brown
commit
4fd1f509e8
55 changed files with 3109 additions and 1113 deletions
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@ -30,6 +30,7 @@ struct gpio_descs {
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#define GPIOD_FLAGS_BIT_DIR_OUT BIT(1)
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#define GPIOD_FLAGS_BIT_DIR_VAL BIT(2)
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#define GPIOD_FLAGS_BIT_OPEN_DRAIN BIT(3)
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#define GPIOD_FLAGS_BIT_NONEXCLUSIVE BIT(4)
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/**
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* Optional flags that can be passed to one of gpiod_* to configure direction
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@ -1,112 +1,127 @@
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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/* Copyright (C) 2018 ROHM Semiconductors */
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#ifndef __LINUX_MFD_BD71837_H__
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#define __LINUX_MFD_BD71837_H__
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#ifndef __LINUX_MFD_BD718XX_H__
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#define __LINUX_MFD_BD718XX_H__
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#include <linux/regmap.h>
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enum {
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BD71837_BUCK1 = 0,
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BD71837_BUCK2,
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BD71837_BUCK3,
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BD71837_BUCK4,
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BD71837_BUCK5,
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BD71837_BUCK6,
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BD71837_BUCK7,
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BD71837_BUCK8,
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BD71837_LDO1,
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BD71837_LDO2,
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BD71837_LDO3,
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BD71837_LDO4,
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BD71837_LDO5,
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BD71837_LDO6,
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BD71837_LDO7,
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BD71837_REGULATOR_CNT,
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BD718XX_TYPE_BD71837 = 0,
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BD718XX_TYPE_BD71847,
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BD718XX_TYPE_AMOUNT
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};
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#define BD71837_BUCK1_VOLTAGE_NUM 0x40
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#define BD71837_BUCK2_VOLTAGE_NUM 0x40
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#define BD71837_BUCK3_VOLTAGE_NUM 0x40
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#define BD71837_BUCK4_VOLTAGE_NUM 0x40
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enum {
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BD718XX_BUCK1 = 0,
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BD718XX_BUCK2,
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BD718XX_BUCK3,
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BD718XX_BUCK4,
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BD718XX_BUCK5,
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BD718XX_BUCK6,
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BD718XX_BUCK7,
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BD718XX_BUCK8,
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BD718XX_LDO1,
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BD718XX_LDO2,
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BD718XX_LDO3,
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BD718XX_LDO4,
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BD718XX_LDO5,
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BD718XX_LDO6,
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BD718XX_LDO7,
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BD718XX_REGULATOR_AMOUNT,
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};
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#define BD71837_BUCK5_VOLTAGE_NUM 0x08
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/* Common voltage configurations */
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#define BD718XX_DVS_BUCK_VOLTAGE_NUM 0x3D
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#define BD718XX_4TH_NODVS_BUCK_VOLTAGE_NUM 0x3D
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#define BD718XX_LDO1_VOLTAGE_NUM 0x08
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#define BD718XX_LDO2_VOLTAGE_NUM 0x02
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#define BD718XX_LDO3_VOLTAGE_NUM 0x10
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#define BD718XX_LDO4_VOLTAGE_NUM 0x0A
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#define BD718XX_LDO6_VOLTAGE_NUM 0x0A
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/* BD71837 specific voltage configurations */
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#define BD71837_BUCK5_VOLTAGE_NUM 0x10
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#define BD71837_BUCK6_VOLTAGE_NUM 0x04
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#define BD71837_BUCK7_VOLTAGE_NUM 0x08
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#define BD71837_BUCK8_VOLTAGE_NUM 0x40
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#define BD71837_LDO1_VOLTAGE_NUM 0x04
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#define BD71837_LDO2_VOLTAGE_NUM 0x02
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#define BD71837_LDO3_VOLTAGE_NUM 0x10
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#define BD71837_LDO4_VOLTAGE_NUM 0x10
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#define BD71837_LDO5_VOLTAGE_NUM 0x10
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#define BD71837_LDO6_VOLTAGE_NUM 0x10
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#define BD71837_LDO7_VOLTAGE_NUM 0x10
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/* BD71847 specific voltage configurations */
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#define BD71847_BUCK3_VOLTAGE_NUM 0x18
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#define BD71847_BUCK4_VOLTAGE_NUM 0x08
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#define BD71847_LDO5_VOLTAGE_NUM 0x20
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/* Registers specific to BD71837 */
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enum {
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BD71837_REG_REV = 0x00,
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BD71837_REG_SWRESET = 0x01,
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BD71837_REG_I2C_DEV = 0x02,
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BD71837_REG_PWRCTRL0 = 0x03,
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BD71837_REG_PWRCTRL1 = 0x04,
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BD71837_REG_BUCK1_CTRL = 0x05,
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BD71837_REG_BUCK2_CTRL = 0x06,
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BD71837_REG_BUCK3_CTRL = 0x07,
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BD71837_REG_BUCK4_CTRL = 0x08,
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BD71837_REG_BUCK5_CTRL = 0x09,
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BD71837_REG_BUCK6_CTRL = 0x0A,
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BD71837_REG_BUCK7_CTRL = 0x0B,
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BD71837_REG_BUCK8_CTRL = 0x0C,
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BD71837_REG_BUCK1_VOLT_RUN = 0x0D,
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BD71837_REG_BUCK1_VOLT_IDLE = 0x0E,
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BD71837_REG_BUCK1_VOLT_SUSP = 0x0F,
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BD71837_REG_BUCK2_VOLT_RUN = 0x10,
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BD71837_REG_BUCK2_VOLT_IDLE = 0x11,
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BD71837_REG_BUCK3_VOLT_RUN = 0x12,
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BD71837_REG_BUCK4_VOLT_RUN = 0x13,
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BD71837_REG_BUCK5_VOLT = 0x14,
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BD71837_REG_BUCK6_VOLT = 0x15,
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BD71837_REG_BUCK7_VOLT = 0x16,
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BD71837_REG_BUCK8_VOLT = 0x17,
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BD71837_REG_LDO1_VOLT = 0x18,
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BD71837_REG_LDO2_VOLT = 0x19,
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BD71837_REG_LDO3_VOLT = 0x1A,
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BD71837_REG_LDO4_VOLT = 0x1B,
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BD71837_REG_LDO5_VOLT = 0x1C,
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BD71837_REG_LDO6_VOLT = 0x1D,
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BD71837_REG_LDO7_VOLT = 0x1E,
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BD71837_REG_TRANS_COND0 = 0x1F,
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BD71837_REG_TRANS_COND1 = 0x20,
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BD71837_REG_VRFAULTEN = 0x21,
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BD718XX_REG_MVRFLTMASK0 = 0x22,
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BD718XX_REG_MVRFLTMASK1 = 0x23,
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BD718XX_REG_MVRFLTMASK2 = 0x24,
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BD71837_REG_RCVCFG = 0x25,
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BD71837_REG_RCVNUM = 0x26,
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BD71837_REG_PWRONCONFIG0 = 0x27,
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BD71837_REG_PWRONCONFIG1 = 0x28,
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BD71837_REG_RESETSRC = 0x29,
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BD71837_REG_MIRQ = 0x2A,
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BD71837_REG_IRQ = 0x2B,
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BD71837_REG_IN_MON = 0x2C,
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BD71837_REG_POW_STATE = 0x2D,
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BD71837_REG_OUT32K = 0x2E,
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BD71837_REG_REGLOCK = 0x2F,
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BD71837_REG_OTPVER = 0xFF,
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BD71837_MAX_REGISTER = 0x100,
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BD71837_REG_BUCK3_CTRL = 0x07,
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BD71837_REG_BUCK4_CTRL = 0x08,
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BD71837_REG_BUCK3_VOLT_RUN = 0x12,
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BD71837_REG_BUCK4_VOLT_RUN = 0x13,
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BD71837_REG_LDO7_VOLT = 0x1E,
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};
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/* Registers common for BD71837 and BD71847 */
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enum {
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BD718XX_REG_REV = 0x00,
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BD718XX_REG_SWRESET = 0x01,
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BD718XX_REG_I2C_DEV = 0x02,
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BD718XX_REG_PWRCTRL0 = 0x03,
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BD718XX_REG_PWRCTRL1 = 0x04,
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BD718XX_REG_BUCK1_CTRL = 0x05,
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BD718XX_REG_BUCK2_CTRL = 0x06,
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BD718XX_REG_1ST_NODVS_BUCK_CTRL = 0x09,
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BD718XX_REG_2ND_NODVS_BUCK_CTRL = 0x0A,
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BD718XX_REG_3RD_NODVS_BUCK_CTRL = 0x0B,
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BD718XX_REG_4TH_NODVS_BUCK_CTRL = 0x0C,
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BD718XX_REG_BUCK1_VOLT_RUN = 0x0D,
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BD718XX_REG_BUCK1_VOLT_IDLE = 0x0E,
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BD718XX_REG_BUCK1_VOLT_SUSP = 0x0F,
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BD718XX_REG_BUCK2_VOLT_RUN = 0x10,
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BD718XX_REG_BUCK2_VOLT_IDLE = 0x11,
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BD718XX_REG_1ST_NODVS_BUCK_VOLT = 0x14,
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BD718XX_REG_2ND_NODVS_BUCK_VOLT = 0x15,
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BD718XX_REG_3RD_NODVS_BUCK_VOLT = 0x16,
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BD718XX_REG_4TH_NODVS_BUCK_VOLT = 0x17,
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BD718XX_REG_LDO1_VOLT = 0x18,
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BD718XX_REG_LDO2_VOLT = 0x19,
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BD718XX_REG_LDO3_VOLT = 0x1A,
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BD718XX_REG_LDO4_VOLT = 0x1B,
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BD718XX_REG_LDO5_VOLT = 0x1C,
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BD718XX_REG_LDO6_VOLT = 0x1D,
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BD718XX_REG_TRANS_COND0 = 0x1F,
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BD718XX_REG_TRANS_COND1 = 0x20,
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BD718XX_REG_VRFAULTEN = 0x21,
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BD718XX_REG_MVRFLTMASK0 = 0x22,
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BD718XX_REG_MVRFLTMASK1 = 0x23,
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BD718XX_REG_MVRFLTMASK2 = 0x24,
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BD718XX_REG_RCVCFG = 0x25,
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BD718XX_REG_RCVNUM = 0x26,
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BD718XX_REG_PWRONCONFIG0 = 0x27,
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BD718XX_REG_PWRONCONFIG1 = 0x28,
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BD718XX_REG_RESETSRC = 0x29,
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BD718XX_REG_MIRQ = 0x2A,
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BD718XX_REG_IRQ = 0x2B,
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BD718XX_REG_IN_MON = 0x2C,
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BD718XX_REG_POW_STATE = 0x2D,
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BD718XX_REG_OUT32K = 0x2E,
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BD718XX_REG_REGLOCK = 0x2F,
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BD718XX_REG_OTPVER = 0xFF,
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BD718XX_MAX_REGISTER = 0x100,
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};
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#define REGLOCK_PWRSEQ 0x1
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#define REGLOCK_VREG 0x10
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/* Generic BUCK control masks */
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#define BD71837_BUCK_SEL 0x02
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#define BD71837_BUCK_EN 0x01
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#define BD71837_BUCK_RUN_ON 0x04
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#define BD718XX_BUCK_SEL 0x02
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#define BD718XX_BUCK_EN 0x01
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#define BD718XX_BUCK_RUN_ON 0x04
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/* Generic LDO masks */
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#define BD71837_LDO_SEL 0x80
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#define BD71837_LDO_EN 0x40
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#define BD718XX_LDO_SEL 0x80
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#define BD718XX_LDO_EN 0x40
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/* BD71837 BUCK ramp rate CTRL reg bits */
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#define BUCK_RAMPRATE_MASK 0xC0
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@ -115,49 +130,35 @@ enum {
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#define BUCK_RAMPRATE_2P50MV 0x2
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#define BUCK_RAMPRATE_1P25MV 0x3
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/* BD71837_REG_BUCK1_VOLT_RUN bits */
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#define BUCK1_RUN_MASK 0x3F
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#define BUCK1_RUN_DEFAULT 0x14
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#define DVS_BUCK_RUN_MASK 0x3F
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#define DVS_BUCK_SUSP_MASK 0x3F
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#define DVS_BUCK_IDLE_MASK 0x3F
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/* BD71837_REG_BUCK1_VOLT_SUSP bits */
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#define BUCK1_SUSP_MASK 0x3F
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#define BUCK1_SUSP_DEFAULT 0x14
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#define BD718XX_1ST_NODVS_BUCK_MASK 0x07
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#define BD718XX_3RD_NODVS_BUCK_MASK 0x07
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#define BD718XX_4TH_NODVS_BUCK_MASK 0x3F
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/* BD71837_REG_BUCK1_VOLT_IDLE bits */
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#define BUCK1_IDLE_MASK 0x3F
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#define BUCK1_IDLE_DEFAULT 0x14
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#define BD71847_BUCK3_MASK 0x07
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#define BD71847_BUCK3_RANGE_MASK 0xC0
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#define BD71847_BUCK4_MASK 0x03
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#define BD71847_BUCK4_RANGE_MASK 0x40
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/* BD71837_REG_BUCK2_VOLT_RUN bits */
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#define BUCK2_RUN_MASK 0x3F
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#define BUCK2_RUN_DEFAULT 0x1E
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#define BD71837_BUCK5_MASK 0x07
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#define BD71837_BUCK5_RANGE_MASK 0x80
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#define BD71837_BUCK6_MASK 0x03
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/* BD71837_REG_BUCK2_VOLT_IDLE bits */
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#define BUCK2_IDLE_MASK 0x3F
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#define BUCK2_IDLE_DEFAULT 0x14
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#define BD718XX_LDO1_MASK 0x03
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#define BD718XX_LDO1_RANGE_MASK 0x20
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#define BD718XX_LDO2_MASK 0x20
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#define BD718XX_LDO3_MASK 0x0F
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#define BD718XX_LDO4_MASK 0x0F
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#define BD718XX_LDO6_MASK 0x0F
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/* BD71837_REG_BUCK3_VOLT_RUN bits */
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#define BUCK3_RUN_MASK 0x3F
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#define BUCK3_RUN_DEFAULT 0x1E
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#define BD71837_LDO5_MASK 0x0F
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#define BD71847_LDO5_MASK 0x0F
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#define BD71847_LDO5_RANGE_MASK 0x20
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/* BD71837_REG_BUCK4_VOLT_RUN bits */
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#define BUCK4_RUN_MASK 0x3F
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#define BUCK4_RUN_DEFAULT 0x1E
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/* BD71837_REG_BUCK5_VOLT bits */
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#define BUCK5_MASK 0x07
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#define BUCK5_DEFAULT 0x02
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/* BD71837_REG_BUCK6_VOLT bits */
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#define BUCK6_MASK 0x03
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#define BUCK6_DEFAULT 0x03
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/* BD71837_REG_BUCK7_VOLT bits */
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#define BUCK7_MASK 0x07
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#define BUCK7_DEFAULT 0x03
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/* BD71837_REG_BUCK8_VOLT bits */
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#define BUCK8_MASK 0x3F
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#define BUCK8_DEFAULT 0x1E
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#define BD71837_LDO7_MASK 0x0F
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/* BD718XX Voltage monitoring masks */
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#define BD718XX_BUCK1_VRMON80 0x1
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@ -186,7 +187,7 @@ enum {
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#define BD71837_BUCK4_VRMON130 0x80
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#define BD71837_LDO7_VRMON80 0x40
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/* BD71837_REG_IRQ bits */
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/* BD718XX_REG_IRQ bits */
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#define IRQ_SWRST 0x40
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#define IRQ_PWRON_S 0x20
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#define IRQ_PWRON_L 0x10
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@ -195,52 +196,31 @@ enum {
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#define IRQ_ON_REQ 0x02
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#define IRQ_STBY_REQ 0x01
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/* BD71837_REG_OUT32K bits */
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#define BD71837_OUT32K_EN 0x01
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/* BD718XX_REG_OUT32K bits */
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#define BD718XX_OUT32K_EN 0x01
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/* BD71837 gated clock rate */
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#define BD71837_CLK_RATE 32768
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/* BD7183XX gated clock rate */
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#define BD718XX_CLK_RATE 32768
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/* ROHM BD71837 irqs */
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/* ROHM BD718XX irqs */
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enum {
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BD71837_INT_STBY_REQ,
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BD71837_INT_ON_REQ,
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BD71837_INT_WDOG,
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BD71837_INT_PWRBTN,
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BD71837_INT_PWRBTN_L,
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BD71837_INT_PWRBTN_S,
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BD71837_INT_SWRST
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BD718XX_INT_STBY_REQ,
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BD718XX_INT_ON_REQ,
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BD718XX_INT_WDOG,
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BD718XX_INT_PWRBTN,
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BD718XX_INT_PWRBTN_L,
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BD718XX_INT_PWRBTN_S,
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BD718XX_INT_SWRST
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};
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/* ROHM BD71837 interrupt masks */
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#define BD71837_INT_SWRST_MASK 0x40
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#define BD71837_INT_PWRBTN_S_MASK 0x20
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#define BD71837_INT_PWRBTN_L_MASK 0x10
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#define BD71837_INT_PWRBTN_MASK 0x8
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#define BD71837_INT_WDOG_MASK 0x4
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#define BD71837_INT_ON_REQ_MASK 0x2
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#define BD71837_INT_STBY_REQ_MASK 0x1
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/* BD71837_REG_LDO1_VOLT bits */
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#define LDO1_MASK 0x03
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/* BD71837_REG_LDO1_VOLT bits */
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#define LDO2_MASK 0x20
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/* BD71837_REG_LDO3_VOLT bits */
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#define LDO3_MASK 0x0F
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/* BD71837_REG_LDO4_VOLT bits */
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#define LDO4_MASK 0x0F
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/* BD71837_REG_LDO5_VOLT bits */
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#define LDO5_MASK 0x0F
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/* BD71837_REG_LDO6_VOLT bits */
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#define LDO6_MASK 0x0F
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/* BD71837_REG_LDO7_VOLT bits */
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#define LDO7_MASK 0x0F
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/* ROHM BD718XX interrupt masks */
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#define BD718XX_INT_SWRST_MASK 0x40
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#define BD718XX_INT_PWRBTN_S_MASK 0x20
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#define BD718XX_INT_PWRBTN_L_MASK 0x10
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#define BD718XX_INT_PWRBTN_MASK 0x8
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#define BD718XX_INT_WDOG_MASK 0x4
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#define BD718XX_INT_ON_REQ_MASK 0x2
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#define BD718XX_INT_STBY_REQ_MASK 0x1
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/* Register write induced reset settings */
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|
@ -250,13 +230,13 @@ enum {
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|||
* write 1 to it we will trigger the action. So always write 0 to it when
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||||
* changning SWRESET action - no matter what we read from it.
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||||
*/
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#define BD71837_SWRESET_TYPE_MASK 7
|
||||
#define BD71837_SWRESET_TYPE_DISABLED 0
|
||||
#define BD71837_SWRESET_TYPE_COLD 4
|
||||
#define BD71837_SWRESET_TYPE_WARM 6
|
||||
#define BD718XX_SWRESET_TYPE_MASK 7
|
||||
#define BD718XX_SWRESET_TYPE_DISABLED 0
|
||||
#define BD718XX_SWRESET_TYPE_COLD 4
|
||||
#define BD718XX_SWRESET_TYPE_WARM 6
|
||||
|
||||
#define BD71837_SWRESET_RESET_MASK 1
|
||||
#define BD71837_SWRESET_RESET 1
|
||||
#define BD718XX_SWRESET_RESET_MASK 1
|
||||
#define BD718XX_SWRESET_RESET 1
|
||||
|
||||
/* Poweroff state transition conditions */
|
||||
|
||||
|
|
@ -341,10 +321,10 @@ enum {
|
|||
BD718XX_PWRBTN_LONG_PRESS_15S
|
||||
};
|
||||
|
||||
struct bd71837_pmic;
|
||||
struct bd71837_clk;
|
||||
struct bd718xx_clk;
|
||||
|
||||
struct bd71837 {
|
||||
struct bd718xx {
|
||||
unsigned int chip_type;
|
||||
struct device *dev;
|
||||
struct regmap *regmap;
|
||||
unsigned long int id;
|
||||
|
|
@ -352,8 +332,7 @@ struct bd71837 {
|
|||
int chip_irq;
|
||||
struct regmap_irq_chip_data *irq_data;
|
||||
|
||||
struct bd71837_pmic *pmic;
|
||||
struct bd71837_clk *clk;
|
||||
struct bd718xx_clk *clk;
|
||||
};
|
||||
|
||||
#endif /* __LINUX_MFD_BD71837_H__ */
|
||||
#endif /* __LINUX_MFD_BD718XX_H__ */
|
||||
|
|
|
|||
|
|
@ -271,9 +271,16 @@ enum regulator_type {
|
|||
* @ramp_delay: Time to settle down after voltage change (unit: uV/us)
|
||||
* @min_dropout_uV: The minimum dropout voltage this regulator can handle
|
||||
* @linear_ranges: A constant table of possible voltage ranges.
|
||||
* @n_linear_ranges: Number of entries in the @linear_ranges table.
|
||||
* @linear_range_selectors: A constant table of voltage range selectors.
|
||||
* If pickable ranges are used each range must
|
||||
* have corresponding selector here.
|
||||
* @n_linear_ranges: Number of entries in the @linear_ranges (and in
|
||||
* linear_range_selectors if used) table(s).
|
||||
* @volt_table: Voltage mapping table (if table based mapping)
|
||||
*
|
||||
* @vsel_range_reg: Register for range selector when using pickable ranges
|
||||
* and regulator_regmap_X_voltage_X_pickable functions.
|
||||
* @vsel_range_mask: Mask for register bitfield used for range selector
|
||||
* @vsel_reg: Register for selector when using regulator_regmap_X_voltage_
|
||||
* @vsel_mask: Mask for register bitfield used for selector
|
||||
* @csel_reg: Register for TPS65218 LS3 current regulator
|
||||
|
|
@ -338,10 +345,14 @@ struct regulator_desc {
|
|||
int min_dropout_uV;
|
||||
|
||||
const struct regulator_linear_range *linear_ranges;
|
||||
const unsigned int *linear_range_selectors;
|
||||
|
||||
int n_linear_ranges;
|
||||
|
||||
const unsigned int *volt_table;
|
||||
|
||||
unsigned int vsel_range_reg;
|
||||
unsigned int vsel_range_mask;
|
||||
unsigned int vsel_reg;
|
||||
unsigned int vsel_mask;
|
||||
unsigned int csel_reg;
|
||||
|
|
@ -498,18 +509,25 @@ int regulator_mode_to_status(unsigned int);
|
|||
|
||||
int regulator_list_voltage_linear(struct regulator_dev *rdev,
|
||||
unsigned int selector);
|
||||
int regulator_list_voltage_pickable_linear_range(struct regulator_dev *rdev,
|
||||
unsigned int selector);
|
||||
int regulator_list_voltage_linear_range(struct regulator_dev *rdev,
|
||||
unsigned int selector);
|
||||
int regulator_list_voltage_table(struct regulator_dev *rdev,
|
||||
unsigned int selector);
|
||||
int regulator_map_voltage_linear(struct regulator_dev *rdev,
|
||||
int min_uV, int max_uV);
|
||||
int regulator_map_voltage_pickable_linear_range(struct regulator_dev *rdev,
|
||||
int min_uV, int max_uV);
|
||||
int regulator_map_voltage_linear_range(struct regulator_dev *rdev,
|
||||
int min_uV, int max_uV);
|
||||
int regulator_map_voltage_iterate(struct regulator_dev *rdev,
|
||||
int min_uV, int max_uV);
|
||||
int regulator_map_voltage_ascend(struct regulator_dev *rdev,
|
||||
int min_uV, int max_uV);
|
||||
int regulator_get_voltage_sel_pickable_regmap(struct regulator_dev *rdev);
|
||||
int regulator_set_voltage_sel_pickable_regmap(struct regulator_dev *rdev,
|
||||
unsigned int sel);
|
||||
int regulator_get_voltage_sel_regmap(struct regulator_dev *rdev);
|
||||
int regulator_set_voltage_sel_regmap(struct regulator_dev *rdev, unsigned sel);
|
||||
int regulator_is_enabled_regmap(struct regulator_dev *rdev);
|
||||
|
|
|
|||
|
|
@ -24,8 +24,6 @@ struct regulator_init_data;
|
|||
* @supply_name: Name of the regulator supply
|
||||
* @input_supply: Name of the input regulator supply
|
||||
* @microvolts: Output voltage of regulator
|
||||
* @gpio: GPIO to use for enable control
|
||||
* set to -EINVAL if not used
|
||||
* @startup_delay: Start-up time in microseconds
|
||||
* @gpio_is_open_drain: Gpio pin is open drain or normal type.
|
||||
* If it is open drain type then HIGH will be set
|
||||
|
|
@ -49,7 +47,6 @@ struct fixed_voltage_config {
|
|||
const char *supply_name;
|
||||
const char *input_supply;
|
||||
int microvolts;
|
||||
int gpio;
|
||||
unsigned startup_delay;
|
||||
unsigned gpio_is_open_drain:1;
|
||||
unsigned enable_high:1;
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue