Bitmap patches for v6.0-rc1
This branch consists of: Qu Wenruo: lib: bitmap: fix the duplicated comments on bitmap_to_arr64() https://lore.kernel.org/lkml/0d85e1dbad52ad7fb5787c4432bdb36cbd24f632.1656063005.git.wqu@suse.com/ Alexander Lobakin: bitops: let optimize out non-atomic bitops on compile-time constants https://lore.kernel.org/lkml/20220624121313.2382500-1-alexandr.lobakin@intel.com/T/ Yury Norov: lib: cleanup bitmap-related headers https://lore.kernel.org/linux-arm-kernel/YtCVeOGLiQ4gNPSf@yury-laptop/T/#m305522194c4d38edfdaffa71fcaaf2e2ca00a961 Alexander Lobakin: x86/olpc: fix 'logical not is only applied to the left hand side' https://www.spinics.net/lists/kernel/msg4440064.html Yury Norov: lib/nodemask: inline wrappers around bitmap https://lore.kernel.org/all/20220723214537.2054208-1-yury.norov@gmail.com/ -----BEGIN PGP SIGNATURE----- iQGzBAABCgAdFiEEi8GdvG6xMhdgpu/4sUSA/TofvsgFAmLpVvwACgkQsUSA/Tof vsiAHgwAwS9pl8GJ+fKYnue2CYo9349d2oT6BBUs/Rv8uqYEa4QkpYsR7NS733TG pos0hhoRvSOzrUP4qppXUjfJ+NkzLgpnKFOeWfFoNAKlHuaaMRvF3Y0Q/P8g0/Kg HPWcCQLHyCH9Wjs3e2TTgRjxTrHuruD2VJ401/PX/lw0DicUhmev5mUFa10uwFkP ZJRprjoFn9HJ0Hk16pFZDi36d3YumhACOcWRiJdoBDrEPV3S6lm9EeOy/yHBNp5k 9bKj+RboeT2t70KaZcKv+M5j1nu0cAhl7kRkjcxcmGyimI0l82Vgq9yFxhGqvWg8 RnCrJ5EaO08FGCAKG9GEwzdiNa24Gdq5XZSpQA7JZHmhmchpnnlNenJicyv0gOQi abChZeWSEsyA+78l2+kk9nezfVKUOnKDEZQxBVTOyWsmZYxHZV94oam340VjQDaY 4/fETdOy/qqPIxnpxAeFGWxZjcVaYiYPLj7KLPMsB0aAAF7pZrem465vSfgbrE81 +gCdqrWd =4dTW -----END PGP SIGNATURE----- Merge tag 'bitmap-6.0-rc1' of https://github.com/norov/linux Pull bitmap updates from Yury Norov: - fix the duplicated comments on bitmap_to_arr64() (Qu Wenruo) - optimize out non-atomic bitops on compile-time constants (Alexander Lobakin) - cleanup bitmap-related headers (Yury Norov) - x86/olpc: fix 'logical not is only applied to the left hand side' (Alexander Lobakin) - lib/nodemask: inline wrappers around bitmap (Yury Norov) * tag 'bitmap-6.0-rc1' of https://github.com/norov/linux: (26 commits) lib/nodemask: inline next_node_in() and node_random() powerpc: drop dependency on <asm/machdep.h> in archrandom.h x86/olpc: fix 'logical not is only applied to the left hand side' lib/cpumask: move some one-line wrappers to header file headers/deps: mm: align MANITAINERS and Docs with new gfp.h structure headers/deps: mm: Split <linux/gfp_types.h> out of <linux/gfp.h> headers/deps: mm: Optimize <linux/gfp.h> header dependencies lib/cpumask: move trivial wrappers around find_bit to the header lib/cpumask: change return types to unsigned where appropriate cpumask: change return types to bool where appropriate lib/bitmap: change type of bitmap_weight to unsigned long lib/bitmap: change return types to bool where appropriate arm: align find_bit declarations with generic kernel iommu/vt-d: avoid invalid memory access via node_online(NUMA_NO_NODE) lib/test_bitmap: test the tail after bitmap_to_arr64() lib/bitmap: fix off-by-one in bitmap_to_arr64() lib: test_bitmap: add compile-time optimization/evaluations assertions bitmap: don't assume compiler evaluates small mem*() builtins calls net/ice: fix initializing the bitmap in the switch code bitops: let optimize out non-atomic bitops on compile-time constants ...
This commit is contained in:
commit
4e23eeebb2
38 changed files with 1077 additions and 790 deletions
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@ -2,6 +2,8 @@
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#ifndef __ASM_SH_BITOPS_OP32_H
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#define __ASM_SH_BITOPS_OP32_H
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#include <linux/bits.h>
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/*
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* The bit modifying instructions on SH-2A are only capable of working
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* with a 3-bit immediate, which signifies the shift position for the bit
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@ -16,7 +18,8 @@
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#define BYTE_OFFSET(nr) ((nr) % BITS_PER_BYTE)
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#endif
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static inline void __set_bit(int nr, volatile unsigned long *addr)
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static __always_inline void
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arch___set_bit(unsigned long nr, volatile unsigned long *addr)
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{
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if (__builtin_constant_p(nr)) {
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__asm__ __volatile__ (
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@ -33,7 +36,8 @@ static inline void __set_bit(int nr, volatile unsigned long *addr)
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}
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}
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static inline void __clear_bit(int nr, volatile unsigned long *addr)
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static __always_inline void
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arch___clear_bit(unsigned long nr, volatile unsigned long *addr)
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{
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if (__builtin_constant_p(nr)) {
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__asm__ __volatile__ (
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@ -52,7 +56,7 @@ static inline void __clear_bit(int nr, volatile unsigned long *addr)
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}
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/**
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* __change_bit - Toggle a bit in memory
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* arch___change_bit - Toggle a bit in memory
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* @nr: the bit to change
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* @addr: the address to start counting from
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*
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@ -60,7 +64,8 @@ static inline void __clear_bit(int nr, volatile unsigned long *addr)
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* If it's called on the same region of memory simultaneously, the effect
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* may be that only one operation succeeds.
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*/
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static inline void __change_bit(int nr, volatile unsigned long *addr)
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static __always_inline void
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arch___change_bit(unsigned long nr, volatile unsigned long *addr)
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{
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if (__builtin_constant_p(nr)) {
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__asm__ __volatile__ (
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@ -79,7 +84,7 @@ static inline void __change_bit(int nr, volatile unsigned long *addr)
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}
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/**
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* __test_and_set_bit - Set a bit and return its old value
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* arch___test_and_set_bit - Set a bit and return its old value
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* @nr: Bit to set
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* @addr: Address to count from
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*
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@ -87,7 +92,8 @@ static inline void __change_bit(int nr, volatile unsigned long *addr)
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* If two examples of this operation race, one can appear to succeed
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* but actually fail. You must protect multiple accesses with a lock.
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*/
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static inline int __test_and_set_bit(int nr, volatile unsigned long *addr)
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static __always_inline bool
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arch___test_and_set_bit(unsigned long nr, volatile unsigned long *addr)
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{
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unsigned long mask = BIT_MASK(nr);
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unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
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@ -98,7 +104,7 @@ static inline int __test_and_set_bit(int nr, volatile unsigned long *addr)
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}
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/**
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* __test_and_clear_bit - Clear a bit and return its old value
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* arch___test_and_clear_bit - Clear a bit and return its old value
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* @nr: Bit to clear
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* @addr: Address to count from
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*
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@ -106,7 +112,8 @@ static inline int __test_and_set_bit(int nr, volatile unsigned long *addr)
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* If two examples of this operation race, one can appear to succeed
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* but actually fail. You must protect multiple accesses with a lock.
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*/
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static inline int __test_and_clear_bit(int nr, volatile unsigned long *addr)
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static __always_inline bool
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arch___test_and_clear_bit(unsigned long nr, volatile unsigned long *addr)
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{
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unsigned long mask = BIT_MASK(nr);
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unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
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@ -117,8 +124,8 @@ static inline int __test_and_clear_bit(int nr, volatile unsigned long *addr)
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}
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/* WARNING: non atomic and it can be reordered! */
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static inline int __test_and_change_bit(int nr,
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volatile unsigned long *addr)
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static __always_inline bool
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arch___test_and_change_bit(unsigned long nr, volatile unsigned long *addr)
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{
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unsigned long mask = BIT_MASK(nr);
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unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
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@ -129,13 +136,16 @@ static inline int __test_and_change_bit(int nr,
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}
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/**
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* test_bit - Determine whether a bit is set
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* arch_test_bit - Determine whether a bit is set
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* @nr: bit number to test
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* @addr: Address to start counting from
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*/
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static inline int test_bit(int nr, const volatile unsigned long *addr)
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static __always_inline bool
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arch_test_bit(unsigned long nr, const volatile unsigned long *addr)
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{
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return 1UL & (addr[BIT_WORD(nr)] >> (nr & (BITS_PER_LONG-1)));
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}
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#include <asm-generic/bitops/non-instrumented-non-atomic.h>
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#endif /* __ASM_SH_BITOPS_OP32_H */
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