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dmaengine updates for v5.3-rc1

Browse source 
- Add support in dmaengine core to do device node checks for DT devices and
    update bunch of drivers to use that and remove open coding from drivers
  - New driver/driver support for new hardware, namely:
    - MediaTek UART APDMA
    - Freescale i.mx7ulp edma2
    - Synopsys eDMA IP core version 0
    - Allwinner H6 DMA
  - Updates to axi-dma and support for interleaved cyclic transfers
  - Greg's debugfs return value check removals on drivers
  - Updates to stm32-dma, hsu, dw, pl330, tegra drivers
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Merge tag 'dmaengine-5.3-rc1' of git://git.infradead.org/users/vkoul/slave-dma

Pull dmaengine updates from Vinod Koul:

 - Add support in dmaengine core to do device node checks for DT devices
   and update bunch of drivers to use that and remove open coding from
   drivers

 - New driver/driver support for new hardware, namely:
     - MediaTek UART APDMA
     - Freescale i.mx7ulp edma2
     - Synopsys eDMA IP core version 0
     - Allwinner H6 DMA

 - Updates to axi-dma and support for interleaved cyclic transfers

 - Greg's debugfs return value check removals on drivers

 - Updates to stm32-dma, hsu, dw, pl330, tegra drivers

* tag 'dmaengine-5.3-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (68 commits)
  dmaengine: Revert "dmaengine: fsl-edma: add i.mx7ulp edma2 version support"
  dmaengine: at_xdmac: check for non-empty xfers_list before invoking callback
  Documentation: dmaengine: clean up description of dmatest usage
  dmaengine: tegra210-adma: remove PM_CLK dependency
  dmaengine: fsl-edma: add i.mx7ulp edma2 version support
  dt-bindings: dma: fsl-edma: add new i.mx7ulp-edma
  dmaengine: fsl-edma-common: version check for v2 instead
  dmaengine: fsl-edma-common: move dmamux register to another single function
  dmaengine: fsl-edma: add drvdata for fsl-edma
  dmaengine: Revert "dmaengine: fsl-edma: support little endian for edma driver"
  dmaengine: rcar-dmac: Reject zero-length slave DMA requests
  dmaengine: dw: Enable iDMA 32-bit on Intel Elkhart Lake
  dmaengine: dw-edma: fix semicolon.cocci warnings
  dmaengine: sh: usb-dmac: Use [] to denote a flexible array member
  dmaengine: dmatest: timeout value of -1 should specify infinite wait
  dmaengine: dw: Distinguish ->remove() between DW and iDMA 32-bit
  dmaengine: fsl-edma: support little endian for edma driver
  dmaengine: hsu: Revert "set HSU_CH_MTSR to memory width"
  dmagengine: pl330: add code to get reset property
  dt-bindings: pl330: document the optional resets property
  ...
This commit is contained in:
Linus Torvalds 2019-07-17 09:55:43 -07:00
commit 47ebe00b68
66 changed files with 3667 additions and 794 deletions
Download patch file Download diff file Expand all files Collapse all files

47
include/linux/dma/edma.h Normal file
View file

@ -0,0 +1,47 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (c) 2018-2019 Synopsys, Inc. and/or its affiliates.
* Synopsys DesignWare eDMA core driver
*
* Author: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
*/
#ifndef _DW_EDMA_H
#define _DW_EDMA_H
#include <linux/device.h>
#include <linux/dmaengine.h>
struct dw_edma;
/**
* struct dw_edma_chip - representation of DesignWare eDMA controller hardware
* @dev: struct device of the eDMA controller
* @id: instance ID
* @irq: irq line
* @dw: struct dw_edma that is filed by dw_edma_probe()
*/
struct dw_edma_chip {
struct device *dev;
int id;
int irq;
struct dw_edma *dw;
};
/* Export to the platform drivers */
#if IS_ENABLED(CONFIG_DW_EDMA)
int dw_edma_probe(struct dw_edma_chip *chip);
int dw_edma_remove(struct dw_edma_chip *chip);
#else
static inline int dw_edma_probe(struct dw_edma_chip *chip)
{
return -ENODEV;
}
static inline int dw_edma_remove(struct dw_edma_chip *chip)
{
return 0;
}
#endif /* CONFIG_DW_EDMA */
#endif /* _DW_EDMA_H */

12
include/linux/dmaengine.h
View file

@ -1302,7 +1302,8 @@ enum dma_status dma_sync_wait(struct dma_chan *chan, dma_cookie_t cookie);
enum dma_status dma_wait_for_async_tx(struct dma_async_tx_descriptor *tx);
void dma_issue_pending_all(void);
struct dma_chan *__dma_request_channel(const dma_cap_mask_t *mask,
dma_filter_fn fn, void *fn_param);
dma_filter_fn fn, void *fn_param,
struct device_node *np);
struct dma_chan *dma_request_slave_channel(struct device *dev, const char *name);
struct dma_chan *dma_request_chan(struct device *dev, const char *name);
@ -1327,7 +1328,9 @@ static inline void dma_issue_pending_all(void)
{
}
static inline struct dma_chan *__dma_request_channel(const dma_cap_mask_t *mask,
dma_filter_fn fn, void *fn_param)
dma_filter_fn fn,
void *fn_param,
struct device_node *np)
{
return NULL;
}
@ -1399,7 +1402,8 @@ void dma_async_device_unregister(struct dma_device *device);
void dma_run_dependencies(struct dma_async_tx_descriptor *tx);
struct dma_chan *dma_get_slave_channel(struct dma_chan *chan);
struct dma_chan *dma_get_any_slave_channel(struct dma_device *device);
#define dma_request_channel(mask, x, y) __dma_request_channel(&(mask), x, y)
#define dma_request_channel(mask, x, y) \
__dma_request_channel(&(mask), x, y, NULL)
#define dma_request_slave_channel_compat(mask, x, y, dev, name) \
__dma_request_slave_channel_compat(&(mask), x, y, dev, name)
@ -1417,6 +1421,6 @@ static inline struct dma_chan
if (!fn || !fn_param)
return NULL;
return __dma_request_channel(mask, fn, fn_param);
return __dma_request_channel(mask, fn, fn_param, NULL);
}
#endif /* DMAENGINE_H */

19
include/linux/fpga/adi-axi-common.h Normal file
View file

@ -0,0 +1,19 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Analog Devices AXI common registers & definitions
*
* Copyright 2019 Analog Devices Inc.
*
* https://wiki.analog.com/resources/fpga/docs/axi_ip
* https://wiki.analog.com/resources/fpga/docs/hdl/regmap
*/
#ifndef ADI_AXI_COMMON_H_
#define ADI_AXI_COMMON_H_
#define ADI_AXI_REG_VERSION 0x0000
#define ADI_AXI_PCORE_VER(major, minor, patch) \
(((major) << 16) | ((minor) << 8) | (patch))
#endif /* ADI_AXI_COMMON_H_ */

1
include/linux/pci_ids.h
View file

@ -2367,6 +2367,7 @@
#define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3 0xabcd
#define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3_AXI 0xabce
#define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB31 0xabcf
#define PCI_DEVICE_ID_SYNOPSYS_EDDA 0xedda
#define PCI_VENDOR_ID_USR 0x16ec

1
include/linux/platform_data/dma-imx.h
View file

@ -52,7 +52,6 @@ struct imx_dma_data {
int dma_request2; /* secondary DMA request line */
enum sdma_peripheral_type peripheral_type;
int priority;
struct device_node *of_node;
};
static inline int imx_dma_is_ipu(struct dma_chan *chan)

49
include/linux/sudmac.h
View file

@ -1,49 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Header for the SUDMAC driver
*
* Copyright (C) 2013 Renesas Solutions Corp.
*/
#ifndef SUDMAC_H
#define SUDMAC_H
#include <linux/dmaengine.h>
#include <linux/shdma-base.h>
#include <linux/types.h>
/* Used by slave DMA clients to request DMA to/from a specific peripheral */
struct sudmac_slave {
struct shdma_slave shdma_slave; /* Set by the platform */
};
/*
* Supplied by platforms to specify, how a DMA channel has to be configured for
* a certain peripheral
*/
struct sudmac_slave_config {
int slave_id;
};
struct sudmac_channel {
unsigned long offset;
unsigned long config;
unsigned long wait; /* The configuable range is 0 to 3 */
unsigned long dint_end_bit;
};
struct sudmac_pdata {
const struct sudmac_slave_config *slave;
int slave_num;
const struct sudmac_channel *channel;
int channel_num;
};
/* Definitions for the sudmac_channel.config */
#define SUDMAC_TX_BUFFER_MODE BIT(0)
#define SUDMAC_RX_END_MODE BIT(1)
/* Definitions for the sudmac_channel.dint_end_bit */
#define SUDMAC_DMA_BIT_CH0 BIT(0)
#define SUDMAC_DMA_BIT_CH1 BIT(1)
#endif