IOMMU Updates for Linux v5.18
Including:
- IOMMU Core changes:
- Removal of aux domain related code as it is basically dead
and will be replaced by iommu-fd framework
- Split of iommu_ops to carry domain-specific call-backs
separatly
- Cleanup to remove useless ops->capable implementations
- Improve 32-bit free space estimate in iova allocator
- Intel VT-d updates:
- Various cleanups of the driver
- Support for ATS of SoC-integrated devices listed in
ACPI/SATC table
- ARM SMMU updates:
- Fix SMMUv3 soft lockup during continuous stream of events
- Fix error path for Qualcomm SMMU probe()
- Rework SMMU IRQ setup to prepare the ground for PMU support
- Minor cleanups and refactoring
- AMD IOMMU driver:
- Some minor cleanups and error-handling fixes
- Rockchip IOMMU driver:
- Use standard driver registration
- MSM IOMMU driver:
- Minor cleanup and change to standard driver registration
- Mediatek IOMMU driver:
- Fixes for IOTLB flushing logic
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEEr9jSbILcajRFYWYyK/BELZcBGuMFAmI8OUkACgkQK/BELZcB
GuNz9xAAvlgEg3byMx1y6LY9IctVGyLsegweVGM4+m6XR7qvT5Llc1E2Yw4Gooe4
EAceOihDKW2T9VnMlz9g/cG7Modrx60chcB22KKfxDXPl6yF3R89EMd7DE43T6n/
KPrP9+EsBnI8QSXyYu9ZowioX4CYwWhWD0dKHKAwDvw0BWHHUJ4hTaoHqEoIqLdP
vubeHziIok/g1sylSpJjTzV7r/Na8Q3TGcb/Mi5qC8uiyiyx40vtaduMGNW+/ToN
EqOKszxPmHfHv/xf0IHo0eUZ2L/JAe0mAlZzOb09f5F2sXJrbC05jlmRaDmSjT+u
iEc1r2By/0xo6iOuQC3wD6kTvwwO/ecpNYGhXYXdTbtLquYfL5PSXjRHEU9gf2BO
i/llPDsnytPvm/hnmbi26ChNR6yrDPz5bkoCUl5mnB1jZcaZtIURN7cRlEPPZUWo
62VDNdqWDB6AvALc1/SwYdJX/i5eaBf+niS7/BJ/IkLp2oJxFzrGsU8SRJFHNYsa
zdFIUUoTw647Ul6derSpGzHow169/RwVKYPiXMsaA8/viPNjpBOtfg56abn1WLW6
N4CtwNu6tt+sPfftFdFx2cDEMW2zpWg5doMddBfEx9FAk0HJ4WLZiTpaO2PxcLyd
kCAsGHj+ViAZHINVKFV4nQN/V9yQtcIc4UPmSGJBtKCK3KUYujw=
=bcqr
-----END PGP SIGNATURE-----
Merge tag 'iommu-updates-v5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu
Pull iommu updates from Joerg Roedel:
- IOMMU Core changes:
- Removal of aux domain related code as it is basically dead and
will be replaced by iommu-fd framework
- Split of iommu_ops to carry domain-specific call-backs separatly
- Cleanup to remove useless ops->capable implementations
- Improve 32-bit free space estimate in iova allocator
- Intel VT-d updates:
- Various cleanups of the driver
- Support for ATS of SoC-integrated devices listed in ACPI/SATC
table
- ARM SMMU updates:
- Fix SMMUv3 soft lockup during continuous stream of events
- Fix error path for Qualcomm SMMU probe()
- Rework SMMU IRQ setup to prepare the ground for PMU support
- Minor cleanups and refactoring
- AMD IOMMU driver:
- Some minor cleanups and error-handling fixes
- Rockchip IOMMU driver:
- Use standard driver registration
- MSM IOMMU driver:
- Minor cleanup and change to standard driver registration
- Mediatek IOMMU driver:
- Fixes for IOTLB flushing logic
* tag 'iommu-updates-v5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (47 commits)
iommu/amd: Improve amd_iommu_v2_exit()
iommu/amd: Remove unused struct fault.devid
iommu/amd: Clean up function declarations
iommu/amd: Call memunmap in error path
iommu/arm-smmu: Account for PMU interrupts
iommu/vt-d: Enable ATS for the devices in SATC table
iommu/vt-d: Remove unused function intel_svm_capable()
iommu/vt-d: Add missing "__init" for rmrr_sanity_check()
iommu/vt-d: Move intel_iommu_ops to header file
iommu/vt-d: Fix indentation of goto labels
iommu/vt-d: Remove unnecessary prototypes
iommu/vt-d: Remove unnecessary includes
iommu/vt-d: Remove DEFER_DEVICE_DOMAIN_INFO
iommu/vt-d: Remove domain and devinfo mempool
iommu/vt-d: Remove iova_cache_get/put()
iommu/vt-d: Remove finding domain in dmar_insert_one_dev_info()
iommu/vt-d: Remove intel_iommu::domains
iommu/mediatek: Always tlb_flush_all when each PM resume
iommu/mediatek: Add tlb_lock in tlb_flush_all
iommu/mediatek: Remove the power status checking in tlb flush all
...
This commit is contained in:
Linus Torvalds
commit
34af78c4e6
41 changed files with 689 additions and 2278 deletions
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@ -525,12 +525,6 @@ struct context_entry {
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*/
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#define DOMAIN_FLAG_USE_FIRST_LEVEL BIT(1)
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/*
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* Domain represents a virtual machine which demands iommu nested
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* translation mode support.
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*/
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#define DOMAIN_FLAG_NESTING_MODE BIT(2)
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struct dmar_domain {
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int nid; /* node id */
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@ -548,7 +542,6 @@ struct dmar_domain {
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u8 iommu_snooping: 1; /* indicate snooping control feature */
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struct list_head devices; /* all devices' list */
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struct list_head subdevices; /* all subdevices' list */
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struct iova_domain iovad; /* iova's that belong to this domain */
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struct dma_pte *pgd; /* virtual address */
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@ -563,11 +556,6 @@ struct dmar_domain {
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2 == 1GiB, 3 == 512GiB, 4 == 1TiB */
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u64 max_addr; /* maximum mapped address */
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u32 default_pasid; /*
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* The default pasid used for non-SVM
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* traffic on mediated devices.
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*/
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struct iommu_domain domain; /* generic domain data structure for
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iommu core */
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};
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@ -590,7 +578,6 @@ struct intel_iommu {
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#ifdef CONFIG_INTEL_IOMMU
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unsigned long *domain_ids; /* bitmap of domains */
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struct dmar_domain ***domains; /* ptr to domains */
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spinlock_t lock; /* protect context, domain ids */
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struct root_entry *root_entry; /* virtual address */
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@ -620,21 +607,11 @@ struct intel_iommu {
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void *perf_statistic;
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};
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/* Per subdevice private data */
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struct subdev_domain_info {
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struct list_head link_phys; /* link to phys device siblings */
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struct list_head link_domain; /* link to domain siblings */
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struct device *pdev; /* physical device derived from */
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struct dmar_domain *domain; /* aux-domain */
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int users; /* user count */
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};
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/* PCI domain-device relationship */
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struct device_domain_info {
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struct list_head link; /* link to domain siblings */
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struct list_head global; /* link to global list */
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struct list_head table; /* link to pasid table */
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struct list_head subdevices; /* subdevices sibling */
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u32 segment; /* PCI segment number */
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u8 bus; /* PCI bus number */
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u8 devfn; /* PCI devfn number */
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@ -645,7 +622,6 @@ struct device_domain_info {
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u8 pri_enabled:1;
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u8 ats_supported:1;
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u8 ats_enabled:1;
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u8 auxd_enabled:1; /* Multiple domains per device */
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u8 ats_qdep;
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struct device *dev; /* it's NULL for PCIe-to-PCI bridge */
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struct intel_iommu *iommu; /* IOMMU used by this device */
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@ -717,7 +693,6 @@ static inline int nr_pte_to_next_page(struct dma_pte *pte)
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}
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extern struct dmar_drhd_unit * dmar_find_matched_drhd_unit(struct pci_dev *dev);
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extern int dmar_find_matched_atsr_unit(struct pci_dev *dev);
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extern int dmar_enable_qi(struct intel_iommu *iommu);
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extern void dmar_disable_qi(struct intel_iommu *iommu);
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@ -757,17 +732,12 @@ int for_each_device_domain(int (*fn)(struct device_domain_info *info,
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void *data), void *data);
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void iommu_flush_write_buffer(struct intel_iommu *iommu);
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int intel_iommu_enable_pasid(struct intel_iommu *iommu, struct device *dev);
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struct dmar_domain *find_domain(struct device *dev);
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struct device_domain_info *get_domain_info(struct device *dev);
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struct intel_iommu *device_to_iommu(struct device *dev, u8 *bus, u8 *devfn);
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#ifdef CONFIG_INTEL_IOMMU_SVM
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extern void intel_svm_check(struct intel_iommu *iommu);
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extern int intel_svm_enable_prq(struct intel_iommu *iommu);
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extern int intel_svm_finish_prq(struct intel_iommu *iommu);
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int intel_svm_bind_gpasid(struct iommu_domain *domain, struct device *dev,
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struct iommu_gpasid_bind_data *data);
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int intel_svm_unbind_gpasid(struct device *dev, u32 pasid);
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struct iommu_sva *intel_svm_bind(struct device *dev, struct mm_struct *mm,
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void *drvdata);
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void intel_svm_unbind(struct iommu_sva *handle);
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@ -795,7 +765,6 @@ struct intel_svm {
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unsigned int flags;
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u32 pasid;
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int gpasid; /* In case that guest PASID is different from host PASID */
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struct list_head devs;
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};
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#else
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@ -813,6 +782,8 @@ bool context_present(struct context_entry *context);
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struct context_entry *iommu_context_addr(struct intel_iommu *iommu, u8 bus,
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u8 devfn, int alloc);
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extern const struct iommu_ops intel_iommu_ops;
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#ifdef CONFIG_INTEL_IOMMU
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extern int iommu_calculate_agaw(struct intel_iommu *iommu);
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extern int iommu_calculate_max_sagaw(struct intel_iommu *iommu);
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@ -25,17 +25,5 @@
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* do such IOTLB flushes automatically.
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*/
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#define SVM_FLAG_SUPERVISOR_MODE BIT(0)
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/*
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* The SVM_FLAG_GUEST_MODE flag is used when a PASID bind is for guest
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* processes. Compared to the host bind, the primary differences are:
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* 1. mm life cycle management
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* 2. fault reporting
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*/
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#define SVM_FLAG_GUEST_MODE BIT(1)
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/*
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* The SVM_FLAG_GUEST_PASID flag is used when a guest has its own PASID space,
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* which requires guest and host PASID translation at both directions.
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*/
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#define SVM_FLAG_GUEST_PASID BIT(2)
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#endif /* __INTEL_SVM_H__ */
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@ -37,6 +37,7 @@ struct iommu_group;
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struct bus_type;
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struct device;
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struct iommu_domain;
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struct iommu_domain_ops;
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struct notifier_block;
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struct iommu_sva;
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struct iommu_fault_event;
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@ -88,7 +89,7 @@ struct iommu_domain_geometry {
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struct iommu_domain {
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unsigned type;
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const struct iommu_ops *ops;
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const struct iommu_domain_ops *ops;
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unsigned long pgsize_bitmap; /* Bitmap of page sizes in use */
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iommu_fault_handler_t handler;
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void *handler_token;
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@ -144,7 +145,6 @@ struct iommu_resv_region {
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/**
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* enum iommu_dev_features - Per device IOMMU features
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* @IOMMU_DEV_FEAT_AUX: Auxiliary domain feature
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* @IOMMU_DEV_FEAT_SVA: Shared Virtual Addresses
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* @IOMMU_DEV_FEAT_IOPF: I/O Page Faults such as PRI or Stall. Generally
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* enabling %IOMMU_DEV_FEAT_SVA requires
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@ -157,7 +157,6 @@ struct iommu_resv_region {
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* iommu_dev_has_feature(), and enable it using iommu_dev_enable_feature().
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*/
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enum iommu_dev_features {
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IOMMU_DEV_FEAT_AUX,
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IOMMU_DEV_FEAT_SVA,
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IOMMU_DEV_FEAT_IOPF,
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};
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@ -194,9 +193,75 @@ struct iommu_iotlb_gather {
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* struct iommu_ops - iommu ops and capabilities
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* @capable: check capability
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* @domain_alloc: allocate iommu domain
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* @domain_free: free iommu domain
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* @attach_dev: attach device to an iommu domain
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* @detach_dev: detach device from an iommu domain
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* @probe_device: Add device to iommu driver handling
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* @release_device: Remove device from iommu driver handling
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* @probe_finalize: Do final setup work after the device is added to an IOMMU
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* group and attached to the groups domain
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* @device_group: find iommu group for a particular device
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* @get_resv_regions: Request list of reserved regions for a device
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* @put_resv_regions: Free list of reserved regions for a device
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* @of_xlate: add OF master IDs to iommu grouping
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* @is_attach_deferred: Check if domain attach should be deferred from iommu
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* driver init to device driver init (default no)
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* @dev_has/enable/disable_feat: per device entries to check/enable/disable
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* iommu specific features.
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* @dev_feat_enabled: check enabled feature
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* @sva_bind: Bind process address space to device
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* @sva_unbind: Unbind process address space from device
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* @sva_get_pasid: Get PASID associated to a SVA handle
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* @page_response: handle page request response
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* @def_domain_type: device default domain type, return value:
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* - IOMMU_DOMAIN_IDENTITY: must use an identity domain
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* - IOMMU_DOMAIN_DMA: must use a dma domain
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* - 0: use the default setting
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* @default_domain_ops: the default ops for domains
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* @pgsize_bitmap: bitmap of all possible supported page sizes
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* @owner: Driver module providing these ops
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*/
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struct iommu_ops {
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bool (*capable)(enum iommu_cap);
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/* Domain allocation and freeing by the iommu driver */
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struct iommu_domain *(*domain_alloc)(unsigned iommu_domain_type);
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struct iommu_device *(*probe_device)(struct device *dev);
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void (*release_device)(struct device *dev);
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void (*probe_finalize)(struct device *dev);
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struct iommu_group *(*device_group)(struct device *dev);
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/* Request/Free a list of reserved regions for a device */
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void (*get_resv_regions)(struct device *dev, struct list_head *list);
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void (*put_resv_regions)(struct device *dev, struct list_head *list);
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int (*of_xlate)(struct device *dev, struct of_phandle_args *args);
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bool (*is_attach_deferred)(struct device *dev);
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/* Per device IOMMU features */
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bool (*dev_has_feat)(struct device *dev, enum iommu_dev_features f);
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bool (*dev_feat_enabled)(struct device *dev, enum iommu_dev_features f);
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int (*dev_enable_feat)(struct device *dev, enum iommu_dev_features f);
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int (*dev_disable_feat)(struct device *dev, enum iommu_dev_features f);
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struct iommu_sva *(*sva_bind)(struct device *dev, struct mm_struct *mm,
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void *drvdata);
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void (*sva_unbind)(struct iommu_sva *handle);
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u32 (*sva_get_pasid)(struct iommu_sva *handle);
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int (*page_response)(struct device *dev,
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struct iommu_fault_event *evt,
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struct iommu_page_response *msg);
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int (*def_domain_type)(struct device *dev);
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const struct iommu_domain_ops *default_domain_ops;
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unsigned long pgsize_bitmap;
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struct module *owner;
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};
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/**
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* struct iommu_domain_ops - domain specific operations
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* @attach_dev: attach an iommu domain to a device
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* @detach_dev: detach an iommu domain from a device
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* @map: map a physically contiguous memory region to an iommu domain
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* @map_pages: map a physically contiguous set of pages of the same size to
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* an iommu domain.
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@ -207,111 +272,39 @@ struct iommu_iotlb_gather {
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* @iotlb_sync: Flush all queued ranges from the hardware TLBs and empty flush
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* queue
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* @iova_to_phys: translate iova to physical address
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* @probe_device: Add device to iommu driver handling
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* @release_device: Remove device from iommu driver handling
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* @probe_finalize: Do final setup work after the device is added to an IOMMU
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* group and attached to the groups domain
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* @device_group: find iommu group for a particular device
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* @enable_nesting: Enable nesting
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* @set_pgtable_quirks: Set io page table quirks (IO_PGTABLE_QUIRK_*)
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* @get_resv_regions: Request list of reserved regions for a device
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* @put_resv_regions: Free list of reserved regions for a device
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* @apply_resv_region: Temporary helper call-back for iova reserved ranges
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* @of_xlate: add OF master IDs to iommu grouping
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* @is_attach_deferred: Check if domain attach should be deferred from iommu
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* driver init to device driver init (default no)
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* @dev_has/enable/disable_feat: per device entries to check/enable/disable
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* iommu specific features.
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* @dev_feat_enabled: check enabled feature
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* @aux_attach/detach_dev: aux-domain specific attach/detach entries.
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* @aux_get_pasid: get the pasid given an aux-domain
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* @sva_bind: Bind process address space to device
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* @sva_unbind: Unbind process address space from device
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* @sva_get_pasid: Get PASID associated to a SVA handle
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* @page_response: handle page request response
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* @cache_invalidate: invalidate translation caches
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* @sva_bind_gpasid: bind guest pasid and mm
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* @sva_unbind_gpasid: unbind guest pasid and mm
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* @def_domain_type: device default domain type, return value:
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* - IOMMU_DOMAIN_IDENTITY: must use an identity domain
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* - IOMMU_DOMAIN_DMA: must use a dma domain
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* - 0: use the default setting
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* @pgsize_bitmap: bitmap of all possible supported page sizes
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* @owner: Driver module providing these ops
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* @free: Release the domain after use.
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*/
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struct iommu_ops {
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bool (*capable)(enum iommu_cap);
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/* Domain allocation and freeing by the iommu driver */
|
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struct iommu_domain *(*domain_alloc)(unsigned iommu_domain_type);
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void (*domain_free)(struct iommu_domain *);
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struct iommu_domain_ops {
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int (*attach_dev)(struct iommu_domain *domain, struct device *dev);
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void (*detach_dev)(struct iommu_domain *domain, struct device *dev);
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int (*map)(struct iommu_domain *domain, unsigned long iova,
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phys_addr_t paddr, size_t size, int prot, gfp_t gfp);
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int (*map_pages)(struct iommu_domain *domain, unsigned long iova,
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phys_addr_t paddr, size_t pgsize, size_t pgcount,
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int prot, gfp_t gfp, size_t *mapped);
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size_t (*unmap)(struct iommu_domain *domain, unsigned long iova,
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size_t size, struct iommu_iotlb_gather *iotlb_gather);
|
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size_t size, struct iommu_iotlb_gather *iotlb_gather);
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size_t (*unmap_pages)(struct iommu_domain *domain, unsigned long iova,
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size_t pgsize, size_t pgcount,
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struct iommu_iotlb_gather *iotlb_gather);
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void (*flush_iotlb_all)(struct iommu_domain *domain);
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void (*iotlb_sync_map)(struct iommu_domain *domain, unsigned long iova,
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||||
size_t size);
|
||||
void (*iotlb_sync)(struct iommu_domain *domain,
|
||||
struct iommu_iotlb_gather *iotlb_gather);
|
||||
phys_addr_t (*iova_to_phys)(struct iommu_domain *domain, dma_addr_t iova);
|
||||
struct iommu_device *(*probe_device)(struct device *dev);
|
||||
void (*release_device)(struct device *dev);
|
||||
void (*probe_finalize)(struct device *dev);
|
||||
struct iommu_group *(*device_group)(struct device *dev);
|
||||
|
||||
phys_addr_t (*iova_to_phys)(struct iommu_domain *domain,
|
||||
dma_addr_t iova);
|
||||
|
||||
int (*enable_nesting)(struct iommu_domain *domain);
|
||||
int (*set_pgtable_quirks)(struct iommu_domain *domain,
|
||||
unsigned long quirks);
|
||||
|
||||
/* Request/Free a list of reserved regions for a device */
|
||||
void (*get_resv_regions)(struct device *dev, struct list_head *list);
|
||||
void (*put_resv_regions)(struct device *dev, struct list_head *list);
|
||||
void (*apply_resv_region)(struct device *dev,
|
||||
struct iommu_domain *domain,
|
||||
struct iommu_resv_region *region);
|
||||
|
||||
int (*of_xlate)(struct device *dev, struct of_phandle_args *args);
|
||||
bool (*is_attach_deferred)(struct iommu_domain *domain, struct device *dev);
|
||||
|
||||
/* Per device IOMMU features */
|
||||
bool (*dev_has_feat)(struct device *dev, enum iommu_dev_features f);
|
||||
bool (*dev_feat_enabled)(struct device *dev, enum iommu_dev_features f);
|
||||
int (*dev_enable_feat)(struct device *dev, enum iommu_dev_features f);
|
||||
int (*dev_disable_feat)(struct device *dev, enum iommu_dev_features f);
|
||||
|
||||
/* Aux-domain specific attach/detach entries */
|
||||
int (*aux_attach_dev)(struct iommu_domain *domain, struct device *dev);
|
||||
void (*aux_detach_dev)(struct iommu_domain *domain, struct device *dev);
|
||||
int (*aux_get_pasid)(struct iommu_domain *domain, struct device *dev);
|
||||
|
||||
struct iommu_sva *(*sva_bind)(struct device *dev, struct mm_struct *mm,
|
||||
void *drvdata);
|
||||
void (*sva_unbind)(struct iommu_sva *handle);
|
||||
u32 (*sva_get_pasid)(struct iommu_sva *handle);
|
||||
|
||||
int (*page_response)(struct device *dev,
|
||||
struct iommu_fault_event *evt,
|
||||
struct iommu_page_response *msg);
|
||||
int (*cache_invalidate)(struct iommu_domain *domain, struct device *dev,
|
||||
struct iommu_cache_invalidate_info *inv_info);
|
||||
int (*sva_bind_gpasid)(struct iommu_domain *domain,
|
||||
struct device *dev, struct iommu_gpasid_bind_data *data);
|
||||
|
||||
int (*sva_unbind_gpasid)(struct device *dev, u32 pasid);
|
||||
|
||||
int (*def_domain_type)(struct device *dev);
|
||||
|
||||
unsigned long pgsize_bitmap;
|
||||
struct module *owner;
|
||||
void (*free)(struct iommu_domain *domain);
|
||||
};
|
||||
|
||||
/**
|
||||
|
|
@ -403,6 +396,17 @@ static inline void iommu_iotlb_gather_init(struct iommu_iotlb_gather *gather)
|
|||
};
|
||||
}
|
||||
|
||||
static inline const struct iommu_ops *dev_iommu_ops(struct device *dev)
|
||||
{
|
||||
/*
|
||||
* Assume that valid ops must be installed if iommu_probe_device()
|
||||
* has succeeded. The device ops are essentially for internal use
|
||||
* within the IOMMU subsystem itself, so we should be able to trust
|
||||
* ourselves not to misuse the helper.
|
||||
*/
|
||||
return dev->iommu->iommu_dev->ops;
|
||||
}
|
||||
|
||||
#define IOMMU_GROUP_NOTIFY_ADD_DEVICE 1 /* Device added */
|
||||
#define IOMMU_GROUP_NOTIFY_DEL_DEVICE 2 /* Pre Device removed */
|
||||
#define IOMMU_GROUP_NOTIFY_BIND_DRIVER 3 /* Pre Driver bind */
|
||||
|
|
@ -421,14 +425,6 @@ extern int iommu_attach_device(struct iommu_domain *domain,
|
|||
struct device *dev);
|
||||
extern void iommu_detach_device(struct iommu_domain *domain,
|
||||
struct device *dev);
|
||||
extern int iommu_uapi_cache_invalidate(struct iommu_domain *domain,
|
||||
struct device *dev,
|
||||
void __user *uinfo);
|
||||
|
||||
extern int iommu_uapi_sva_bind_gpasid(struct iommu_domain *domain,
|
||||
struct device *dev, void __user *udata);
|
||||
extern int iommu_uapi_sva_unbind_gpasid(struct iommu_domain *domain,
|
||||
struct device *dev, void __user *udata);
|
||||
extern int iommu_sva_unbind_gpasid(struct iommu_domain *domain,
|
||||
struct device *dev, ioasid_t pasid);
|
||||
extern struct iommu_domain *iommu_get_domain_for_dev(struct device *dev);
|
||||
|
|
@ -672,9 +668,6 @@ void iommu_release_device(struct device *dev);
|
|||
int iommu_dev_enable_feature(struct device *dev, enum iommu_dev_features f);
|
||||
int iommu_dev_disable_feature(struct device *dev, enum iommu_dev_features f);
|
||||
bool iommu_dev_feature_enabled(struct device *dev, enum iommu_dev_features f);
|
||||
int iommu_aux_attach_device(struct iommu_domain *domain, struct device *dev);
|
||||
void iommu_aux_detach_device(struct iommu_domain *domain, struct device *dev);
|
||||
int iommu_aux_get_pasid(struct iommu_domain *domain, struct device *dev);
|
||||
|
||||
struct iommu_sva *iommu_sva_bind_device(struct device *dev,
|
||||
struct mm_struct *mm,
|
||||
|
|
@ -1019,23 +1012,6 @@ iommu_dev_disable_feature(struct device *dev, enum iommu_dev_features feat)
|
|||
return -ENODEV;
|
||||
}
|
||||
|
||||
static inline int
|
||||
iommu_aux_attach_device(struct iommu_domain *domain, struct device *dev)
|
||||
{
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
static inline void
|
||||
iommu_aux_detach_device(struct iommu_domain *domain, struct device *dev)
|
||||
{
|
||||
}
|
||||
|
||||
static inline int
|
||||
iommu_aux_get_pasid(struct iommu_domain *domain, struct device *dev)
|
||||
{
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
static inline struct iommu_sva *
|
||||
iommu_sva_bind_device(struct device *dev, struct mm_struct *mm, void *drvdata)
|
||||
{
|
||||
|
|
@ -1051,33 +1027,6 @@ static inline u32 iommu_sva_get_pasid(struct iommu_sva *handle)
|
|||
return IOMMU_PASID_INVALID;
|
||||
}
|
||||
|
||||
static inline int
|
||||
iommu_uapi_cache_invalidate(struct iommu_domain *domain,
|
||||
struct device *dev,
|
||||
struct iommu_cache_invalidate_info *inv_info)
|
||||
{
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
static inline int iommu_uapi_sva_bind_gpasid(struct iommu_domain *domain,
|
||||
struct device *dev, void __user *udata)
|
||||
{
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
static inline int iommu_uapi_sva_unbind_gpasid(struct iommu_domain *domain,
|
||||
struct device *dev, void __user *udata)
|
||||
{
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
static inline int iommu_sva_unbind_gpasid(struct iommu_domain *domain,
|
||||
struct device *dev,
|
||||
ioasid_t pasid)
|
||||
{
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
static inline struct iommu_fwspec *dev_iommu_fwspec_get(struct device *dev)
|
||||
{
|
||||
return NULL;
|
||||
|
|
|
|||
|
|
@ -21,18 +21,8 @@ struct iova {
|
|||
unsigned long pfn_lo; /* Lowest allocated pfn */
|
||||
};
|
||||
|
||||
struct iova_magazine;
|
||||
struct iova_cpu_rcache;
|
||||
|
||||
#define IOVA_RANGE_CACHE_MAX_SIZE 6 /* log of max cached IOVA range size (in pages) */
|
||||
#define MAX_GLOBAL_MAGS 32 /* magazines per bin */
|
||||
|
||||
struct iova_rcache {
|
||||
spinlock_t lock;
|
||||
unsigned long depot_size;
|
||||
struct iova_magazine *depot[MAX_GLOBAL_MAGS];
|
||||
struct iova_cpu_rcache __percpu *cpu_rcaches;
|
||||
};
|
||||
struct iova_rcache;
|
||||
|
||||
/* holds all the iova translations for a domain */
|
||||
struct iova_domain {
|
||||
|
|
@ -46,7 +36,7 @@ struct iova_domain {
|
|||
unsigned long max32_alloc_size; /* Size of last failed allocation */
|
||||
struct iova anchor; /* rbtree lookup anchor */
|
||||
|
||||
struct iova_rcache rcaches[IOVA_RANGE_CACHE_MAX_SIZE]; /* IOVA range caches */
|
||||
struct iova_rcache *rcaches;
|
||||
struct hlist_node cpuhp_dead;
|
||||
};
|
||||
|
||||
|
|
@ -102,6 +92,7 @@ struct iova *reserve_iova(struct iova_domain *iovad, unsigned long pfn_lo,
|
|||
unsigned long pfn_hi);
|
||||
void init_iova_domain(struct iova_domain *iovad, unsigned long granule,
|
||||
unsigned long start_pfn);
|
||||
int iova_domain_init_rcaches(struct iova_domain *iovad);
|
||||
struct iova *find_iova(struct iova_domain *iovad, unsigned long pfn);
|
||||
void put_iova_domain(struct iova_domain *iovad);
|
||||
#else
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue