{net, RDMA}/mlx5: Fix override of log_max_qp by other device
mlx5_core_dev holds pointer to static profile, hence when the
log_max_qp of the profile is override by some device, then it
effect all other mlx5 devices that share the same profile.
Fix it by having a profile instance for every mlx5 device.
Fixes: 883371c453 ("net/mlx5: Check FW limitations on log_max_qp before setting it")
Signed-off-by: Maor Gottlieb <maorg@nvidia.com>
Reviewed-by: Mark Bloch <mbloch@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
This commit is contained in:
parent
c9fd37a945
commit
3410fbcd47
3 changed files with 29 additions and 30 deletions
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@ -703,6 +703,27 @@ struct mlx5_hv_vhca;
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#define MLX5_LOG_SW_ICM_BLOCK_SIZE(dev) (MLX5_CAP_DEV_MEM(dev, log_sw_icm_alloc_granularity))
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#define MLX5_SW_ICM_BLOCK_SIZE(dev) (1 << MLX5_LOG_SW_ICM_BLOCK_SIZE(dev))
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enum {
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MLX5_PROF_MASK_QP_SIZE = (u64)1 << 0,
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MLX5_PROF_MASK_MR_CACHE = (u64)1 << 1,
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};
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enum {
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MR_CACHE_LAST_STD_ENTRY = 20,
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MLX5_IMR_MTT_CACHE_ENTRY,
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MLX5_IMR_KSM_CACHE_ENTRY,
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MAX_MR_CACHE_ENTRIES
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};
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struct mlx5_profile {
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u64 mask;
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u8 log_max_qp;
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struct {
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int size;
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int limit;
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} mr_cache[MAX_MR_CACHE_ENTRIES];
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};
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struct mlx5_core_dev {
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struct device *device;
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enum mlx5_coredev_type coredev_type;
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@ -731,7 +752,7 @@ struct mlx5_core_dev {
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struct mutex intf_state_mutex;
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unsigned long intf_state;
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struct mlx5_priv priv;
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struct mlx5_profile *profile;
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struct mlx5_profile profile;
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u32 issi;
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struct mlx5e_resources mlx5e_res;
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struct mlx5_dm *dm;
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@ -1083,18 +1104,6 @@ static inline u8 mlx5_mkey_variant(u32 mkey)
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return mkey & 0xff;
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}
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enum {
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MLX5_PROF_MASK_QP_SIZE = (u64)1 << 0,
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MLX5_PROF_MASK_MR_CACHE = (u64)1 << 1,
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};
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enum {
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MR_CACHE_LAST_STD_ENTRY = 20,
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MLX5_IMR_MTT_CACHE_ENTRY,
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MLX5_IMR_KSM_CACHE_ENTRY,
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MAX_MR_CACHE_ENTRIES
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};
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/* Async-atomic event notifier used by mlx5 core to forward FW
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* evetns recived from event queue to mlx5 consumers.
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* Optimise event queue dipatching.
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@ -1148,15 +1157,6 @@ int mlx5_rdma_rn_get_params(struct mlx5_core_dev *mdev,
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struct ib_device *device,
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struct rdma_netdev_alloc_params *params);
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struct mlx5_profile {
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u64 mask;
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u8 log_max_qp;
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struct {
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int size;
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int limit;
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} mr_cache[MAX_MR_CACHE_ENTRIES];
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};
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enum {
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MLX5_PCI_DEV_IS_VF = 1 << 0,
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};
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