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Merge tag 'drm-msm-next-2021-06-23b' of https://gitlab.freedesktop.org/drm/msm into drm-next

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* devcoredump support for display errors
* dpu: irq cleanup/refactor
* dpu: dt bindings conversion to yaml
* dsi: dt bindings conversion to yaml
* mdp5: alpha/blend_mode/zpos support
* a6xx: cached coherent buffer support
* a660 support
* gpu iova fault improvements:
   - info about which block triggered the fault, etc
   - generation of gpu devcoredump on fault
* assortment of other cleanups and fixes

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Rob Clark <robdclark@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/CAF6AEGs4=qsGBBbyn-4JWqW4-YUSTKh67X3DsPQ=T2D9aXKqNA@mail.gmail.com
This commit is contained in:
Dave Airlie 2021-06-24 07:15:17 +10:00
commit 334200bf52
133 changed files with 7161 additions and 6232 deletions
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38
include/linux/adreno-smmu-priv.h
View file

@ -8,6 +8,32 @@
#include <linux/io-pgtable.h>
/**
* struct adreno_smmu_fault_info - container for key fault information
*
* @far: The faulting IOVA from ARM_SMMU_CB_FAR
* @ttbr0: The current TTBR0 pagetable from ARM_SMMU_CB_TTBR0
* @contextidr: The value of ARM_SMMU_CB_CONTEXTIDR
* @fsr: The fault status from ARM_SMMU_CB_FSR
* @fsynr0: The value of FSYNR0 from ARM_SMMU_CB_FSYNR0
* @fsynr1: The value of FSYNR1 from ARM_SMMU_CB_FSYNR0
* @cbfrsynra: The value of CBFRSYNRA from ARM_SMMU_GR1_CBFRSYNRA(idx)
*
* This struct passes back key page fault information to the GPU driver
* through the get_fault_info function pointer.
* The GPU driver can use this information to print informative
* log messages and provide deeper GPU specific insight into the fault.
*/
struct adreno_smmu_fault_info {
u64 far;
u64 ttbr0;
u32 contextidr;
u32 fsr;
u32 fsynr0;
u32 fsynr1;
u32 cbfrsynra;
};
/**
* struct adreno_smmu_priv - private interface between adreno-smmu and GPU
*
@ -17,6 +43,13 @@
* @set_ttbr0_cfg: Set the TTBR0 config for the GPUs context bank. A
* NULL config disables TTBR0 translation, otherwise
* TTBR0 translation is enabled with the specified cfg
* @get_fault_info: Called by the GPU fault handler to get information about
* the fault
* @set_stall: Configure whether stall on fault (CFCFG) is enabled. Call
* before set_ttbr0_cfg(). If stalling on fault is enabled,
* the GPU driver must call resume_translation()
* @resume_translation: Resume translation after a fault
*
*
* The GPU driver (drm/msm) and adreno-smmu work together for controlling
* the GPU's SMMU instance. This is by necessity, as the GPU is directly
@ -31,6 +64,9 @@ struct adreno_smmu_priv {
const void *cookie;
const struct io_pgtable_cfg *(*get_ttbr1_cfg)(const void *cookie);
int (*set_ttbr0_cfg)(const void *cookie, const struct io_pgtable_cfg *cfg);
void (*get_fault_info)(const void *cookie, struct adreno_smmu_fault_info *info);
void (*set_stall)(const void *cookie, bool enabled);
void (*resume_translation)(const void *cookie, bool terminate);
};
#endif /* __ADRENO_SMMU_PRIV_H */
#endif /* __ADRENO_SMMU_PRIV_H */