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Merge drm/drm-next into drm-misc-next

Browse source 
Backmerging to get new regmap APIs of v5.19-rc1.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
This commit is contained in:
Thomas Zimmermann 2022-06-20 18:21:25 +02:00
commit 2b1333b808
12469 changed files with 1020421 additions and 244432 deletions
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23
include/uapi/asm-generic/fcntl.h
View file

@ -116,13 +116,13 @@
#define F_GETSIG 11 /* for sockets. */
#endif
#ifndef CONFIG_64BIT
#if __BITS_PER_LONG == 32 || defined(__KERNEL__)
#ifndef F_GETLK64
#define F_GETLK64 12 /* using 'struct flock64' */
#define F_SETLK64 13
#define F_SETLKW64 14
#endif
#endif
#endif /* __BITS_PER_LONG == 32 || defined(__KERNEL__) */
#ifndef F_SETOWN_EX
#define F_SETOWN_EX 15
@ -192,25 +192,19 @@ struct f_owner_ex {
#define F_LINUX_SPECIFIC_BASE 1024
#ifndef HAVE_ARCH_STRUCT_FLOCK
#ifndef __ARCH_FLOCK_PAD
#define __ARCH_FLOCK_PAD
#endif
struct flock {
short l_type;
short l_whence;
__kernel_off_t l_start;
__kernel_off_t l_len;
__kernel_pid_t l_pid;
#ifdef __ARCH_FLOCK_EXTRA_SYSID
__ARCH_FLOCK_EXTRA_SYSID
#endif
#ifdef __ARCH_FLOCK_PAD
__ARCH_FLOCK_PAD
#endif
};
#endif
#ifndef HAVE_ARCH_STRUCT_FLOCK64
#ifndef __ARCH_FLOCK64_PAD
#define __ARCH_FLOCK64_PAD
#endif
struct flock64 {
short l_type;
@ -218,8 +212,9 @@ struct flock64 {
__kernel_loff_t l_start;
__kernel_loff_t l_len;
__kernel_pid_t l_pid;
#ifdef __ARCH_FLOCK64_PAD
__ARCH_FLOCK64_PAD
};
#endif
};
#endif /* _ASM_GENERIC_FCNTL_H */

7
include/uapi/asm-generic/siginfo.h
View file

@ -99,6 +99,7 @@ union __sifields {
struct {
unsigned long _data;
__u32 _type;
__u32 _flags;
} _perf;
};
} _sigfault;
@ -164,6 +165,7 @@ typedef struct siginfo {
#define si_pkey _sifields._sigfault._addr_pkey._pkey
#define si_perf_data _sifields._sigfault._perf._data
#define si_perf_type _sifields._sigfault._perf._type
#define si_perf_flags _sifields._sigfault._perf._flags
#define si_band _sifields._sigpoll._band
#define si_fd _sifields._sigpoll._fd
#define si_call_addr _sifields._sigsys._call_addr
@ -270,6 +272,11 @@ typedef struct siginfo {
* that are of the form: ((PTRACE_EVENT_XXX << 8) | SIGTRAP)
*/
/*
* Flags for si_perf_flags if SIGTRAP si_code is TRAP_PERF.
*/
#define TRAP_PERF_FLAG_ASYNC (1u << 0)
/*
* SIGCHLD si_codes
*/

2
include/uapi/asm-generic/socket.h
View file

@ -130,6 +130,8 @@
#define SO_TXREHASH 74
#define SO_RCVMARK 75
#if !defined(__KERNEL__)
#if __BITS_PER_LONG == 64 || (defined(__x86_64__) && defined(__ILP32__))

65
include/uapi/asm-generic/termbits-common.h Normal file
View file

@ -0,0 +1,65 @@
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
#ifndef __ASM_GENERIC_TERMBITS_COMMON_H
#define __ASM_GENERIC_TERMBITS_COMMON_H
typedef unsigned char cc_t;
typedef unsigned int speed_t;
/* c_iflag bits */
#define IGNBRK 0x001 /* Ignore break condition */
#define BRKINT 0x002 /* Signal interrupt on break */
#define IGNPAR 0x004 /* Ignore characters with parity errors */
#define PARMRK 0x008 /* Mark parity and framing errors */
#define INPCK 0x010 /* Enable input parity check */
#define ISTRIP 0x020 /* Strip 8th bit off characters */
#define INLCR 0x040 /* Map NL to CR on input */
#define IGNCR 0x080 /* Ignore CR */
#define ICRNL 0x100 /* Map CR to NL on input */
#define IXANY 0x800 /* Any character will restart after stop */
/* c_oflag bits */
#define OPOST 0x01 /* Perform output processing */
#define OCRNL 0x08
#define ONOCR 0x10
#define ONLRET 0x20
#define OFILL 0x40
#define OFDEL 0x80
/* c_cflag bit meaning */
/* Common CBAUD rates */
#define B0 0x00000000 /* hang up */
#define B50 0x00000001
#define B75 0x00000002
#define B110 0x00000003
#define B134 0x00000004
#define B150 0x00000005
#define B200 0x00000006
#define B300 0x00000007
#define B600 0x00000008
#define B1200 0x00000009
#define B1800 0x0000000a
#define B2400 0x0000000b
#define B4800 0x0000000c
#define B9600 0x0000000d
#define B19200 0x0000000e
#define B38400 0x0000000f
#define EXTA B19200
#define EXTB B38400
#define CMSPAR 0x40000000 /* mark or space (stick) parity */
#define CRTSCTS 0x80000000 /* flow control */
#define IBSHIFT 16 /* Shift from CBAUD to CIBAUD */
/* tcflow() ACTION argument and TCXONC use these */
#define TCOOFF 0 /* Suspend output */
#define TCOON 1 /* Restart suspended output */
#define TCIOFF 2 /* Send a STOP character */
#define TCION 3 /* Send a START character */
/* tcflush() QUEUE_SELECTOR argument and TCFLSH use these */
#define TCIFLUSH 0 /* Discard data received but not yet read */
#define TCOFLUSH 1 /* Discard data written but not yet sent */
#define TCIOFLUSH 2 /* Discard all pending data */
#endif /* __ASM_GENERIC_TERMBITS_COMMON_H */

239
include/uapi/asm-generic/termbits.h
View file

@ -2,10 +2,8 @@
#ifndef __ASM_GENERIC_TERMBITS_H
#define __ASM_GENERIC_TERMBITS_H
#include <linux/posix_types.h>
#include <asm-generic/termbits-common.h>
typedef unsigned char cc_t;
typedef unsigned int speed_t;
typedef unsigned int tcflag_t;
#define NCCS 19
@ -41,156 +39,107 @@ struct ktermios {
};
/* c_cc characters */
#define VINTR 0
#define VQUIT 1
#define VERASE 2
#define VKILL 3
#define VEOF 4
#define VTIME 5
#define VMIN 6
#define VSWTC 7
#define VSTART 8
#define VSTOP 9
#define VSUSP 10
#define VEOL 11
#define VREPRINT 12
#define VDISCARD 13
#define VWERASE 14
#define VLNEXT 15
#define VEOL2 16
#define VINTR 0
#define VQUIT 1
#define VERASE 2
#define VKILL 3
#define VEOF 4
#define VTIME 5
#define VMIN 6
#define VSWTC 7
#define VSTART 8
#define VSTOP 9
#define VSUSP 10
#define VEOL 11
#define VREPRINT 12
#define VDISCARD 13
#define VWERASE 14
#define VLNEXT 15
#define VEOL2 16
/* c_iflag bits */
#define IGNBRK 0000001
#define BRKINT 0000002
#define IGNPAR 0000004
#define PARMRK 0000010
#define INPCK 0000020
#define ISTRIP 0000040
#define INLCR 0000100
#define IGNCR 0000200
#define ICRNL 0000400
#define IUCLC 0001000
#define IXON 0002000
#define IXANY 0004000
#define IXOFF 0010000
#define IMAXBEL 0020000
#define IUTF8 0040000
#define IUCLC 0x0200
#define IXON 0x0400
#define IXOFF 0x1000
#define IMAXBEL 0x2000
#define IUTF8 0x4000
/* c_oflag bits */
#define OPOST 0000001
#define OLCUC 0000002
#define ONLCR 0000004
#define OCRNL 0000010
#define ONOCR 0000020
#define ONLRET 0000040
#define OFILL 0000100
#define OFDEL 0000200
#define NLDLY 0000400
#define NL0 0000000
#define NL1 0000400
#define CRDLY 0003000
#define CR0 0000000
#define CR1 0001000
#define CR2 0002000
#define CR3 0003000
#define TABDLY 0014000
#define TAB0 0000000
#define TAB1 0004000
#define TAB2 0010000
#define TAB3 0014000
#define XTABS 0014000
#define BSDLY 0020000
#define BS0 0000000
#define BS1 0020000
#define VTDLY 0040000
#define VT0 0000000
#define VT1 0040000
#define FFDLY 0100000
#define FF0 0000000
#define FF1 0100000
#define OLCUC 0x00002
#define ONLCR 0x00004
#define NLDLY 0x00100
#define NL0 0x00000
#define NL1 0x00100
#define CRDLY 0x00600
#define CR0 0x00000
#define CR1 0x00200
#define CR2 0x00400
#define CR3 0x00600
#define TABDLY 0x01800
#define TAB0 0x00000
#define TAB1 0x00800
#define TAB2 0x01000
#define TAB3 0x01800
#define XTABS 0x01800
#define BSDLY 0x02000
#define BS0 0x00000
#define BS1 0x02000
#define VTDLY 0x04000
#define VT0 0x00000
#define VT1 0x04000
#define FFDLY 0x08000
#define FF0 0x00000
#define FF1 0x08000
/* c_cflag bit meaning */
#define CBAUD 0010017
#define B0 0000000 /* hang up */
#define B50 0000001
#define B75 0000002
#define B110 0000003
#define B134 0000004
#define B150 0000005
#define B200 0000006
#define B300 0000007
#define B600 0000010
#define B1200 0000011
#define B1800 0000012
#define B2400 0000013
#define B4800 0000014
#define B9600 0000015
#define B19200 0000016
#define B38400 0000017
#define EXTA B19200
#define EXTB B38400
#define CSIZE 0000060
#define CS5 0000000
#define CS6 0000020
#define CS7 0000040
#define CS8 0000060
#define CSTOPB 0000100
#define CREAD 0000200
#define PARENB 0000400
#define PARODD 0001000
#define HUPCL 0002000
#define CLOCAL 0004000
#define CBAUDEX 0010000
#define BOTHER 0010000
#define B57600 0010001
#define B115200 0010002
#define B230400 0010003
#define B460800 0010004
#define B500000 0010005
#define B576000 0010006
#define B921600 0010007
#define B1000000 0010010
#define B1152000 0010011
#define B1500000 0010012
#define B2000000 0010013
#define B2500000 0010014
#define B3000000 0010015
#define B3500000 0010016
#define B4000000 0010017
#define CIBAUD 002003600000 /* input baud rate */
#define CMSPAR 010000000000 /* mark or space (stick) parity */
#define CRTSCTS 020000000000 /* flow control */
#define IBSHIFT 16 /* Shift from CBAUD to CIBAUD */
#define CBAUD 0x0000100f
#define CSIZE 0x00000030
#define CS5 0x00000000
#define CS6 0x00000010
#define CS7 0x00000020
#define CS8 0x00000030
#define CSTOPB 0x00000040
#define CREAD 0x00000080
#define PARENB 0x00000100
#define PARODD 0x00000200
#define HUPCL 0x00000400
#define CLOCAL 0x00000800
#define CBAUDEX 0x00001000
#define BOTHER 0x00001000
#define B57600 0x00001001
#define B115200 0x00001002
#define B230400 0x00001003
#define B460800 0x00001004
#define B500000 0x00001005
#define B576000 0x00001006
#define B921600 0x00001007
#define B1000000 0x00001008
#define B1152000 0x00001009
#define B1500000 0x0000100a
#define B2000000 0x0000100b
#define B2500000 0x0000100c
#define B3000000 0x0000100d
#define B3500000 0x0000100e
#define B4000000 0x0000100f
#define CIBAUD 0x100f0000 /* input baud rate */
/* c_lflag bits */
#define ISIG 0000001
#define ICANON 0000002
#define XCASE 0000004
#define ECHO 0000010
#define ECHOE 0000020
#define ECHOK 0000040
#define ECHONL 0000100
#define NOFLSH 0000200
#define TOSTOP 0000400
#define ECHOCTL 0001000
#define ECHOPRT 0002000
#define ECHOKE 0004000
#define FLUSHO 0010000
#define PENDIN 0040000
#define IEXTEN 0100000
#define EXTPROC 0200000
/* tcflow() and TCXONC use these */
#define TCOOFF 0
#define TCOON 1
#define TCIOFF 2
#define TCION 3
/* tcflush() and TCFLSH use these */
#define TCIFLUSH 0
#define TCOFLUSH 1
#define TCIOFLUSH 2
#define ISIG 0x00001
#define ICANON 0x00002
#define XCASE 0x00004
#define ECHO 0x00008
#define ECHOE 0x00010
#define ECHOK 0x00020
#define ECHONL 0x00040
#define NOFLSH 0x00080
#define TOSTOP 0x00100
#define ECHOCTL 0x00200
#define ECHOPRT 0x00400
#define ECHOKE 0x00800
#define FLUSHO 0x01000
#define PENDIN 0x04000
#define IEXTEN 0x08000
#define EXTPROC 0x10000
/* tcsetattr uses these */
#define TCSANOW 0

4
include/uapi/asm-generic/unistd.h
View file

@ -383,7 +383,7 @@ __SYSCALL(__NR_syslog, sys_syslog)
/* kernel/ptrace.c */
#define __NR_ptrace 117
__SYSCALL(__NR_ptrace, sys_ptrace)
__SC_COMP(__NR_ptrace, sys_ptrace, compat_sys_ptrace)
/* kernel/sched/core.c */
#define __NR_sched_setparam 118
@ -779,7 +779,7 @@ __SYSCALL(__NR_rseq, sys_rseq)
#define __NR_kexec_file_load 294
__SYSCALL(__NR_kexec_file_load, sys_kexec_file_load)
/* 295 through 402 are unassigned to sync up with generic numbers, don't use */
#if __BITS_PER_LONG == 32
#if defined(__SYSCALL_COMPAT) || __BITS_PER_LONG == 32
#define __NR_clock_gettime64 403
__SYSCALL(__NR_clock_gettime64, sys_clock_gettime)
#define __NR_clock_settime64 404

10
include/uapi/drm/amdgpu_drm.h
View file

@ -140,6 +140,10 @@ extern "C" {
* not require GTT memory accounting
*/
#define AMDGPU_GEM_CREATE_PREEMPTIBLE (1 << 11)
/* Flag that BO can be discarded under memory pressure without keeping the
* content.
*/
#define AMDGPU_GEM_CREATE_DISCARDABLE (1 << 12)
struct drm_amdgpu_gem_create_in {
/** the requested memory size */
@ -529,6 +533,8 @@ struct drm_amdgpu_gem_op {
#define AMDGPU_VM_MTYPE_UC (4 << 5)
/* Use Read Write MTYPE instead of default MTYPE */
#define AMDGPU_VM_MTYPE_RW (5 << 5)
/* don't allocate MALL */
#define AMDGPU_VM_PAGE_NOALLOC (1 << 9)
struct drm_amdgpu_gem_va {
/** GEM object handle */
@ -988,6 +994,8 @@ struct drm_amdgpu_info_vbios {
#define AMDGPU_VRAM_TYPE_DDR4 8
#define AMDGPU_VRAM_TYPE_GDDR6 9
#define AMDGPU_VRAM_TYPE_DDR5 10
#define AMDGPU_VRAM_TYPE_LPDDR4 11
#define AMDGPU_VRAM_TYPE_LPDDR5 12
struct drm_amdgpu_info_device {
/** PCI Device ID */
@ -1150,7 +1158,9 @@ struct drm_amdgpu_info_video_caps {
#define AMDGPU_FAMILY_RV 142 /* Raven */
#define AMDGPU_FAMILY_NV 143 /* Navi10 */
#define AMDGPU_FAMILY_VGH 144 /* Van Gogh */
#define AMDGPU_FAMILY_GC_11_0_0 145 /* GC 11.0.0 */
#define AMDGPU_FAMILY_YC 146 /* Yellow Carp */
#define AMDGPU_FAMILY_GC_11_0_1 148 /* GC 11.0.1 */
#define AMDGPU_FAMILY_GC_10_3_6 149 /* GC 10.3.6 */
#define AMDGPU_FAMILY_GC_10_3_7 151 /* GC 10.3.7 */

22
include/uapi/drm/drm_fourcc.h
View file

@ -656,6 +656,28 @@ extern "C" {
*/
#define DRM_FORMAT_MOD_QCOM_COMPRESSED fourcc_mod_code(QCOM, 1)
/*
* Qualcomm Tiled Format
*
* Similar to DRM_FORMAT_MOD_QCOM_COMPRESSED but not compressed.
* Implementation may be platform and base-format specific.
*
* Each macrotile consists of m x n (mostly 4 x 4) tiles.
* Pixel data pitch/stride is aligned with macrotile width.
* Pixel data height is aligned with macrotile height.
* Entire pixel data buffer is aligned with 4k(bytes).
*/
#define DRM_FORMAT_MOD_QCOM_TILED3 fourcc_mod_code(QCOM, 3)
/*
* Qualcomm Alternate Tiled Format
*
* Alternate tiled format typically only used within GMEM.
* Implementation may be platform and base-format specific.
*/
#define DRM_FORMAT_MOD_QCOM_TILED2 fourcc_mod_code(QCOM, 2)
/* Vivante framebuffer modifiers */
/*

62
include/uapi/drm/i915_drm.h
View file

@ -154,21 +154,71 @@ enum i915_mocs_table_index {
I915_MOCS_CACHED,
};
/*
/**
* enum drm_i915_gem_engine_class - uapi engine type enumeration
*
* Different engines serve different roles, and there may be more than one
* engine serving each role. enum drm_i915_gem_engine_class provides a
* classification of the role of the engine, which may be used when requesting
* operations to be performed on a certain subset of engines, or for providing
* information about that group.
* engine serving each role. This enum provides a classification of the role
* of the engine, which may be used when requesting operations to be performed
* on a certain subset of engines, or for providing information about that
* group.
*/
enum drm_i915_gem_engine_class {
/**
* @I915_ENGINE_CLASS_RENDER:
*
* Render engines support instructions used for 3D, Compute (GPGPU),
* and programmable media workloads. These instructions fetch data and
* dispatch individual work items to threads that operate in parallel.
* The threads run small programs (called "kernels" or "shaders") on
* the GPU's execution units (EUs).
*/
I915_ENGINE_CLASS_RENDER = 0,
/**
* @I915_ENGINE_CLASS_COPY:
*
* Copy engines (also referred to as "blitters") support instructions
* that move blocks of data from one location in memory to another,
* or that fill a specified location of memory with fixed data.
* Copy engines can perform pre-defined logical or bitwise operations
* on the source, destination, or pattern data.
*/
I915_ENGINE_CLASS_COPY = 1,
/**
* @I915_ENGINE_CLASS_VIDEO:
*
* Video engines (also referred to as "bit stream decode" (BSD) or
* "vdbox") support instructions that perform fixed-function media
* decode and encode.
*/
I915_ENGINE_CLASS_VIDEO = 2,
/**
* @I915_ENGINE_CLASS_VIDEO_ENHANCE:
*
* Video enhancement engines (also referred to as "vebox") support
* instructions related to image enhancement.
*/
I915_ENGINE_CLASS_VIDEO_ENHANCE = 3,
/* should be kept compact */
/**
* @I915_ENGINE_CLASS_COMPUTE:
*
* Compute engines support a subset of the instructions available
* on render engines: compute engines support Compute (GPGPU) and
* programmable media workloads, but do not support the 3D pipeline.
*/
I915_ENGINE_CLASS_COMPUTE = 4,
/* Values in this enum should be kept compact. */
/**
* @I915_ENGINE_CLASS_INVALID:
*
* Placeholder value to represent an invalid engine class assignment.
*/
I915_ENGINE_CLASS_INVALID = -1
};

7
include/uapi/drm/msm_drm.h
View file

@ -82,6 +82,10 @@ struct drm_msm_timespec {
#define MSM_PARAM_FAULTS 0x09 /* RO */
#define MSM_PARAM_SUSPENDS 0x0a /* RO */
#define MSM_PARAM_SYSPROF 0x0b /* WO: 1 preserves perfcntrs, 2 also disables suspend */
#define MSM_PARAM_COMM 0x0c /* WO: override for task->comm */
#define MSM_PARAM_CMDLINE 0x0d /* WO: override for task cmdline */
#define MSM_PARAM_VA_START 0x0e /* RO: start of valid GPU iova range */
#define MSM_PARAM_VA_SIZE 0x0f /* RO: size of valid GPU iova range (bytes) */
/* For backwards compat. The original support for preemption was based on
* a single ring per priority level so # of priority levels equals the #
@ -95,6 +99,8 @@ struct drm_msm_param {
__u32 pipe; /* in, MSM_PIPE_x */
__u32 param; /* in, MSM_PARAM_x */
__u64 value; /* out (get_param) or in (set_param) */
__u32 len; /* zero for non-pointer params */
__u32 pad; /* must be zero */
};
/*
@ -131,6 +137,7 @@ struct drm_msm_gem_new {
#define MSM_INFO_GET_IOVA 0x01 /* get iova, returned by value */
#define MSM_INFO_SET_NAME 0x02 /* set the debug name (by pointer) */
#define MSM_INFO_GET_NAME 0x03 /* get debug name, returned by pointer */
#define MSM_INFO_SET_IOVA 0x04 /* set the iova, passed by value */
struct drm_msm_gem_info {
__u32 handle; /* in */

3
include/uapi/linux/acct.h
View file

@ -103,12 +103,13 @@ struct acct_v3
/*
* accounting flags
*/
/* bit set when the process ... */
/* bit set when the process/task ... */
#define AFORK 0x01 /* ... executed fork, but did not exec */
#define ASU 0x02 /* ... used super-user privileges */
#define ACOMPAT 0x04 /* ... used compatibility mode (VAX only not used) */
#define ACORE 0x08 /* ... dumped core */
#define AXSIG 0x10 /* ... was killed by a signal */
#define AGROUP 0x20 /* ... was the last task of the process (task group) */
#if defined(__BYTE_ORDER) ? __BYTE_ORDER == __BIG_ENDIAN : defined(__BIG_ENDIAN)
#define ACCT_BYTEORDER 0x80 /* accounting file is big endian */

9
include/uapi/linux/agpgart.h
View file

@ -52,7 +52,6 @@
#ifndef __KERNEL__
#include <linux/types.h>
#include <stdlib.h>
struct agp_version {
__u16 major;
@ -64,10 +63,10 @@ typedef struct _agp_info {
__u32 bridge_id; /* bridge vendor/device */
__u32 agp_mode; /* mode info of bridge */
unsigned long aper_base;/* base of aperture */
size_t aper_size; /* size of aperture */
size_t pg_total; /* max pages (swap + system) */
size_t pg_system; /* max pages (system) */
size_t pg_used; /* current pages used */
__kernel_size_t aper_size; /* size of aperture */
__kernel_size_t pg_total; /* max pages (swap + system) */
__kernel_size_t pg_system; /* max pages (system) */
__kernel_size_t pg_used; /* current pages used */
} agp_info;
typedef struct _agp_setup {

18
include/uapi/linux/android/binder.h
View file

@ -236,6 +236,21 @@ struct binder_frozen_status_info {
__u32 async_recv;
};
/* struct binder_extened_error - extended error information
* @id: identifier for the failed operation
* @command: command as defined by binder_driver_return_protocol
* @param: parameter holding a negative errno value
*
* Used with BINDER_GET_EXTENDED_ERROR. This extends the error information
* returned by the driver upon a failed operation. Userspace can pull this
* data to properly handle specific error scenarios.
*/
struct binder_extended_error {
__u32 id;
__u32 command;
__s32 param;
};
#define BINDER_WRITE_READ _IOWR('b', 1, struct binder_write_read)
#define BINDER_SET_IDLE_TIMEOUT _IOW('b', 3, __s64)
#define BINDER_SET_MAX_THREADS _IOW('b', 5, __u32)
@ -249,6 +264,7 @@ struct binder_frozen_status_info {
#define BINDER_FREEZE _IOW('b', 14, struct binder_freeze_info)
#define BINDER_GET_FROZEN_INFO _IOWR('b', 15, struct binder_frozen_status_info)
#define BINDER_ENABLE_ONEWAY_SPAM_DETECTION _IOW('b', 16, __u32)
#define BINDER_GET_EXTENDED_ERROR _IOWR('b', 17, struct binder_extended_error)
/*
* NOTE: Two special error codes you should check for when calling
@ -289,7 +305,7 @@ struct binder_transaction_data {
/* General information about the transaction. */
__u32 flags;
__kernel_pid_t sender_pid;
__kernel_uid_t sender_euid;
__kernel_uid32_t sender_euid;
binder_size_t data_size; /* number of bytes of data */
binder_size_t offsets_size; /* number of bytes of offsets */

47
include/uapi/linux/atm_zatm.h
View file

@ -1,47 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
/* atm_zatm.h - Driver-specific declarations of the ZATM driver (for use by
driver-specific utilities) */
/* Written 1995-1999 by Werner Almesberger, EPFL LRC/ICA */
#ifndef LINUX_ATM_ZATM_H
#define LINUX_ATM_ZATM_H
/*
* Note: non-kernel programs including this file must also include
* sys/types.h for struct timeval
*/
#include <linux/atmapi.h>
#include <linux/atmioc.h>
#define ZATM_GETPOOL _IOW('a',ATMIOC_SARPRV+1,struct atmif_sioc)
/* get pool statistics */
#define ZATM_GETPOOLZ _IOW('a',ATMIOC_SARPRV+2,struct atmif_sioc)
/* get statistics and zero */
#define ZATM_SETPOOL _IOW('a',ATMIOC_SARPRV+3,struct atmif_sioc)
/* set pool parameters */
struct zatm_pool_info {
int ref_count; /* free buffer pool usage counters */
int low_water,high_water; /* refill parameters */
int rqa_count,rqu_count; /* queue condition counters */
int offset,next_off; /* alignment optimizations: offset */
int next_cnt,next_thres; /* repetition counter and threshold */
};
struct zatm_pool_req {
int pool_num; /* pool number */
struct zatm_pool_info info; /* actual information */
};
#define ZATM_OAM_POOL 0 /* free buffer pool for OAM cells */
#define ZATM_AAL0_POOL 1 /* free buffer pool for AAL0 cells */
#define ZATM_AAL5_POOL_BASE 2 /* first AAL5 free buffer pool */
#define ZATM_LAST_POOL ZATM_AAL5_POOL_BASE+10 /* max. 64 kB */
#define ZATM_TIMER_HISTORY_SIZE 16 /* number of timer adjustments to
record; must be 2^n */
#endif

2
include/uapi/linux/audit.h
View file

@ -439,6 +439,8 @@ enum {
#define AUDIT_ARCH_UNICORE (EM_UNICORE|__AUDIT_ARCH_LE)
#define AUDIT_ARCH_X86_64 (EM_X86_64|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE)
#define AUDIT_ARCH_XTENSA (EM_XTENSA)
#define AUDIT_ARCH_LOONGARCH32 (EM_LOONGARCH|__AUDIT_ARCH_LE)
#define AUDIT_ARCH_LOONGARCH64 (EM_LOONGARCH|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE)
#define AUDIT_PERM_EXEC 1
#define AUDIT_PERM_WRITE 2

125
include/uapi/linux/bpf.h
View file

@ -1013,6 +1013,7 @@ enum bpf_link_type {
BPF_LINK_TYPE_XDP = 6,
BPF_LINK_TYPE_PERF_EVENT = 7,
BPF_LINK_TYPE_KPROBE_MULTI = 8,
BPF_LINK_TYPE_STRUCT_OPS = 9,
MAX_BPF_LINK_TYPE,
};
@ -1489,6 +1490,15 @@ union bpf_attr {
__aligned_u64 addrs;
__aligned_u64 cookies;
} kprobe_multi;
struct {
/* this is overlaid with the target_btf_id above. */
__u32 target_btf_id;
/* black box user-provided value passed through
* to BPF program at the execution time and
* accessible through bpf_get_attach_cookie() BPF helper
*/
__u64 cookie;
} tracing;
};
} link_create;
@ -5143,6 +5153,102 @@ union bpf_attr {
* The **hash_algo** is returned on success,
* **-EOPNOTSUP** if the hash calculation failed or **-EINVAL** if
* invalid arguments are passed.
*
* void *bpf_kptr_xchg(void *map_value, void *ptr)
* Description
* Exchange kptr at pointer *map_value* with *ptr*, and return the
* old value. *ptr* can be NULL, otherwise it must be a referenced
* pointer which will be released when this helper is called.
* Return
* The old value of kptr (which can be NULL). The returned pointer
* if not NULL, is a reference which must be released using its
* corresponding release function, or moved into a BPF map before
* program exit.
*
* void *bpf_map_lookup_percpu_elem(struct bpf_map *map, const void *key, u32 cpu)
* Description
* Perform a lookup in *percpu map* for an entry associated to
* *key* on *cpu*.
* Return
* Map value associated to *key* on *cpu*, or **NULL** if no entry
* was found or *cpu* is invalid.
*
* struct mptcp_sock *bpf_skc_to_mptcp_sock(void *sk)
* Description
* Dynamically cast a *sk* pointer to a *mptcp_sock* pointer.
* Return
* *sk* if casting is valid, or **NULL** otherwise.
*
* long bpf_dynptr_from_mem(void *data, u32 size, u64 flags, struct bpf_dynptr *ptr)
* Description
* Get a dynptr to local memory *data*.
*
* *data* must be a ptr to a map value.
* The maximum *size* supported is DYNPTR_MAX_SIZE.
* *flags* is currently unused.
* Return
* 0 on success, -E2BIG if the size exceeds DYNPTR_MAX_SIZE,
* -EINVAL if flags is not 0.
*
* long bpf_ringbuf_reserve_dynptr(void *ringbuf, u32 size, u64 flags, struct bpf_dynptr *ptr)
* Description
* Reserve *size* bytes of payload in a ring buffer *ringbuf*
* through the dynptr interface. *flags* must be 0.
*
* Please note that a corresponding bpf_ringbuf_submit_dynptr or
* bpf_ringbuf_discard_dynptr must be called on *ptr*, even if the
* reservation fails. This is enforced by the verifier.
* Return
* 0 on success, or a negative error in case of failure.
*
* void bpf_ringbuf_submit_dynptr(struct bpf_dynptr *ptr, u64 flags)
* Description
* Submit reserved ring buffer sample, pointed to by *data*,
* through the dynptr interface. This is a no-op if the dynptr is
* invalid/null.
*
* For more information on *flags*, please see
* 'bpf_ringbuf_submit'.
* Return
* Nothing. Always succeeds.
*
* void bpf_ringbuf_discard_dynptr(struct bpf_dynptr *ptr, u64 flags)
* Description
* Discard reserved ring buffer sample through the dynptr
* interface. This is a no-op if the dynptr is invalid/null.
*
* For more information on *flags*, please see
* 'bpf_ringbuf_discard'.
* Return
* Nothing. Always succeeds.
*
* long bpf_dynptr_read(void *dst, u32 len, struct bpf_dynptr *src, u32 offset)
* Description
* Read *len* bytes from *src* into *dst*, starting from *offset*
* into *src*.
* Return
* 0 on success, -E2BIG if *offset* + *len* exceeds the length
* of *src*'s data, -EINVAL if *src* is an invalid dynptr.
*
* long bpf_dynptr_write(struct bpf_dynptr *dst, u32 offset, void *src, u32 len)
* Description
* Write *len* bytes from *src* into *dst*, starting from *offset*
* into *dst*.
* Return
* 0 on success, -E2BIG if *offset* + *len* exceeds the length
* of *dst*'s data, -EINVAL if *dst* is an invalid dynptr or if *dst*
* is a read-only dynptr.
*
* void *bpf_dynptr_data(struct bpf_dynptr *ptr, u32 offset, u32 len)
* Description
* Get a pointer to the underlying dynptr data.
*
* *len* must be a statically known value. The returned data slice
* is invalidated whenever the dynptr is invalidated.
* Return
* Pointer to the underlying dynptr data, NULL if the dynptr is
* read-only, if the dynptr is invalid, or if the offset and length
* is out of bounds.
*/
#define __BPF_FUNC_MAPPER(FN) \
FN(unspec), \
@ -5339,6 +5445,16 @@ union bpf_attr {
FN(copy_from_user_task), \
FN(skb_set_tstamp), \
FN(ima_file_hash), \
FN(kptr_xchg), \
FN(map_lookup_percpu_elem), \
FN(skc_to_mptcp_sock), \
FN(dynptr_from_mem), \
FN(ringbuf_reserve_dynptr), \
FN(ringbuf_submit_dynptr), \
FN(ringbuf_discard_dynptr), \
FN(dynptr_read), \
FN(dynptr_write), \
FN(dynptr_data), \
/* */
/* integer value in 'imm' field of BPF_CALL instruction selects which helper
@ -5592,6 +5708,10 @@ struct bpf_tunnel_key {
__u8 tunnel_ttl;
__u16 tunnel_ext; /* Padding, future use. */
__u32 tunnel_label;
union {
__u32 local_ipv4;
__u32 local_ipv6[4];
};
};
/* user accessible mirror of in-kernel xfrm_state.
@ -6486,6 +6606,11 @@ struct bpf_timer {
__u64 :64;
} __attribute__((aligned(8)));
struct bpf_dynptr {
__u64 :64;
__u64 :64;
} __attribute__((aligned(8)));
struct bpf_sysctl {
__u32 write; /* Sysctl is being read (= 0) or written (= 1).
* Allows 1,2,4-byte read, but no write.

4
include/uapi/linux/btf.h
View file

@ -33,8 +33,8 @@ struct btf_type {
/* "info" bits arrangement
* bits 0-15: vlen (e.g. # of struct's members)
* bits 16-23: unused
* bits 24-27: kind (e.g. int, ptr, array...etc)
* bits 28-30: unused
* bits 24-28: kind (e.g. int, ptr, array...etc)
* bits 29-30: unused
* bit 31: kind_flag, currently used by
* struct, union and fwd
*/

13
include/uapi/linux/btrfs_tree.h
View file

@ -880,19 +880,6 @@ struct btrfs_dev_replace_item {
#define BTRFS_BLOCK_GROUP_RESERVED (BTRFS_AVAIL_ALLOC_BIT_SINGLE | \
BTRFS_SPACE_INFO_GLOBAL_RSV)
enum btrfs_raid_types {
BTRFS_RAID_RAID10,
BTRFS_RAID_RAID1,
BTRFS_RAID_DUP,
BTRFS_RAID_RAID0,
BTRFS_RAID_SINGLE,
BTRFS_RAID_RAID5,
BTRFS_RAID_RAID6,
BTRFS_RAID_RAID1C3,
BTRFS_RAID_RAID1C4,
BTRFS_NR_RAID_TYPES
};
#define BTRFS_BLOCK_GROUP_TYPE_MASK (BTRFS_BLOCK_GROUP_DATA | \
BTRFS_BLOCK_GROUP_SYSTEM | \
BTRFS_BLOCK_GROUP_METADATA)

68
include/uapi/linux/cachefiles.h Normal file
View file

@ -0,0 +1,68 @@
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
#ifndef _LINUX_CACHEFILES_H
#define _LINUX_CACHEFILES_H
#include <linux/types.h>
#include <linux/ioctl.h>
/*
* Fscache ensures that the maximum length of cookie key is 255. The volume key
* is controlled by netfs, and generally no bigger than 255.
*/
#define CACHEFILES_MSG_MAX_SIZE 1024
enum cachefiles_opcode {
CACHEFILES_OP_OPEN,
CACHEFILES_OP_CLOSE,
CACHEFILES_OP_READ,
};
/*
* Message Header
*
* @msg_id a unique ID identifying this message
* @opcode message type, CACHEFILE_OP_*
* @len message length, including message header and following data
* @object_id a unique ID identifying a cache file
* @data message type specific payload
*/
struct cachefiles_msg {
__u32 msg_id;
__u32 opcode;
__u32 len;
__u32 object_id;
__u8 data[];
};
/*
* @data contains the volume_key followed directly by the cookie_key. volume_key
* is a NUL-terminated string; @volume_key_size indicates the size of the volume
* key in bytes. cookie_key is binary data, which is netfs specific;
* @cookie_key_size indicates the size of the cookie key in bytes.
*
* @fd identifies an anon_fd referring to the cache file.
*/
struct cachefiles_open {
__u32 volume_key_size;
__u32 cookie_key_size;
__u32 fd;
__u32 flags;
__u8 data[];
};
/*
* @off indicates the starting offset of the requested file range
* @len indicates the length of the requested file range
*/
struct cachefiles_read {
__u64 off;
__u64 len;
};
/*
* Reply for READ request
* @arg for this ioctl is the @id field of READ request.
*/
#define CACHEFILES_IOC_READ_COMPLETE _IOW(0x98, 1, int)
#endif

25
include/uapi/linux/can/isotp.h
View file

@ -124,18 +124,19 @@ struct can_isotp_ll_options {
/* flags for isotp behaviour */
#define CAN_ISOTP_LISTEN_MODE 0x001 /* listen only (do not send FC) */
#define CAN_ISOTP_EXTEND_ADDR 0x002 /* enable extended addressing */
#define CAN_ISOTP_TX_PADDING 0x004 /* enable CAN frame padding tx path */
#define CAN_ISOTP_RX_PADDING 0x008 /* enable CAN frame padding rx path */
#define CAN_ISOTP_CHK_PAD_LEN 0x010 /* check received CAN frame padding */
#define CAN_ISOTP_CHK_PAD_DATA 0x020 /* check received CAN frame padding */
#define CAN_ISOTP_HALF_DUPLEX 0x040 /* half duplex error state handling */
#define CAN_ISOTP_FORCE_TXSTMIN 0x080 /* ignore stmin from received FC */
#define CAN_ISOTP_FORCE_RXSTMIN 0x100 /* ignore CFs depending on rx stmin */
#define CAN_ISOTP_RX_EXT_ADDR 0x200 /* different rx extended addressing */
#define CAN_ISOTP_WAIT_TX_DONE 0x400 /* wait for tx completion */
#define CAN_ISOTP_SF_BROADCAST 0x800 /* 1-to-N functional addressing */
#define CAN_ISOTP_LISTEN_MODE 0x0001 /* listen only (do not send FC) */
#define CAN_ISOTP_EXTEND_ADDR 0x0002 /* enable extended addressing */
#define CAN_ISOTP_TX_PADDING 0x0004 /* enable CAN frame padding tx path */
#define CAN_ISOTP_RX_PADDING 0x0008 /* enable CAN frame padding rx path */
#define CAN_ISOTP_CHK_PAD_LEN 0x0010 /* check received CAN frame padding */
#define CAN_ISOTP_CHK_PAD_DATA 0x0020 /* check received CAN frame padding */
#define CAN_ISOTP_HALF_DUPLEX 0x0040 /* half duplex error state handling */
#define CAN_ISOTP_FORCE_TXSTMIN 0x0080 /* ignore stmin from received FC */
#define CAN_ISOTP_FORCE_RXSTMIN 0x0100 /* ignore CFs depending on rx stmin */
#define CAN_ISOTP_RX_EXT_ADDR 0x0200 /* different rx extended addressing */
#define CAN_ISOTP_WAIT_TX_DONE 0x0400 /* wait for tx completion */
#define CAN_ISOTP_SF_BROADCAST 0x0800 /* 1-to-N functional addressing */
#define CAN_ISOTP_CF_BROADCAST 0x1000 /* 1-to-N transmission w/o FC */
/* protocol machine default values */

2
include/uapi/linux/cdrom.h
View file

@ -103,7 +103,7 @@
#define CDROMREADALL 0x5318 /* read all 2646 bytes */
/*
* These ioctls are (now) only in ide-cd.c for controlling
* These ioctls were only in (now removed) ide-cd.c for controlling
* drive spindown time. They should be implemented in the
* Uniform driver, via generic packet commands, GPCMD_MODE_SELECT_10,
* GPCMD_MODE_SENSE_10 and the GPMODE_POWER_PAGE...

20
include/uapi/linux/cec.h
View file

@ -142,6 +142,26 @@ static inline void cec_msg_set_reply_to(struct cec_msg *msg,
msg->reply = msg->timeout = 0;
}
/**
* cec_msg_recv_is_tx_result - return true if this message contains the
* result of an earlier non-blocking transmit
* @msg: the message structure from CEC_RECEIVE
*/
static inline int cec_msg_recv_is_tx_result(const struct cec_msg *msg)
{
return msg->sequence && msg->tx_status && !msg->rx_status;
}
/**
* cec_msg_recv_is_rx_result - return true if this message contains the
* reply of an earlier non-blocking transmit
* @msg: the message structure from CEC_RECEIVE
*/
static inline int cec_msg_recv_is_rx_result(const struct cec_msg *msg)
{
return msg->sequence && !msg->tx_status && msg->rx_status;
}
/* cec_msg flags field */
#define CEC_MSG_FL_REPLY_TO_FOLLOWERS (1 << 0)
#define CEC_MSG_FL_RAW (1 << 1)

14
include/uapi/linux/cxl_mem.h
View file

@ -68,8 +68,8 @@ static const struct {
* struct cxl_command_info - Command information returned from a query.
* @id: ID number for the command.
* @flags: Flags that specify command behavior.
* @size_in: Expected input size, or -1 if variable length.
* @size_out: Expected output size, or -1 if variable length.
* @size_in: Expected input size, or ~0 if variable length.
* @size_out: Expected output size, or ~0 if variable length.
*
* Represents a single command that is supported by both the driver and the
* hardware. This is returned as part of an array from the query ioctl. The
@ -78,7 +78,7 @@ static const struct {
*
* - @id = 10
* - @flags = 0
* - @size_in = -1
* - @size_in = ~0
* - @size_out = 0
*
* See struct cxl_mem_query_commands.
@ -89,8 +89,8 @@ struct cxl_command_info {
__u32 flags;
#define CXL_MEM_COMMAND_FLAG_MASK GENMASK(0, 0)
__s32 size_in;
__s32 size_out;
__u32 size_in;
__u32 size_out;
};
/**
@ -169,13 +169,13 @@ struct cxl_send_command {
__u32 retval;
struct {
__s32 size;
__u32 size;
__u32 rsvd;
__u64 payload;
} in;
struct {
__s32 size;
__u32 size;
__u32 rsvd;
__u64 payload;
} out;

23
include/uapi/linux/devlink.h
View file

@ -131,6 +131,11 @@ enum devlink_command {
DEVLINK_CMD_RATE_NEW,
DEVLINK_CMD_RATE_DEL,
DEVLINK_CMD_LINECARD_GET, /* can dump */
DEVLINK_CMD_LINECARD_SET,
DEVLINK_CMD_LINECARD_NEW,
DEVLINK_CMD_LINECARD_DEL,
/* add new commands above here */
__DEVLINK_CMD_MAX,
DEVLINK_CMD_MAX = __DEVLINK_CMD_MAX - 1
@ -338,6 +343,19 @@ enum devlink_reload_limit {
#define DEVLINK_RELOAD_LIMITS_VALID_MASK (_BITUL(__DEVLINK_RELOAD_LIMIT_MAX) - 1)
enum devlink_linecard_state {
DEVLINK_LINECARD_STATE_UNSPEC,
DEVLINK_LINECARD_STATE_UNPROVISIONED,
DEVLINK_LINECARD_STATE_UNPROVISIONING,
DEVLINK_LINECARD_STATE_PROVISIONING,
DEVLINK_LINECARD_STATE_PROVISIONING_FAILED,
DEVLINK_LINECARD_STATE_PROVISIONED,
DEVLINK_LINECARD_STATE_ACTIVE,
__DEVLINK_LINECARD_STATE_MAX,
DEVLINK_LINECARD_STATE_MAX = __DEVLINK_LINECARD_STATE_MAX - 1
};
enum devlink_attr {
/* don't change the order or add anything between, this is ABI! */
DEVLINK_ATTR_UNSPEC,
@ -553,6 +571,11 @@ enum devlink_attr {
DEVLINK_ATTR_REGION_MAX_SNAPSHOTS, /* u32 */
DEVLINK_ATTR_LINECARD_INDEX, /* u32 */
DEVLINK_ATTR_LINECARD_STATE, /* u8 */
DEVLINK_ATTR_LINECARD_TYPE, /* string */
DEVLINK_ATTR_LINECARD_SUPPORTED_TYPES, /* nested */
/* add new attributes above here, update the policy in devlink.c */
__DEVLINK_ATTR_MAX,

4
include/uapi/linux/dma-buf.h
View file

@ -174,8 +174,8 @@ struct dma_buf_import_sync_file {
* between them in actual uapi, they're just different numbers.
*/
#define DMA_BUF_SET_NAME _IOW(DMA_BUF_BASE, 1, const char *)
#define DMA_BUF_SET_NAME_A _IOW(DMA_BUF_BASE, 1, u32)
#define DMA_BUF_SET_NAME_B _IOW(DMA_BUF_BASE, 1, u64)
#define DMA_BUF_SET_NAME_A _IOW(DMA_BUF_BASE, 1, __u32)
#define DMA_BUF_SET_NAME_B _IOW(DMA_BUF_BASE, 1, __u64)
#define DMA_BUF_IOCTL_EXPORT_SYNC_FILE _IOWR(DMA_BUF_BASE, 2, struct dma_buf_export_sync_file)
#define DMA_BUF_IOCTL_IMPORT_SYNC_FILE _IOW(DMA_BUF_BASE, 3, struct dma_buf_import_sync_file)

1
include/uapi/linux/elf-em.h
View file

@ -51,6 +51,7 @@
#define EM_RISCV 243 /* RISC-V */
#define EM_BPF 247 /* Linux BPF - in-kernel virtual machine */
#define EM_CSKY 252 /* C-SKY */
#define EM_LOONGARCH 258 /* LoongArch */
#define EM_FRV 0x5441 /* Fujitsu FR-V */
/*

9
include/uapi/linux/elf.h
View file

@ -134,7 +134,7 @@ typedef __s64 Elf64_Sxword;
#define STT_TLS 6
#define ELF_ST_BIND(x) ((x) >> 4)
#define ELF_ST_TYPE(x) (((unsigned int) x) & 0xf)
#define ELF_ST_TYPE(x) ((x) & 0xf)
#define ELF32_ST_BIND(x) ELF_ST_BIND(x)
#define ELF32_ST_TYPE(x) ELF_ST_TYPE(x)
#define ELF64_ST_BIND(x) ELF_ST_BIND(x)
@ -431,11 +431,18 @@ typedef struct elf64_shdr {
#define NT_ARM_PACG_KEYS 0x408 /* ARM pointer authentication generic key */
#define NT_ARM_TAGGED_ADDR_CTRL 0x409 /* arm64 tagged address control (prctl()) */
#define NT_ARM_PAC_ENABLED_KEYS 0x40a /* arm64 ptr auth enabled keys (prctl()) */
#define NT_ARM_SSVE 0x40b /* ARM Streaming SVE registers */
#define NT_ARM_ZA 0x40c /* ARM SME ZA registers */
#define NT_ARC_V2 0x600 /* ARCv2 accumulator/extra registers */
#define NT_VMCOREDD 0x700 /* Vmcore Device Dump Note */
#define NT_MIPS_DSP 0x800 /* MIPS DSP ASE registers */
#define NT_MIPS_FP_MODE 0x801 /* MIPS floating-point mode */
#define NT_MIPS_MSA 0x802 /* MIPS SIMD registers */
#define NT_LOONGARCH_CPUCFG 0xa00 /* LoongArch CPU config registers */
#define NT_LOONGARCH_CSR 0xa01 /* LoongArch control and status registers */
#define NT_LOONGARCH_LSX 0xa02 /* LoongArch Loongson SIMD Extension registers */
#define NT_LOONGARCH_LASX 0xa03 /* LoongArch Loongson Advanced SIMD Extension registers */
#define NT_LOONGARCH_LBT 0xa04 /* LoongArch Loongson Binary Translation registers */
/* Note types with note name "GNU" */
#define NT_GNU_PROPERTY_TYPE_0 5

1
include/uapi/linux/ethtool.h
View file

@ -1691,6 +1691,7 @@ enum ethtool_link_mode_bit_indices {
ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT = 89,
ETHTOOL_LINK_MODE_100baseFX_Half_BIT = 90,
ETHTOOL_LINK_MODE_100baseFX_Full_BIT = 91,
ETHTOOL_LINK_MODE_10baseT1L_Full_BIT = 92,
/* must be last entry */
__ETHTOOL_LINK_MODE_MASK_NBITS
};

1
include/uapi/linux/ethtool_netlink.h
View file

@ -338,6 +338,7 @@ enum {
ETHTOOL_A_RINGS_RX_BUF_LEN, /* u32 */
ETHTOOL_A_RINGS_TCP_DATA_SPLIT, /* u8 */
ETHTOOL_A_RINGS_CQE_SIZE, /* u32 */
ETHTOOL_A_RINGS_TX_PUSH, /* u8 */
/* add new constants above here */
__ETHTOOL_A_RINGS_CNT,

1
include/uapi/linux/fanotify.h
View file

@ -82,6 +82,7 @@
#define FAN_MARK_IGNORED_SURV_MODIFY 0x00000040
#define FAN_MARK_FLUSH 0x00000080
/* FAN_MARK_FILESYSTEM is 0x00000100 */
#define FAN_MARK_EVICTABLE 0x00000200
/* These are NOT bitwise flags. Both bits can be used togther. */
#define FAN_MARK_INODE 0x00000000

3
include/uapi/linux/gpio.h
View file

@ -66,6 +66,8 @@ struct gpiochip_info {
* @GPIO_V2_LINE_FLAG_BIAS_PULL_DOWN: line has pull-down bias enabled
* @GPIO_V2_LINE_FLAG_BIAS_DISABLED: line has bias disabled
* @GPIO_V2_LINE_FLAG_EVENT_CLOCK_REALTIME: line events contain REALTIME timestamps
* @GPIO_V2_LINE_FLAG_EVENT_CLOCK_HTE: line events contain timestamps from
* hardware timestamp engine
*/
enum gpio_v2_line_flag {
GPIO_V2_LINE_FLAG_USED = _BITULL(0),
@ -80,6 +82,7 @@ enum gpio_v2_line_flag {
GPIO_V2_LINE_FLAG_BIAS_PULL_DOWN = _BITULL(9),
GPIO_V2_LINE_FLAG_BIAS_DISABLED = _BITULL(10),
GPIO_V2_LINE_FLAG_EVENT_CLOCK_REALTIME = _BITULL(11),
GPIO_V2_LINE_FLAG_EVENT_CLOCK_HTE = _BITULL(12),
};
/**

31
include/uapi/linux/idxd.h
View file

@ -53,6 +53,11 @@ enum idxd_scmd_stat {
/* IAX */
#define IDXD_OP_FLAG_RD_SRC2_AECS 0x010000
#define IDXD_OP_FLAG_RD_SRC2_2ND 0x020000
#define IDXD_OP_FLAG_WR_SRC2_AECS_COMP 0x040000
#define IDXD_OP_FLAG_WR_SRC2_AECS_OVFL 0x080000
#define IDXD_OP_FLAG_SRC2_STS 0x100000
#define IDXD_OP_FLAG_CRC_RFC3720 0x200000
/* Opcode */
enum dsa_opcode {
@ -81,6 +86,18 @@ enum iax_opcode {
IAX_OPCODE_MEMMOVE,
IAX_OPCODE_DECOMPRESS = 0x42,
IAX_OPCODE_COMPRESS,
IAX_OPCODE_CRC64,
IAX_OPCODE_ZERO_DECOMP_32 = 0x48,
IAX_OPCODE_ZERO_DECOMP_16,
IAX_OPCODE_DECOMP_32 = 0x4c,
IAX_OPCODE_DECOMP_16,
IAX_OPCODE_SCAN = 0x50,
IAX_OPCODE_SET_MEMBER,
IAX_OPCODE_EXTRACT,
IAX_OPCODE_SELECT,
IAX_OPCODE_RLE_BURST,
IAX_OPCDE_FIND_UNIQUE,
IAX_OPCODE_EXPAND,
};
/* Completion record status */
@ -120,6 +137,7 @@ enum iax_completion_status {
IAX_COMP_NONE = 0,
IAX_COMP_SUCCESS,
IAX_COMP_PAGE_FAULT_IR = 0x04,
IAX_COMP_ANALYTICS_ERROR = 0x0a,
IAX_COMP_OUTBUF_OVERFLOW,
IAX_COMP_BAD_OPCODE = 0x10,
IAX_COMP_INVALID_FLAGS,
@ -140,7 +158,10 @@ enum iax_completion_status {
IAX_COMP_WATCHDOG,
IAX_COMP_INVALID_COMP_FLAG = 0x30,
IAX_COMP_INVALID_FILTER_FLAG,
IAX_COMP_INVALID_NUM_ELEMS = 0x33,
IAX_COMP_INVALID_INPUT_SIZE,
IAX_COMP_INVALID_NUM_ELEMS,
IAX_COMP_INVALID_SRC1_WIDTH,
IAX_COMP_INVALID_INVERT_OUT,
};
#define DSA_COMP_STATUS_MASK 0x7f
@ -319,8 +340,12 @@ struct iax_completion_record {
uint32_t output_size;
uint8_t output_bits;
uint8_t rsvd3;
uint16_t rsvd4;
uint64_t rsvd5[4];
uint16_t xor_csum;
uint32_t crc;
uint32_t min;
uint32_t max;
uint32_t sum;
uint64_t rsvd4[2];
} __attribute__((packed));
struct iax_raw_completion_record {

7
include/uapi/linux/if_link.h
View file

@ -211,6 +211,9 @@ struct rtnl_link_stats {
* @rx_nohandler: Number of packets received on the interface
* but dropped by the networking stack because the device is
* not designated to receive packets (e.g. backup link in a bond).
*
* @rx_otherhost_dropped: Number of packets dropped due to mismatch
* in destination MAC address.
*/
struct rtnl_link_stats64 {
__u64 rx_packets;
@ -243,6 +246,8 @@ struct rtnl_link_stats64 {
__u64 rx_compressed;
__u64 tx_compressed;
__u64 rx_nohandler;
__u64 rx_otherhost_dropped;
};
/* Subset of link stats useful for in-HW collection. Meaning of the fields is as
@ -363,6 +368,8 @@ enum {
IFLA_PARENT_DEV_NAME,
IFLA_PARENT_DEV_BUS_NAME,
IFLA_GRO_MAX_SIZE,
IFLA_TSO_MAX_SIZE,
IFLA_TSO_MAX_SEGS,
__IFLA_MAX
};

1
include/uapi/linux/input.h
View file

@ -271,6 +271,7 @@ struct input_mask {
#define BUS_RMI 0x1D
#define BUS_CEC 0x1E
#define BUS_INTEL_ISHTP 0x1F
#define BUS_AMD_SFH 0x20
/*
* MT_TOOL types

134
include/uapi/linux/io_uring.h
View file

@ -22,6 +22,7 @@ struct io_uring_sqe {
union {
__u64 off; /* offset into file */
__u64 addr2;
__u32 cmd_op;
};
union {
__u64 addr; /* pointer to buffer or iovecs */
@ -45,6 +46,8 @@ struct io_uring_sqe {
__u32 rename_flags;
__u32 unlink_flags;
__u32 hardlink_flags;
__u32 xattr_flags;
__u32 close_flags;
};
__u64 user_data; /* data to be passed back at completion time */
/* pack this to avoid bogus arm OABI complaints */
@ -60,9 +63,28 @@ struct io_uring_sqe {
__s32 splice_fd_in;
__u32 file_index;
};
__u64 __pad2[2];
union {
struct {
__u64 addr3;
__u64 __pad2[1];
};
/*
* If the ring is initialized with IORING_SETUP_SQE128, then
* this field is used for 80 bytes of arbitrary command data
*/
__u8 cmd[0];
};
};
/*
* If sqe->file_index is set to this for opcodes that instantiate a new
* direct descriptor (like openat/openat2/accept), then io_uring will allocate
* an available direct descriptor instead of having the application pass one
* in. The picked direct descriptor will be returned in cqe->res, or -ENFILE
* if the space is full.
*/
#define IORING_FILE_INDEX_ALLOC (~0U)
enum {
IOSQE_FIXED_FILE_BIT,
IOSQE_IO_DRAIN_BIT,
@ -102,8 +124,25 @@ enum {
#define IORING_SETUP_ATTACH_WQ (1U << 5) /* attach to existing wq */
#define IORING_SETUP_R_DISABLED (1U << 6) /* start with ring disabled */
#define IORING_SETUP_SUBMIT_ALL (1U << 7) /* continue submit on error */
/*
* Cooperative task running. When requests complete, they often require
* forcing the submitter to transition to the kernel to complete. If this
* flag is set, work will be done when the task transitions anyway, rather
* than force an inter-processor interrupt reschedule. This avoids interrupting
* a task running in userspace, and saves an IPI.
*/
#define IORING_SETUP_COOP_TASKRUN (1U << 8)
/*
* If COOP_TASKRUN is set, get notified if task work is available for
* running and a kernel transition would be needed to run it. This sets
* IORING_SQ_TASKRUN in the sq ring flags. Not valid with COOP_TASKRUN.
*/
#define IORING_SETUP_TASKRUN_FLAG (1U << 9)
enum {
#define IORING_SETUP_SQE128 (1U << 10) /* SQEs are 128 byte */
#define IORING_SETUP_CQE32 (1U << 11) /* CQEs are 32 byte */
enum io_uring_op {
IORING_OP_NOP,
IORING_OP_READV,
IORING_OP_WRITEV,
@ -145,6 +184,12 @@ enum {
IORING_OP_SYMLINKAT,
IORING_OP_LINKAT,
IORING_OP_MSG_RING,
IORING_OP_FSETXATTR,
IORING_OP_SETXATTR,
IORING_OP_FGETXATTR,
IORING_OP_GETXATTR,
IORING_OP_SOCKET,
IORING_OP_URING_CMD,
/* this goes last, obviously */
IORING_OP_LAST,
@ -187,6 +232,38 @@ enum {
#define IORING_POLL_UPDATE_EVENTS (1U << 1)
#define IORING_POLL_UPDATE_USER_DATA (1U << 2)
/*
* ASYNC_CANCEL flags.
*
* IORING_ASYNC_CANCEL_ALL Cancel all requests that match the given key
* IORING_ASYNC_CANCEL_FD Key off 'fd' for cancelation rather than the
* request 'user_data'
* IORING_ASYNC_CANCEL_ANY Match any request
*/
#define IORING_ASYNC_CANCEL_ALL (1U << 0)
#define IORING_ASYNC_CANCEL_FD (1U << 1)
#define IORING_ASYNC_CANCEL_ANY (1U << 2)
/*
* send/sendmsg and recv/recvmsg flags (sqe->addr2)
*
* IORING_RECVSEND_POLL_FIRST If set, instead of first attempting to send
* or receive and arm poll if that yields an
* -EAGAIN result, arm poll upfront and skip
* the initial transfer attempt.
*/
#define IORING_RECVSEND_POLL_FIRST (1U << 0)
/*
* accept flags stored in sqe->ioprio
*/
#define IORING_ACCEPT_MULTISHOT (1U << 0)
/*
* close flags, store in sqe->close_flags
*/
#define IORING_CLOSE_FD_AND_FILE_SLOT (1U << 0)
/*
* IO completion data structure (Completion Queue Entry)
*/
@ -194,6 +271,12 @@ struct io_uring_cqe {
__u64 user_data; /* sqe->data submission passed back */
__s32 res; /* result code for this event */
__u32 flags;
/*
* If the ring is initialized with IORING_SETUP_CQE32, then this field
* contains 16-bytes of padding, doubling the size of the CQE.
*/
__u64 big_cqe[];
};
/*
@ -201,9 +284,11 @@ struct io_uring_cqe {
*
* IORING_CQE_F_BUFFER If set, the upper 16 bits are the buffer ID
* IORING_CQE_F_MORE If set, parent SQE will generate more CQE entries
* IORING_CQE_F_SOCK_NONEMPTY If set, more data to read after socket recv
*/
#define IORING_CQE_F_BUFFER (1U << 0)
#define IORING_CQE_F_MORE (1U << 1)
#define IORING_CQE_F_SOCK_NONEMPTY (1U << 2)
enum {
IORING_CQE_BUFFER_SHIFT = 16,
@ -236,6 +321,7 @@ struct io_sqring_offsets {
*/
#define IORING_SQ_NEED_WAKEUP (1U << 0) /* needs io_uring_enter wakeup */
#define IORING_SQ_CQ_OVERFLOW (1U << 1) /* CQ ring is overflown */
#define IORING_SQ_TASKRUN (1U << 2) /* task should enter the kernel */
struct io_cqring_offsets {
__u32 head;
@ -333,6 +419,10 @@ enum {
IORING_REGISTER_RING_FDS = 20,
IORING_UNREGISTER_RING_FDS = 21,
/* register ring based provide buffer group */
IORING_REGISTER_PBUF_RING = 22,
IORING_UNREGISTER_PBUF_RING = 23,
/* this goes last */
IORING_REGISTER_LAST
};
@ -350,9 +440,15 @@ struct io_uring_files_update {
__aligned_u64 /* __s32 * */ fds;
};
/*
* Register a fully sparse file space, rather than pass in an array of all
* -1 file descriptors.
*/
#define IORING_RSRC_REGISTER_SPARSE (1U << 0)
struct io_uring_rsrc_register {
__u32 nr;
__u32 resv;
__u32 flags;
__u64 resv2;
__aligned_u64 data;
__aligned_u64 tags;
@ -404,6 +500,38 @@ struct io_uring_restriction {
__u32 resv2[3];
};
struct io_uring_buf {
__u64 addr;
__u32 len;
__u16 bid;
__u16 resv;
};
struct io_uring_buf_ring {
union {
/*
* To avoid spilling into more pages than we need to, the
* ring tail is overlaid with the io_uring_buf->resv field.
*/
struct {
__u64 resv1;
__u32 resv2;
__u16 resv3;
__u16 tail;
};
struct io_uring_buf bufs[0];
};
};
/* argument for IORING_(UN)REGISTER_PBUF_RING */
struct io_uring_buf_reg {
__u64 ring_addr;
__u32 ring_entries;
__u16 bgid;
__u16 pad;
__u64 resv[3];
};
/*
* io_uring_restriction->opcode values
*/

1
include/uapi/linux/ipv6.h
View file

@ -194,6 +194,7 @@ enum {
DEVCONF_IOAM6_ID,
DEVCONF_IOAM6_ID_WIDE,
DEVCONF_NDISC_EVICT_NOCARRIER,
DEVCONF_ACCEPT_UNTRACKED_NA,
DEVCONF_MAX
};

1
include/uapi/linux/kexec.h
View file

@ -43,6 +43,7 @@
#define KEXEC_ARCH_MIPS ( 8 << 16)
#define KEXEC_ARCH_AARCH64 (183 << 16)
#define KEXEC_ARCH_RISCV (243 << 16)
#define KEXEC_ARCH_LOONGARCH (258 << 16)
/* The artificial cap on the number of segments passed to kexec_load. */
#define KEXEC_SEGMENT_MAX 16

54
include/uapi/linux/kvm.h
View file

@ -444,6 +444,9 @@ struct kvm_run {
#define KVM_SYSTEM_EVENT_SHUTDOWN 1
#define KVM_SYSTEM_EVENT_RESET 2
#define KVM_SYSTEM_EVENT_CRASH 3
#define KVM_SYSTEM_EVENT_WAKEUP 4
#define KVM_SYSTEM_EVENT_SUSPEND 5
#define KVM_SYSTEM_EVENT_SEV_TERM 6
__u32 type;
__u32 ndata;
union {
@ -646,6 +649,7 @@ struct kvm_vapic_addr {
#define KVM_MP_STATE_OPERATING 7
#define KVM_MP_STATE_LOAD 8
#define KVM_MP_STATE_AP_RESET_HOLD 9
#define KVM_MP_STATE_SUSPENDED 10
struct kvm_mp_state {
__u32 mp_state;
@ -1150,8 +1154,9 @@ struct kvm_ppc_resize_hpt {
#define KVM_CAP_S390_MEM_OP_EXTENSION 211
#define KVM_CAP_PMU_CAPABILITY 212
#define KVM_CAP_DISABLE_QUIRKS2 213
/* #define KVM_CAP_VM_TSC_CONTROL 214 */
#define KVM_CAP_VM_TSC_CONTROL 214
#define KVM_CAP_SYSTEM_EVENT_DATA 215
#define KVM_CAP_ARM_SYSTEM_SUSPEND 216
#ifdef KVM_CAP_IRQ_ROUTING
@ -1240,6 +1245,7 @@ struct kvm_x86_mce {
#define KVM_XEN_HVM_CONFIG_SHARED_INFO (1 << 2)
#define KVM_XEN_HVM_CONFIG_RUNSTATE (1 << 3)
#define KVM_XEN_HVM_CONFIG_EVTCHN_2LEVEL (1 << 4)
#define KVM_XEN_HVM_CONFIG_EVTCHN_SEND (1 << 5)
struct kvm_xen_hvm_config {
__u32 flags;
@ -1478,7 +1484,8 @@ struct kvm_s390_ucas_mapping {
#define KVM_SET_PIT2 _IOW(KVMIO, 0xa0, struct kvm_pit_state2)
/* Available with KVM_CAP_PPC_GET_PVINFO */
#define KVM_PPC_GET_PVINFO _IOW(KVMIO, 0xa1, struct kvm_ppc_pvinfo)
/* Available with KVM_CAP_TSC_CONTROL */
/* Available with KVM_CAP_TSC_CONTROL for a vCPU, or with
* KVM_CAP_VM_TSC_CONTROL to set defaults for a VM */
#define KVM_SET_TSC_KHZ _IO(KVMIO, 0xa2)
#define KVM_GET_TSC_KHZ _IO(KVMIO, 0xa3)
/* Available with KVM_CAP_PCI_2_3 */
@ -1694,6 +1701,32 @@ struct kvm_xen_hvm_attr {
struct {
__u64 gfn;
} shared_info;
struct {
__u32 send_port;
__u32 type; /* EVTCHNSTAT_ipi / EVTCHNSTAT_interdomain */
__u32 flags;
#define KVM_XEN_EVTCHN_DEASSIGN (1 << 0)
#define KVM_XEN_EVTCHN_UPDATE (1 << 1)
#define KVM_XEN_EVTCHN_RESET (1 << 2)
/*
* Events sent by the guest are either looped back to
* the guest itself (potentially on a different port#)
* or signalled via an eventfd.
*/
union {
struct {
__u32 port;
__u32 vcpu;
__u32 priority;
} port;
struct {
__u32 port; /* Zero for eventfd */
__s32 fd;
} eventfd;
__u32 padding[4];
} deliver;
} evtchn;
__u32 xen_version;
__u64 pad[8];
} u;
};
@ -1702,11 +1735,17 @@ struct kvm_xen_hvm_attr {
#define KVM_XEN_ATTR_TYPE_LONG_MODE 0x0
#define KVM_XEN_ATTR_TYPE_SHARED_INFO 0x1
#define KVM_XEN_ATTR_TYPE_UPCALL_VECTOR 0x2
/* Available with KVM_CAP_XEN_HVM / KVM_XEN_HVM_CONFIG_EVTCHN_SEND */
#define KVM_XEN_ATTR_TYPE_EVTCHN 0x3
#define KVM_XEN_ATTR_TYPE_XEN_VERSION 0x4
/* Per-vCPU Xen attributes */
#define KVM_XEN_VCPU_GET_ATTR _IOWR(KVMIO, 0xca, struct kvm_xen_vcpu_attr)
#define KVM_XEN_VCPU_SET_ATTR _IOW(KVMIO, 0xcb, struct kvm_xen_vcpu_attr)
/* Available with KVM_CAP_XEN_HVM / KVM_XEN_HVM_CONFIG_EVTCHN_SEND */
#define KVM_XEN_HVM_EVTCHN_SEND _IOW(KVMIO, 0xd0, struct kvm_irq_routing_xen_evtchn)
#define KVM_GET_SREGS2 _IOR(KVMIO, 0xcc, struct kvm_sregs2)
#define KVM_SET_SREGS2 _IOW(KVMIO, 0xcd, struct kvm_sregs2)
@ -1724,6 +1763,13 @@ struct kvm_xen_vcpu_attr {
__u64 time_blocked;
__u64 time_offline;
} runstate;
__u32 vcpu_id;
struct {
__u32 port;
__u32 priority;
__u64 expires_ns;
} timer;
__u8 vector;
} u;
};
@ -1734,6 +1780,10 @@ struct kvm_xen_vcpu_attr {
#define KVM_XEN_VCPU_ATTR_TYPE_RUNSTATE_CURRENT 0x3
#define KVM_XEN_VCPU_ATTR_TYPE_RUNSTATE_DATA 0x4
#define KVM_XEN_VCPU_ATTR_TYPE_RUNSTATE_ADJUST 0x5
/* Available with KVM_CAP_XEN_HVM / KVM_XEN_HVM_CONFIG_EVTCHN_SEND */
#define KVM_XEN_VCPU_ATTR_TYPE_VCPU_ID 0x6
#define KVM_XEN_VCPU_ATTR_TYPE_TIMER 0x7
#define KVM_XEN_VCPU_ATTR_TYPE_UPCALL_VECTOR 0x8
/* Secure Encrypted Virtualization command */
enum sev_cmd_id {

36
include/uapi/linux/landlock.h
View file

@ -21,8 +21,14 @@ struct landlock_ruleset_attr {
/**
* @handled_access_fs: Bitmask of actions (cf. `Filesystem flags`_)
* that is handled by this ruleset and should then be forbidden if no
* rule explicitly allow them. This is needed for backward
* compatibility reasons.
* rule explicitly allow them: it is a deny-by-default list that should
* contain as much Landlock access rights as possible. Indeed, all
* Landlock filesystem access rights that are not part of
* handled_access_fs are allowed. This is needed for backward
* compatibility reasons. One exception is the
* LANDLOCK_ACCESS_FS_REFER access right, which is always implicitly
* handled, but must still be explicitly handled to add new rules with
* this access right.
*/
__u64 handled_access_fs;
};
@ -33,7 +39,9 @@ struct landlock_ruleset_attr {
* - %LANDLOCK_CREATE_RULESET_VERSION: Get the highest supported Landlock ABI
* version.
*/
/* clang-format off */
#define LANDLOCK_CREATE_RULESET_VERSION (1U << 0)
/* clang-format on */
/**
* enum landlock_rule_type - Landlock rule type
@ -60,8 +68,9 @@ struct landlock_path_beneath_attr {
*/
__u64 allowed_access;
/**
* @parent_fd: File descriptor, open with ``O_PATH``, which identifies
* the parent directory of a file hierarchy, or just a file.
* @parent_fd: File descriptor, preferably opened with ``O_PATH``,
* which identifies the parent directory of a file hierarchy, or just a
* file.
*/
__s32 parent_fd;
/*
@ -109,6 +118,22 @@ struct landlock_path_beneath_attr {
* - %LANDLOCK_ACCESS_FS_MAKE_FIFO: Create (or rename or link) a named pipe.
* - %LANDLOCK_ACCESS_FS_MAKE_BLOCK: Create (or rename or link) a block device.
* - %LANDLOCK_ACCESS_FS_MAKE_SYM: Create (or rename or link) a symbolic link.
* - %LANDLOCK_ACCESS_FS_REFER: Link or rename a file from or to a different
* directory (i.e. reparent a file hierarchy). This access right is
* available since the second version of the Landlock ABI. This is also the
* only access right which is always considered handled by any ruleset in
* such a way that reparenting a file hierarchy is always denied by default.
* To avoid privilege escalation, it is not enough to add a rule with this
* access right. When linking or renaming a file, the destination directory
* hierarchy must also always have the same or a superset of restrictions of
* the source hierarchy. If it is not the case, or if the domain doesn't
* handle this access right, such actions are denied by default with errno
* set to EXDEV. Linking also requires a LANDLOCK_ACCESS_FS_MAKE_* access
* right on the destination directory, and renaming also requires a
* LANDLOCK_ACCESS_FS_REMOVE_* access right on the source's (file or
* directory) parent. Otherwise, such actions are denied with errno set to
* EACCES. The EACCES errno prevails over EXDEV to let user space
* efficiently deal with an unrecoverable error.
*
* .. warning::
*
@ -120,6 +145,7 @@ struct landlock_path_beneath_attr {
* :manpage:`access(2)`.
* Future Landlock evolutions will enable to restrict them.
*/
/* clang-format off */
#define LANDLOCK_ACCESS_FS_EXECUTE (1ULL << 0)
#define LANDLOCK_ACCESS_FS_WRITE_FILE (1ULL << 1)
#define LANDLOCK_ACCESS_FS_READ_FILE (1ULL << 2)
@ -133,5 +159,7 @@ struct landlock_path_beneath_attr {
#define LANDLOCK_ACCESS_FS_MAKE_FIFO (1ULL << 10)
#define LANDLOCK_ACCESS_FS_MAKE_BLOCK (1ULL << 11)
#define LANDLOCK_ACCESS_FS_MAKE_SYM (1ULL << 12)
#define LANDLOCK_ACCESS_FS_REFER (1ULL << 13)
/* clang-format on */
#endif /* _UAPI_LINUX_LANDLOCK_H */

7
include/uapi/linux/lirc.h
View file

@ -84,6 +84,13 @@
#define LIRC_CAN_SEND(x) ((x)&LIRC_CAN_SEND_MASK)
#define LIRC_CAN_REC(x) ((x)&LIRC_CAN_REC_MASK)
/*
* Unused features. These features were never implemented, in tree or
* out of tree. These definitions are here so not to break the lircd build.
*/
#define LIRC_CAN_SET_REC_FILTER 0
#define LIRC_CAN_NOTIFY_DECODE 0
/*** IOCTL commands for lirc driver ***/
#define LIRC_GET_FEATURES _IOR('i', 0x00000000, __u32)

7
include/uapi/linux/loop.h
View file

@ -1,11 +1,6 @@
/* SPDX-License-Identifier: GPL-1.0+ WITH Linux-syscall-note */
/*
* include/linux/loop.h
*
* Written by Theodore Ts'o, 3/29/93.
*
* Copyright 1993 by Theodore Ts'o. Redistribution of this file is
* permitted under the GNU General Public License.
* Copyright 1993 by Theodore Ts'o.
*/
#ifndef _UAPI_LINUX_LOOP_H
#define _UAPI_LINUX_LOOP_H

75
include/uapi/linux/mdio.h
View file

@ -67,6 +67,19 @@
#define MDIO_PCS_10GBRT_STAT2 33 /* 10GBASE-R/-T PCS status 2 */
#define MDIO_AN_10GBT_CTRL 32 /* 10GBASE-T auto-negotiation control */
#define MDIO_AN_10GBT_STAT 33 /* 10GBASE-T auto-negotiation status */
#define MDIO_B10L_PMA_CTRL 2294 /* 10BASE-T1L PMA control */
#define MDIO_PMA_10T1L_STAT 2295 /* 10BASE-T1L PMA status */
#define MDIO_PCS_10T1L_CTRL 2278 /* 10BASE-T1L PCS control */
#define MDIO_PMA_PMD_BT1 18 /* BASE-T1 PMA/PMD extended ability */
#define MDIO_AN_T1_CTRL 512 /* BASE-T1 AN control */
#define MDIO_AN_T1_STAT 513 /* BASE-T1 AN status */
#define MDIO_AN_T1_ADV_L 514 /* BASE-T1 AN advertisement register [15:0] */
#define MDIO_AN_T1_ADV_M 515 /* BASE-T1 AN advertisement register [31:16] */
#define MDIO_AN_T1_ADV_H 516 /* BASE-T1 AN advertisement register [47:32] */
#define MDIO_AN_T1_LP_L 517 /* BASE-T1 AN LP Base Page ability register [15:0] */
#define MDIO_AN_T1_LP_M 518 /* BASE-T1 AN LP Base Page ability register [31:16] */
#define MDIO_AN_T1_LP_H 519 /* BASE-T1 AN LP Base Page ability register [47:32] */
#define MDIO_PMA_PMD_BT1_CTRL 2100 /* BASE-T1 PMA/PMD control register */
/* LASI (Link Alarm Status Interrupt) registers, defined by XENPAK MSA. */
#define MDIO_PMA_LASI_RXCTRL 0x9000 /* RX_ALARM control */
@ -159,6 +172,7 @@
#define MDIO_PMA_CTRL2_10BT 0x000f /* 10BASE-T type */
#define MDIO_PMA_CTRL2_2_5GBT 0x0030 /* 2.5GBaseT type */
#define MDIO_PMA_CTRL2_5GBT 0x0031 /* 5GBaseT type */
#define MDIO_PMA_CTRL2_BASET1 0x003D /* BASE-T1 type */
#define MDIO_PCS_CTRL2_TYPE 0x0003 /* PCS type selection */
#define MDIO_PCS_CTRL2_10GBR 0x0000 /* 10GBASE-R type */
#define MDIO_PCS_CTRL2_10GBX 0x0001 /* 10GBASE-X type */
@ -212,6 +226,7 @@
#define MDIO_PMA_EXTABLE_1000BKX 0x0040 /* 1000BASE-KX ability */
#define MDIO_PMA_EXTABLE_100BTX 0x0080 /* 100BASE-TX ability */
#define MDIO_PMA_EXTABLE_10BT 0x0100 /* 10BASE-T ability */
#define MDIO_PMA_EXTABLE_BT1 0x0800 /* BASE-T1 ability */
#define MDIO_PMA_EXTABLE_NBT 0x4000 /* 2.5/5GBASE-T ability */
/* PHY XGXS lane state register. */
@ -268,6 +283,66 @@
#define MDIO_AN_10GBT_STAT_MS 0x4000 /* Master/slave config */
#define MDIO_AN_10GBT_STAT_MSFLT 0x8000 /* Master/slave config fault */
/* 10BASE-T1L PMA control */
#define MDIO_PMA_10T1L_CTRL_LB_EN 0x0001 /* Enable loopback mode */
#define MDIO_PMA_10T1L_CTRL_EEE_EN 0x0400 /* Enable EEE mode */
#define MDIO_PMA_10T1L_CTRL_LOW_POWER 0x0800 /* Low-power mode */
#define MDIO_PMA_10T1L_CTRL_2V4_EN 0x1000 /* Enable 2.4 Vpp operating mode */
#define MDIO_PMA_10T1L_CTRL_TX_DIS 0x4000 /* Transmit disable */
#define MDIO_PMA_10T1L_CTRL_PMA_RST 0x8000 /* MA reset */
/* 10BASE-T1L PMA status register. */
#define MDIO_PMA_10T1L_STAT_LINK 0x0001 /* PMA receive link up */
#define MDIO_PMA_10T1L_STAT_FAULT 0x0002 /* Fault condition detected */
#define MDIO_PMA_10T1L_STAT_POLARITY 0x0004 /* Receive polarity is reversed */
#define MDIO_PMA_10T1L_STAT_RECV_FAULT 0x0200 /* Able to detect fault on receive path */
#define MDIO_PMA_10T1L_STAT_EEE 0x0400 /* PHY has EEE ability */
#define MDIO_PMA_10T1L_STAT_LOW_POWER 0x0800 /* PMA has low-power ability */
#define MDIO_PMA_10T1L_STAT_2V4_ABLE 0x1000 /* PHY has 2.4 Vpp operating mode ability */
#define MDIO_PMA_10T1L_STAT_LB_ABLE 0x2000 /* PHY has loopback ability */
/* 10BASE-T1L PCS control register. */
#define MDIO_PCS_10T1L_CTRL_LB 0x4000 /* Enable PCS level loopback mode */
#define MDIO_PCS_10T1L_CTRL_RESET 0x8000 /* PCS reset */
/* BASE-T1 PMA/PMD extended ability register. */
#define MDIO_PMA_PMD_BT1_B10L_ABLE 0x0004 /* 10BASE-T1L Ability */
/* BASE-T1 auto-negotiation advertisement register [15:0] */
#define MDIO_AN_T1_ADV_L_PAUSE_CAP ADVERTISE_PAUSE_CAP
#define MDIO_AN_T1_ADV_L_PAUSE_ASYM ADVERTISE_PAUSE_ASYM
#define MDIO_AN_T1_ADV_L_FORCE_MS 0x1000 /* Force Master/slave Configuration */
#define MDIO_AN_T1_ADV_L_REMOTE_FAULT ADVERTISE_RFAULT
#define MDIO_AN_T1_ADV_L_ACK ADVERTISE_LPACK
#define MDIO_AN_T1_ADV_L_NEXT_PAGE_REQ ADVERTISE_NPAGE
/* BASE-T1 auto-negotiation advertisement register [31:16] */
#define MDIO_AN_T1_ADV_M_B10L 0x4000 /* device is compatible with 10BASE-T1L */
#define MDIO_AN_T1_ADV_M_MST 0x0010 /* advertise master preference */
/* BASE-T1 auto-negotiation advertisement register [47:32] */
#define MDIO_AN_T1_ADV_H_10L_TX_HI_REQ 0x1000 /* 10BASE-T1L High Level Transmit Request */
#define MDIO_AN_T1_ADV_H_10L_TX_HI 0x2000 /* 10BASE-T1L High Level Transmit Ability */
/* BASE-T1 AN LP Base Page ability register [15:0] */
#define MDIO_AN_T1_LP_L_PAUSE_CAP LPA_PAUSE_CAP
#define MDIO_AN_T1_LP_L_PAUSE_ASYM LPA_PAUSE_ASYM
#define MDIO_AN_T1_LP_L_FORCE_MS 0x1000 /* LP Force Master/slave Configuration */
#define MDIO_AN_T1_LP_L_REMOTE_FAULT LPA_RFAULT
#define MDIO_AN_T1_LP_L_ACK LPA_LPACK
#define MDIO_AN_T1_LP_L_NEXT_PAGE_REQ LPA_NPAGE
/* BASE-T1 AN LP Base Page ability register [31:16] */
#define MDIO_AN_T1_LP_M_MST 0x0010 /* LP master preference */
#define MDIO_AN_T1_LP_M_B10L 0x4000 /* LP is compatible with 10BASE-T1L */
/* BASE-T1 AN LP Base Page ability register [47:32] */
#define MDIO_AN_T1_LP_H_10L_TX_HI_REQ 0x1000 /* 10BASE-T1L High Level LP Transmit Request */
#define MDIO_AN_T1_LP_H_10L_TX_HI 0x2000 /* 10BASE-T1L High Level LP Transmit Ability */
/* BASE-T1 PMA/PMD control register */
#define MDIO_PMA_PMD_BT1_CTRL_CFG_MST 0x4000 /* MASTER-SLAVE config value */
/* EEE Supported/Advertisement/LP Advertisement registers.
*
* EEE capability Register (3.20), Advertisement (7.60) and

4
include/uapi/linux/media.h
View file

@ -20,9 +20,6 @@
#ifndef __LINUX_MEDIA_H
#define __LINUX_MEDIA_H
#ifndef __KERNEL__
#include <stdint.h>
#endif
#include <linux/ioctl.h>
#include <linux/types.h>
@ -226,6 +223,7 @@ struct media_pad_desc {
#define MEDIA_LNK_FL_LINK_TYPE (0xf << 28)
# define MEDIA_LNK_FL_DATA_LINK (0 << 28)
# define MEDIA_LNK_FL_INTERFACE_LINK (1 << 28)
# define MEDIA_LNK_FL_ANCILLARY_LINK (2 << 28)
struct media_link_desc {
struct media_pad_desc source;

8
include/uapi/linux/mptcp.h
View file

@ -55,6 +55,9 @@ enum {
MPTCP_PM_ATTR_ADDR, /* nested address */
MPTCP_PM_ATTR_RCV_ADD_ADDRS, /* u32 */
MPTCP_PM_ATTR_SUBFLOWS, /* u32 */
MPTCP_PM_ATTR_TOKEN, /* u32 */
MPTCP_PM_ATTR_LOC_ID, /* u8 */
MPTCP_PM_ATTR_ADDR_REMOTE, /* nested address */
__MPTCP_PM_ATTR_MAX
};
@ -93,6 +96,10 @@ enum {
MPTCP_PM_CMD_SET_LIMITS,
MPTCP_PM_CMD_GET_LIMITS,
MPTCP_PM_CMD_SET_FLAGS,
MPTCP_PM_CMD_ANNOUNCE,
MPTCP_PM_CMD_REMOVE,
MPTCP_PM_CMD_SUBFLOW_CREATE,
MPTCP_PM_CMD_SUBFLOW_DESTROY,
__MPTCP_PM_CMD_AFTER_LAST
};
@ -188,6 +195,7 @@ enum mptcp_event_attr {
MPTCP_ATTR_IF_IDX, /* s32 */
MPTCP_ATTR_RESET_REASON,/* u32 */
MPTCP_ATTR_RESET_FLAGS, /* u32 */
MPTCP_ATTR_SERVER_SIDE, /* u8 */
__MPTCP_ATTR_AFTER_LAST
};

2
include/uapi/linux/neighbour.h
View file

@ -32,6 +32,8 @@ enum {
NDA_NH_ID,
NDA_FDB_EXT_ATTRS,
NDA_FLAGS_EXT,
NDA_NDM_STATE_MASK,
NDA_NDM_FLAGS_MASK,
__NDA_MAX
};

1
include/uapi/linux/netlink.h
View file

@ -72,6 +72,7 @@ struct nlmsghdr {
/* Modifiers to DELETE request */
#define NLM_F_NONREC 0x100 /* Do not delete recursively */
#define NLM_F_BULK 0x200 /* Delete multiple objects */
/* Flags for ACK message */
#define NLM_F_CAPPED 0x100 /* request was capped */

2
include/uapi/linux/nl80211.h
View file

@ -3175,6 +3175,8 @@ enum nl80211_attrs {
NL80211_ATTR_EHT_CAPABILITY,
NL80211_ATTR_DISABLE_EHT,
/* add attributes here, update the policy in nl80211.c */
__NL80211_ATTR_AFTER_LAST,

28
include/uapi/linux/nvme_ioctl.h
View file

@ -70,6 +70,28 @@ struct nvme_passthru_cmd64 {
__u64 result;
};
/* same as struct nvme_passthru_cmd64, minus the 8b result field */
struct nvme_uring_cmd {
__u8 opcode;
__u8 flags;
__u16 rsvd1;
__u32 nsid;
__u32 cdw2;
__u32 cdw3;
__u64 metadata;
__u64 addr;
__u32 metadata_len;
__u32 data_len;
__u32 cdw10;
__u32 cdw11;
__u32 cdw12;
__u32 cdw13;
__u32 cdw14;
__u32 cdw15;
__u32 timeout_ms;
__u32 rsvd2;
};
#define nvme_admin_cmd nvme_passthru_cmd
#define NVME_IOCTL_ID _IO('N', 0x40)
@ -83,4 +105,10 @@ struct nvme_passthru_cmd64 {
#define NVME_IOCTL_IO64_CMD _IOWR('N', 0x48, struct nvme_passthru_cmd64)
#define NVME_IOCTL_IO64_CMD_VEC _IOWR('N', 0x49, struct nvme_passthru_cmd64)
/* io_uring async commands: */
#define NVME_URING_CMD_IO _IOWR('N', 0x80, struct nvme_uring_cmd)
#define NVME_URING_CMD_IO_VEC _IOWR('N', 0x81, struct nvme_uring_cmd)
#define NVME_URING_CMD_ADMIN _IOWR('N', 0x82, struct nvme_uring_cmd)
#define NVME_URING_CMD_ADMIN_VEC _IOWR('N', 0x83, struct nvme_uring_cmd)
#endif /* _UAPI_LINUX_NVME_IOCTL_H */

1
include/uapi/linux/pci_regs.h
View file

@ -616,6 +616,7 @@
#define PCI_EXP_SLTCTL_PWR_OFF 0x0400 /* Power Off */
#define PCI_EXP_SLTCTL_EIC 0x0800 /* Electromechanical Interlock Control */
#define PCI_EXP_SLTCTL_DLLSCE 0x1000 /* Data Link Layer State Changed Enable */
#define PCI_EXP_SLTCTL_ASPL_DISABLE 0x2000 /* Auto Slot Power Limit Disable */
#define PCI_EXP_SLTCTL_IBPD_DISABLE 0x4000 /* In-band PD disable */
#define PCI_EXP_SLTSTA 0x1a /* Slot Status */
#define PCI_EXP_SLTSTA_ABP 0x0001 /* Attention Button Pressed */

2
include/uapi/linux/pkt_cls.h
View file

@ -587,6 +587,8 @@ enum {
TCA_FLOWER_KEY_HASH, /* u32 */
TCA_FLOWER_KEY_HASH_MASK, /* u32 */
TCA_FLOWER_KEY_NUM_OF_VLANS, /* u8 */
__TCA_FLOWER_MAX,
};

9
include/uapi/linux/prctl.h
View file

@ -272,6 +272,15 @@ struct prctl_mm_map {
# define PR_SCHED_CORE_SCOPE_THREAD_GROUP 1
# define PR_SCHED_CORE_SCOPE_PROCESS_GROUP 2
/* arm64 Scalable Matrix Extension controls */
/* Flag values must be in sync with SVE versions */
#define PR_SME_SET_VL 63 /* set task vector length */
# define PR_SME_SET_VL_ONEXEC (1 << 18) /* defer effect until exec */
#define PR_SME_GET_VL 64 /* get task vector length */
/* Bits common to PR_SME_SET_VL and PR_SME_GET_VL */
# define PR_SME_VL_LEN_MASK 0xffff
# define PR_SME_VL_INHERIT (1 << 17) /* inherit across exec */
#define PR_SET_VMA 0x53564d41
# define PR_SET_VMA_ANON_NAME 0

2
include/uapi/linux/rfkill.h
View file

@ -184,7 +184,7 @@ struct rfkill_event_ext {
#define RFKILL_IOC_NOINPUT 1
#define RFKILL_IOCTL_NOINPUT _IO(RFKILL_IOC_MAGIC, RFKILL_IOC_NOINPUT)
#define RFKILL_IOC_MAX_SIZE 2
#define RFKILL_IOCTL_MAX_SIZE _IOW(RFKILL_IOC_MAGIC, RFKILL_IOC_EXT_SIZE, __u32)
#define RFKILL_IOCTL_MAX_SIZE _IOW(RFKILL_IOC_MAGIC, RFKILL_IOC_MAX_SIZE, __u32)
/* and that's all userspace gets */

2
include/uapi/linux/seccomp.h
View file

@ -23,6 +23,8 @@
#define SECCOMP_FILTER_FLAG_SPEC_ALLOW (1UL << 2)
#define SECCOMP_FILTER_FLAG_NEW_LISTENER (1UL << 3)
#define SECCOMP_FILTER_FLAG_TSYNC_ESRCH (1UL << 4)
/* Received notifications wait in killable state (only respond to fatal signals) */
#define SECCOMP_FILTER_FLAG_WAIT_KILLABLE_RECV (1UL << 5)
/*
* All BPF programs must return a 32-bit value.

80
include/uapi/linux/sev-guest.h Normal file
View file

@ -0,0 +1,80 @@
/* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */
/*
* Userspace interface for AMD SEV and SNP guest driver.
*
* Copyright (C) 2021 Advanced Micro Devices, Inc.
*
* Author: Brijesh Singh <brijesh.singh@amd.com>
*
* SEV API specification is available at: https://developer.amd.com/sev/
*/
#ifndef __UAPI_LINUX_SEV_GUEST_H_
#define __UAPI_LINUX_SEV_GUEST_H_
#include <linux/types.h>
struct snp_report_req {
/* user data that should be included in the report */
__u8 user_data[64];
/* The vmpl level to be included in the report */
__u32 vmpl;
/* Must be zero filled */
__u8 rsvd[28];
};
struct snp_report_resp {
/* response data, see SEV-SNP spec for the format */
__u8 data[4000];
};
struct snp_derived_key_req {
__u32 root_key_select;
__u32 rsvd;
__u64 guest_field_select;
__u32 vmpl;
__u32 guest_svn;
__u64 tcb_version;
};
struct snp_derived_key_resp {
/* response data, see SEV-SNP spec for the format */
__u8 data[64];
};
struct snp_guest_request_ioctl {
/* message version number (must be non-zero) */
__u8 msg_version;
/* Request and response structure address */
__u64 req_data;
__u64 resp_data;
/* firmware error code on failure (see psp-sev.h) */
__u64 fw_err;
};
struct snp_ext_report_req {
struct snp_report_req data;
/* where to copy the certificate blob */
__u64 certs_address;
/* length of the certificate blob */
__u32 certs_len;
};
#define SNP_GUEST_REQ_IOC_TYPE 'S'
/* Get SNP attestation report */
#define SNP_GET_REPORT _IOWR(SNP_GUEST_REQ_IOC_TYPE, 0x0, struct snp_guest_request_ioctl)
/* Get a derived key from the root */
#define SNP_GET_DERIVED_KEY _IOWR(SNP_GUEST_REQ_IOC_TYPE, 0x1, struct snp_guest_request_ioctl)
/* Get SNP extended report as defined in the GHCB specification version 2. */
#define SNP_GET_EXT_REPORT _IOWR(SNP_GUEST_REQ_IOC_TYPE, 0x2, struct snp_guest_request_ioctl)
#endif /* __UAPI_LINUX_SEV_GUEST_H_ */

2
include/uapi/linux/socket.h
View file

@ -31,7 +31,7 @@ struct __kernel_sockaddr_storage {
#define SOCK_BUF_LOCK_MASK (SOCK_SNDBUF_LOCK | SOCK_RCVBUF_LOCK)
#define SOCK_TXREHASH_DEFAULT ((u8)-1)
#define SOCK_TXREHASH_DEFAULT 255
#define SOCK_TXREHASH_DISABLED 0
#define SOCK_TXREHASH_ENABLED 1

3
include/uapi/linux/spi/spi.h
View file

@ -27,6 +27,7 @@
#define SPI_TX_OCTAL _BITUL(13) /* transmit with 8 wires */
#define SPI_RX_OCTAL _BITUL(14) /* receive with 8 wires */
#define SPI_3WIRE_HIZ _BITUL(15) /* high impedance turnaround */
#define SPI_RX_CPHA_FLIP _BITUL(16) /* flip CPHA on Rx only xfer */
/*
* All the bits defined above should be covered by SPI_MODE_USER_MASK.
@ -36,6 +37,6 @@
* These bits must not overlap. A static assert check should make sure of that.
* If adding extra bits, make sure to increase the bit index below as well.
*/
#define SPI_MODE_USER_MASK (_BITUL(16) - 1)
#define SPI_MODE_USER_MASK (_BITUL(17) - 1)
#endif /* _UAPI_SPI_H */

28
include/uapi/linux/taskstats.h
View file

@ -34,7 +34,7 @@
*/
#define TASKSTATS_VERSION 11
#define TASKSTATS_VERSION 13
#define TS_COMM_LEN 32 /* should be >= TASK_COMM_LEN
* in linux/sched.h */
@ -48,7 +48,8 @@ struct taskstats {
__u32 ac_exitcode; /* Exit status */
/* The accounting flags of a task as defined in <linux/acct.h>
* Defined values are AFORK, ASU, ACOMPAT, ACORE, and AXSIG.
* Defined values are AFORK, ASU, ACOMPAT, ACORE, AXSIG, and AGROUP.
* (AGROUP since version 12).
*/
__u8 ac_flag; /* Record flags */
__u8 ac_nice; /* task_nice */
@ -173,9 +174,30 @@ struct taskstats {
/* v10: 64-bit btime to avoid overflow */
__u64 ac_btime64; /* 64-bit begin time */
/* Delay waiting for memory compact */
/* v11: Delay waiting for memory compact */
__u64 compact_count;
__u64 compact_delay_total;
/* v12 begin */
__u32 ac_tgid; /* thread group ID */
/* Thread group walltime up to now. This is total process walltime if
* AGROUP flag is set.
*/
__u64 ac_tgetime __attribute__((aligned(8)));
/* Lightweight information to identify process binary files.
* This leaves userspace to match this to a file system path, using
* MAJOR() and MINOR() macros to identify a device and mount point,
* the inode to identify the executable file. This is /proc/self/exe
* at the end, so matching the most recent exec(). Values are zero
* for kernel threads.
*/
__u64 ac_exe_dev; /* program binary device ID */
__u64 ac_exe_inode; /* program binary inode number */
/* v12 end */
/* v13: Delay waiting for write-protect copy */
__u64 wpcopy_count;
__u64 wpcopy_delay_total;
};

2
include/uapi/linux/tc_act/tc_skbedit.h
View file

@ -29,6 +29,7 @@
#define SKBEDIT_F_PTYPE 0x8
#define SKBEDIT_F_MASK 0x10
#define SKBEDIT_F_INHERITDSFIELD 0x20
#define SKBEDIT_F_TXQ_SKBHASH 0x40
struct tc_skbedit {
tc_gen;
@ -45,6 +46,7 @@ enum {
TCA_SKBEDIT_PTYPE,
TCA_SKBEDIT_MASK,
TCA_SKBEDIT_FLAGS,
TCA_SKBEDIT_QUEUE_MAPPING_MAX,
__TCA_SKBEDIT_MAX
};
#define TCA_SKBEDIT_MAX (__TCA_SKBEDIT_MAX - 1)

4
include/uapi/linux/tee.h
View file

@ -42,10 +42,6 @@
#define TEE_IOC_MAGIC 0xa4
#define TEE_IOC_BASE 0
/* Flags relating to shared memory */
#define TEE_IOCTL_SHM_MAPPED 0x1 /* memory mapped in normal world */
#define TEE_IOCTL_SHM_DMA_BUF 0x2 /* dma-buf handle on shared memory */
#define TEE_MAX_ARG_SIZE 1024
#define TEE_GEN_CAP_GP (1 << 0)/* GlobalPlatform compliant TEE */

28
include/uapi/linux/tipc_config.h
View file

@ -43,10 +43,6 @@
#include <linux/tipc.h>
#include <asm/byteorder.h>
#ifndef __KERNEL__
#include <arpa/inet.h> /* for ntohs etc. */
#endif
/*
* Configuration
*
@ -269,33 +265,33 @@ static inline int TLV_OK(const void *tlv, __u16 space)
*/
return (space >= TLV_SPACE(0)) &&
(ntohs(((struct tlv_desc *)tlv)->tlv_len) <= space);
(__be16_to_cpu(((struct tlv_desc *)tlv)->tlv_len) <= space);
}
static inline int TLV_CHECK(const void *tlv, __u16 space, __u16 exp_type)
{
return TLV_OK(tlv, space) &&
(ntohs(((struct tlv_desc *)tlv)->tlv_type) == exp_type);
(__be16_to_cpu(((struct tlv_desc *)tlv)->tlv_type) == exp_type);
}
static inline int TLV_GET_LEN(struct tlv_desc *tlv)
{
return ntohs(tlv->tlv_len);
return __be16_to_cpu(tlv->tlv_len);
}
static inline void TLV_SET_LEN(struct tlv_desc *tlv, __u16 len)
{
tlv->tlv_len = htons(len);
tlv->tlv_len = __cpu_to_be16(len);
}
static inline int TLV_CHECK_TYPE(struct tlv_desc *tlv, __u16 type)
{
return (ntohs(tlv->tlv_type) == type);
return (__be16_to_cpu(tlv->tlv_type) == type);
}
static inline void TLV_SET_TYPE(struct tlv_desc *tlv, __u16 type)
{
tlv->tlv_type = htons(type);
tlv->tlv_type = __cpu_to_be16(type);
}
static inline int TLV_SET(void *tlv, __u16 type, void *data, __u16 len)
@ -305,8 +301,8 @@ static inline int TLV_SET(void *tlv, __u16 type, void *data, __u16 len)
tlv_len = TLV_LENGTH(len);
tlv_ptr = (struct tlv_desc *)tlv;
tlv_ptr->tlv_type = htons(type);
tlv_ptr->tlv_len = htons(tlv_len);
tlv_ptr->tlv_type = __cpu_to_be16(type);
tlv_ptr->tlv_len = __cpu_to_be16(tlv_len);
if (len && data) {
memcpy(TLV_DATA(tlv_ptr), data, len);
memset((char *)TLV_DATA(tlv_ptr) + len, 0, TLV_SPACE(len) - tlv_len);
@ -348,7 +344,7 @@ static inline void *TLV_LIST_DATA(struct tlv_list_desc *list)
static inline void TLV_LIST_STEP(struct tlv_list_desc *list)
{
__u16 tlv_space = TLV_ALIGN(ntohs(list->tlv_ptr->tlv_len));
__u16 tlv_space = TLV_ALIGN(__be16_to_cpu(list->tlv_ptr->tlv_len));
list->tlv_ptr = (struct tlv_desc *)((char *)list->tlv_ptr + tlv_space);
list->tlv_space -= tlv_space;
@ -404,9 +400,9 @@ static inline int TCM_SET(void *msg, __u16 cmd, __u16 flags,
msg_len = TCM_LENGTH(data_len);
tcm_hdr = (struct tipc_cfg_msg_hdr *)msg;
tcm_hdr->tcm_len = htonl(msg_len);
tcm_hdr->tcm_type = htons(cmd);
tcm_hdr->tcm_flags = htons(flags);
tcm_hdr->tcm_len = __cpu_to_be32(msg_len);
tcm_hdr->tcm_type = __cpu_to_be16(cmd);
tcm_hdr->tcm_flags = __cpu_to_be16(flags);
if (data_len && data) {
memcpy(TCM_DATA(msg), data, data_len);
memset((char *)TCM_DATA(msg) + data_len, 0, TCM_SPACE(data_len) - msg_len);

2
include/uapi/linux/tls.h
View file

@ -39,6 +39,7 @@
/* TLS socket options */
#define TLS_TX 1 /* Set transmit parameters */
#define TLS_RX 2 /* Set receive parameters */
#define TLS_TX_ZEROCOPY_RO 3 /* TX zerocopy (only sendfile now) */
/* Supported versions */
#define TLS_VERSION_MINOR(ver) ((ver) & 0xFF)
@ -160,6 +161,7 @@ enum {
TLS_INFO_CIPHER,
TLS_INFO_TXCONF,
TLS_INFO_RXCONF,
TLS_INFO_ZC_RO_TX,
__TLS_INFO_MAX,
};
#define TLS_INFO_MAX (__TLS_INFO_MAX - 1)

3
include/uapi/linux/types.h
View file

@ -26,6 +26,9 @@
#define __bitwise
#endif
/* The kernel doesn't use this legacy form, but user space does */
#define __bitwise__ __bitwise
typedef __u16 __bitwise __le16;
typedef __u16 __bitwise __be16;
typedef __u32 __bitwise __le32;

10
include/uapi/linux/userfaultfd.h
View file

@ -33,7 +33,8 @@
UFFD_FEATURE_THREAD_ID | \
UFFD_FEATURE_MINOR_HUGETLBFS | \
UFFD_FEATURE_MINOR_SHMEM | \
UFFD_FEATURE_EXACT_ADDRESS)
UFFD_FEATURE_EXACT_ADDRESS | \
UFFD_FEATURE_WP_HUGETLBFS_SHMEM)
#define UFFD_API_IOCTLS \
((__u64)1 << _UFFDIO_REGISTER | \
(__u64)1 << _UFFDIO_UNREGISTER | \
@ -47,7 +48,8 @@
#define UFFD_API_RANGE_IOCTLS_BASIC \
((__u64)1 << _UFFDIO_WAKE | \
(__u64)1 << _UFFDIO_COPY | \
(__u64)1 << _UFFDIO_CONTINUE)
(__u64)1 << _UFFDIO_CONTINUE | \
(__u64)1 << _UFFDIO_WRITEPROTECT)
/*
* Valid ioctl command number range with this API is from 0x00 to
@ -194,6 +196,9 @@ struct uffdio_api {
* UFFD_FEATURE_EXACT_ADDRESS indicates that the exact address of page
* faults would be provided and the offset within the page would not be
* masked.
*
* UFFD_FEATURE_WP_HUGETLBFS_SHMEM indicates that userfaultfd
* write-protection mode is supported on both shmem and hugetlbfs.
*/
#define UFFD_FEATURE_PAGEFAULT_FLAG_WP (1<<0)
#define UFFD_FEATURE_EVENT_FORK (1<<1)
@ -207,6 +212,7 @@ struct uffdio_api {
#define UFFD_FEATURE_MINOR_HUGETLBFS (1<<9)
#define UFFD_FEATURE_MINOR_SHMEM (1<<10)
#define UFFD_FEATURE_EXACT_ADDRESS (1<<11)
#define UFFD_FEATURE_WP_HUGETLBFS_SHMEM (1<<12)
__u64 features;
__u64 ioctls;

5
include/uapi/linux/v4l2-controls.h
View file

@ -449,6 +449,11 @@ enum v4l2_mpeg_video_multi_slice_mode {
#define V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES (V4L2_CID_CODEC_BASE+234)
#define V4L2_CID_MPEG_VIDEO_DEC_CONCEAL_COLOR (V4L2_CID_CODEC_BASE+235)
#define V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD (V4L2_CID_CODEC_BASE+236)
#define V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE (V4L2_CID_CODEC_BASE+237)
enum v4l2_mpeg_video_intra_refresh_period_type {
V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM = 0,
V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_CYCLIC = 1,
};
/* CIDs for the MPEG-2 Part 2 (H.262) codec */
#define V4L2_CID_MPEG_VIDEO_MPEG2_LEVEL (V4L2_CID_CODEC_BASE+270)

6
include/uapi/linux/vdpa.h
View file

@ -18,6 +18,7 @@ enum vdpa_command {
VDPA_CMD_DEV_DEL,
VDPA_CMD_DEV_GET, /* can dump */
VDPA_CMD_DEV_CONFIG_GET, /* can dump */
VDPA_CMD_DEV_VSTATS_GET,
};
enum vdpa_attr {
@ -46,6 +47,11 @@ enum vdpa_attr {
VDPA_ATTR_DEV_NEGOTIATED_FEATURES, /* u64 */
VDPA_ATTR_DEV_MGMTDEV_MAX_VQS, /* u32 */
VDPA_ATTR_DEV_SUPPORTED_FEATURES, /* u64 */
VDPA_ATTR_DEV_QUEUE_INDEX, /* u32 */
VDPA_ATTR_DEV_VENDOR_ATTR_NAME, /* string */
VDPA_ATTR_DEV_VENDOR_ATTR_VALUE, /* u64 */
/* new attributes must be added above here */
VDPA_ATTR_MAX,
};

4
include/uapi/linux/vfio.h
View file

@ -643,7 +643,7 @@ enum {
};
/**
* VFIO_DEVICE_GET_PCI_HOT_RESET_INFO - _IORW(VFIO_TYPE, VFIO_BASE + 12,
* VFIO_DEVICE_GET_PCI_HOT_RESET_INFO - _IOWR(VFIO_TYPE, VFIO_BASE + 12,
* struct vfio_pci_hot_reset_info)
*
* Return: 0 on success, -errno on failure:
@ -770,7 +770,7 @@ struct vfio_device_ioeventfd {
#define VFIO_DEVICE_IOEVENTFD _IO(VFIO_TYPE, VFIO_BASE + 16)
/**
* VFIO_DEVICE_FEATURE - _IORW(VFIO_TYPE, VFIO_BASE + 17,
* VFIO_DEVICE_FEATURE - _IOWR(VFIO_TYPE, VFIO_BASE + 17,
* struct vfio_device_feature)
*
* Get, set, or probe feature data of the device. The feature is selected

26
include/uapi/linux/vhost.h
View file

@ -89,11 +89,6 @@
/* Set or get vhost backend capability */
/* Use message type V2 */
#define VHOST_BACKEND_F_IOTLB_MSG_V2 0x1
/* IOTLB can accept batching hints */
#define VHOST_BACKEND_F_IOTLB_BATCH 0x2
#define VHOST_SET_BACKEND_FEATURES _IOW(VHOST_VIRTIO, 0x25, __u64)
#define VHOST_GET_BACKEND_FEATURES _IOR(VHOST_VIRTIO, 0x26, __u64)
@ -150,11 +145,30 @@
/* Get the valid iova range */
#define VHOST_VDPA_GET_IOVA_RANGE _IOR(VHOST_VIRTIO, 0x78, \
struct vhost_vdpa_iova_range)
/* Get the config size */
#define VHOST_VDPA_GET_CONFIG_SIZE _IOR(VHOST_VIRTIO, 0x79, __u32)
/* Get the count of all virtqueues */
#define VHOST_VDPA_GET_VQS_COUNT _IOR(VHOST_VIRTIO, 0x80, __u32)
/* Get the number of virtqueue groups. */
#define VHOST_VDPA_GET_GROUP_NUM _IOR(VHOST_VIRTIO, 0x81, __u32)
/* Get the number of address spaces. */
#define VHOST_VDPA_GET_AS_NUM _IOR(VHOST_VIRTIO, 0x7A, unsigned int)
/* Get the group for a virtqueue: read index, write group in num,
* The virtqueue index is stored in the index field of
* vhost_vring_state. The group for this specific virtqueue is
* returned via num field of vhost_vring_state.
*/
#define VHOST_VDPA_GET_VRING_GROUP _IOWR(VHOST_VIRTIO, 0x7B, \
struct vhost_vring_state)
/* Set the ASID for a virtqueue group. The group index is stored in
* the index field of vhost_vring_state, the ASID associated with this
* group is stored at num field of vhost_vring_state.
*/
#define VHOST_VDPA_SET_GROUP_ASID _IOW(VHOST_VIRTIO, 0x7C, \
struct vhost_vring_state)
#endif

11
include/uapi/linux/vhost_types.h
View file

@ -87,7 +87,7 @@ struct vhost_msg {
struct vhost_msg_v2 {
__u32 type;
__u32 reserved;
__u32 asid;
union {
struct vhost_iotlb_msg iotlb;
__u8 padding[64];
@ -153,4 +153,13 @@ struct vhost_vdpa_iova_range {
/* vhost-net should add virtio_net_hdr for RX, and strip for TX packets. */
#define VHOST_NET_F_VIRTIO_NET_HDR 27
/* Use message type V2 */
#define VHOST_BACKEND_F_IOTLB_MSG_V2 0x1
/* IOTLB can accept batching hints */
#define VHOST_BACKEND_F_IOTLB_BATCH 0x2
/* IOTLB can accept address space identifier through V2 type of IOTLB
* message
*/
#define VHOST_BACKEND_F_IOTLB_ASID 0x3
#endif

5
include/uapi/linux/videodev2.h
View file

@ -569,6 +569,7 @@ struct v4l2_pix_format {
/* Grey bit-packed formats */
#define V4L2_PIX_FMT_Y10BPACK v4l2_fourcc('Y', '1', '0', 'B') /* 10 Greyscale bit-packed */
#define V4L2_PIX_FMT_Y10P v4l2_fourcc('Y', '1', '0', 'P') /* 10 Greyscale, MIPI RAW10 packed */
#define V4L2_PIX_FMT_IPU3_Y10 v4l2_fourcc('i', 'p', '3', 'y') /* IPU3 packed 10-bit greyscale */
/* Palette formats */
#define V4L2_PIX_FMT_PAL8 v4l2_fourcc('P', 'A', 'L', '8') /* 8 8-bit palette */
@ -746,8 +747,10 @@ struct v4l2_pix_format {
#define V4L2_PIX_FMT_INZI v4l2_fourcc('I', 'N', 'Z', 'I') /* Intel Planar Greyscale 10-bit and Depth 16-bit */
#define V4L2_PIX_FMT_CNF4 v4l2_fourcc('C', 'N', 'F', '4') /* Intel 4-bit packed depth confidence information */
#define V4L2_PIX_FMT_HI240 v4l2_fourcc('H', 'I', '2', '4') /* BTTV 8-bit dithered RGB */
#define V4L2_PIX_FMT_QC08C v4l2_fourcc('Q', '0', '8', 'C') /* Qualcomm 8-bit compressed */
#define V4L2_PIX_FMT_QC10C v4l2_fourcc('Q', '1', '0', 'C') /* Qualcomm 10-bit compressed */
/* 10bit raw bayer packed, 32 bytes for every 25 pixels, last LSB 6 bits unused */
/* 10bit raw packed, 32 bytes for every 25 pixels, last LSB 6 bits unused */
#define V4L2_PIX_FMT_IPU3_SBGGR10 v4l2_fourcc('i', 'p', '3', 'b') /* IPU3 packed 10-bit BGGR bayer */
#define V4L2_PIX_FMT_IPU3_SGBRG10 v4l2_fourcc('i', 'p', '3', 'g') /* IPU3 packed 10-bit GBRG bayer */
#define V4L2_PIX_FMT_IPU3_SGRBG10 v4l2_fourcc('i', 'p', '3', 'G') /* IPU3 packed 10-bit GRBG bayer */

14
include/uapi/linux/virtio_ids.h
View file

@ -73,12 +73,12 @@
* Virtio Transitional IDs
*/
#define VIRTIO_TRANS_ID_NET 1000 /* transitional virtio net */
#define VIRTIO_TRANS_ID_BLOCK 1001 /* transitional virtio block */
#define VIRTIO_TRANS_ID_BALLOON 1002 /* transitional virtio balloon */
#define VIRTIO_TRANS_ID_CONSOLE 1003 /* transitional virtio console */
#define VIRTIO_TRANS_ID_SCSI 1004 /* transitional virtio SCSI */
#define VIRTIO_TRANS_ID_RNG 1005 /* transitional virtio rng */
#define VIRTIO_TRANS_ID_9P 1009 /* transitional virtio 9p console */
#define VIRTIO_TRANS_ID_NET 0x1000 /* transitional virtio net */
#define VIRTIO_TRANS_ID_BLOCK 0x1001 /* transitional virtio block */
#define VIRTIO_TRANS_ID_BALLOON 0x1002 /* transitional virtio balloon */
#define VIRTIO_TRANS_ID_CONSOLE 0x1003 /* transitional virtio console */
#define VIRTIO_TRANS_ID_SCSI 0x1004 /* transitional virtio SCSI */
#define VIRTIO_TRANS_ID_RNG 0x1005 /* transitional virtio rng */
#define VIRTIO_TRANS_ID_9P 0x1009 /* transitional virtio 9p console */
#endif /* _LINUX_VIRTIO_IDS_H */

85
include/uapi/misc/habanalabs.h
View file

@ -348,33 +348,41 @@ enum hl_server_type {
* The address which accessing it caused the razwi.
* Razwi initiator.
* Razwi cause, was it a page fault or MMU access error.
* HL_INFO_DEV_MEM_ALLOC_PAGE_SIZES - Retrieve valid page sizes for device memory allocation
* HL_INFO_REGISTER_EVENTFD - Register eventfd for event notifications.
* HL_INFO_UNREGISTER_EVENTFD - Unregister eventfd
* HL_INFO_GET_EVENTS - Retrieve the last occurred events
*/
#define HL_INFO_HW_IP_INFO 0
#define HL_INFO_HW_EVENTS 1
#define HL_INFO_DRAM_USAGE 2
#define HL_INFO_HW_IDLE 3
#define HL_INFO_DEVICE_STATUS 4
#define HL_INFO_DEVICE_UTILIZATION 6
#define HL_INFO_HW_EVENTS_AGGREGATE 7
#define HL_INFO_CLK_RATE 8
#define HL_INFO_RESET_COUNT 9
#define HL_INFO_TIME_SYNC 10
#define HL_INFO_CS_COUNTERS 11
#define HL_INFO_PCI_COUNTERS 12
#define HL_INFO_CLK_THROTTLE_REASON 13
#define HL_INFO_SYNC_MANAGER 14
#define HL_INFO_TOTAL_ENERGY 15
#define HL_INFO_PLL_FREQUENCY 16
#define HL_INFO_POWER 17
#define HL_INFO_OPEN_STATS 18
#define HL_INFO_DRAM_REPLACED_ROWS 21
#define HL_INFO_DRAM_PENDING_ROWS 22
#define HL_INFO_LAST_ERR_OPEN_DEV_TIME 23
#define HL_INFO_CS_TIMEOUT_EVENT 24
#define HL_INFO_RAZWI_EVENT 25
#define HL_INFO_HW_IP_INFO 0
#define HL_INFO_HW_EVENTS 1
#define HL_INFO_DRAM_USAGE 2
#define HL_INFO_HW_IDLE 3
#define HL_INFO_DEVICE_STATUS 4
#define HL_INFO_DEVICE_UTILIZATION 6
#define HL_INFO_HW_EVENTS_AGGREGATE 7
#define HL_INFO_CLK_RATE 8
#define HL_INFO_RESET_COUNT 9
#define HL_INFO_TIME_SYNC 10
#define HL_INFO_CS_COUNTERS 11
#define HL_INFO_PCI_COUNTERS 12
#define HL_INFO_CLK_THROTTLE_REASON 13
#define HL_INFO_SYNC_MANAGER 14
#define HL_INFO_TOTAL_ENERGY 15
#define HL_INFO_PLL_FREQUENCY 16
#define HL_INFO_POWER 17
#define HL_INFO_OPEN_STATS 18
#define HL_INFO_DRAM_REPLACED_ROWS 21
#define HL_INFO_DRAM_PENDING_ROWS 22
#define HL_INFO_LAST_ERR_OPEN_DEV_TIME 23
#define HL_INFO_CS_TIMEOUT_EVENT 24
#define HL_INFO_RAZWI_EVENT 25
#define HL_INFO_DEV_MEM_ALLOC_PAGE_SIZES 26
#define HL_INFO_REGISTER_EVENTFD 28
#define HL_INFO_UNREGISTER_EVENTFD 29
#define HL_INFO_GET_EVENTS 30
#define HL_INFO_VERSION_MAX_LEN 128
#define HL_INFO_CARD_NAME_MAX_LEN 16
#define HL_INFO_VERSION_MAX_LEN 128
#define HL_INFO_CARD_NAME_MAX_LEN 16
/**
* struct hl_info_hw_ip_info - hardware information on various IPs in the ASIC
@ -409,6 +417,7 @@ enum hl_server_type {
* @dram_page_size: The DRAM physical page size.
* @number_of_user_interrupts: The number of interrupts that are available to the userspace
* application to use. Relevant for Gaudi2 and later.
* @device_mem_alloc_default_page_size: default page size used in device memory allocation.
*/
struct hl_info_hw_ip_info {
__u64 sram_base_address;
@ -436,6 +445,8 @@ struct hl_info_hw_ip_info {
__u32 reserved3;
__u16 number_of_user_interrupts;
__u16 pad2;
__u64 reserved4;
__u64 device_mem_alloc_default_page_size;
};
struct hl_info_dram_usage {
@ -538,10 +549,15 @@ struct hl_pll_frequency_info {
* struct hl_open_stats_info - device open statistics information
* @open_counter: ever growing counter, increased on each successful dev open
* @last_open_period_ms: duration (ms) device was open last time
* @is_compute_ctx_active: Whether there is an active compute context executing
* @compute_ctx_in_release: true if the current compute context is being released
*/
struct hl_open_stats_info {
__u64 open_counter;
__u64 last_open_period_ms;
__u8 is_compute_ctx_active;
__u8 compute_ctx_in_release;
__u8 pad[6];
};
/**
@ -640,6 +656,15 @@ struct hl_info_razwi_event {
__u8 pad[2];
};
/**
* struct hl_info_dev_memalloc_page_sizes - valid page sizes in device mem alloc information.
* @page_order_bitmask: bitmap in which a set bit represents the order of the supported page size
* (e.g. 0x2100000 means that 1MB and 32MB pages are supported).
*/
struct hl_info_dev_memalloc_page_sizes {
__u64 page_order_bitmask;
};
enum gaudi_dcores {
HL_GAUDI_WS_DCORE,
HL_GAUDI_WN_DCORE,
@ -660,6 +685,7 @@ enum gaudi_dcores {
* @period_ms: Period value, in milliseconds, for utilization rate in range 100ms - 1000ms in 100 ms
* resolution. Currently not in use.
* @pll_index: Index as defined in hl_<asic type>_pll_index enumeration.
* @eventfd: event file descriptor for event notifications.
* @pad: Padding to 64 bit.
*/
struct hl_info_args {
@ -672,6 +698,7 @@ struct hl_info_args {
__u32 ctx_id;
__u32 period_ms;
__u32 pll_index;
__u32 eventfd;
};
__u32 pad;
@ -1115,6 +1142,7 @@ union hl_wait_cs_args {
#define HL_MEM_SHARED 0x2
#define HL_MEM_USERPTR 0x4
#define HL_MEM_FORCE_HINT 0x8
#define HL_MEM_PREFETCH 0x40
/**
* structure hl_mem_in - structure that handle input args for memory IOCTL
@ -1370,6 +1398,13 @@ struct hl_debug_args {
__u32 ctx_id;
};
/*
* Notifier event values - for the notification mechanism and the HL_INFO_GET_EVENTS command
*
* HL_NOTIFIER_EVENT_TPC_ASSERT - Indicates TPC assert event
*/
#define HL_NOTIFIER_EVENT_TPC_ASSERT (1 << 0)
/*
* Various information operations such as:
* - H/W IP information

42
include/uapi/rdma/ib_user_verbs.h
View file

@ -1298,4 +1298,46 @@ struct ib_uverbs_ex_modify_cq {
#define IB_DEVICE_NAME_MAX 64
/*
* bits 9, 15, 16, 19, 22, 27, 30, 31, 32, 33, 35 and 37 may be set by old
* kernels and should not be used.
*/
enum ib_uverbs_device_cap_flags {
IB_UVERBS_DEVICE_RESIZE_MAX_WR = 1 << 0,
IB_UVERBS_DEVICE_BAD_PKEY_CNTR = 1 << 1,
IB_UVERBS_DEVICE_BAD_QKEY_CNTR = 1 << 2,
IB_UVERBS_DEVICE_RAW_MULTI = 1 << 3,
IB_UVERBS_DEVICE_AUTO_PATH_MIG = 1 << 4,
IB_UVERBS_DEVICE_CHANGE_PHY_PORT = 1 << 5,
IB_UVERBS_DEVICE_UD_AV_PORT_ENFORCE = 1 << 6,
IB_UVERBS_DEVICE_CURR_QP_STATE_MOD = 1 << 7,
IB_UVERBS_DEVICE_SHUTDOWN_PORT = 1 << 8,
/* IB_UVERBS_DEVICE_INIT_TYPE = 1 << 9, (not in use) */
IB_UVERBS_DEVICE_PORT_ACTIVE_EVENT = 1 << 10,
IB_UVERBS_DEVICE_SYS_IMAGE_GUID = 1 << 11,
IB_UVERBS_DEVICE_RC_RNR_NAK_GEN = 1 << 12,
IB_UVERBS_DEVICE_SRQ_RESIZE = 1 << 13,
IB_UVERBS_DEVICE_N_NOTIFY_CQ = 1 << 14,
IB_UVERBS_DEVICE_MEM_WINDOW = 1 << 17,
IB_UVERBS_DEVICE_UD_IP_CSUM = 1 << 18,
IB_UVERBS_DEVICE_XRC = 1 << 20,
IB_UVERBS_DEVICE_MEM_MGT_EXTENSIONS = 1 << 21,
IB_UVERBS_DEVICE_MEM_WINDOW_TYPE_2A = 1 << 23,
IB_UVERBS_DEVICE_MEM_WINDOW_TYPE_2B = 1 << 24,
IB_UVERBS_DEVICE_RC_IP_CSUM = 1 << 25,
/* Deprecated. Please use IB_UVERBS_RAW_PACKET_CAP_IP_CSUM. */
IB_UVERBS_DEVICE_RAW_IP_CSUM = 1 << 26,
IB_UVERBS_DEVICE_MANAGED_FLOW_STEERING = 1 << 29,
/* Deprecated. Please use IB_UVERBS_RAW_PACKET_CAP_SCATTER_FCS. */
IB_UVERBS_DEVICE_RAW_SCATTER_FCS = 1ULL << 34,
IB_UVERBS_DEVICE_PCI_WRITE_END_PADDING = 1ULL << 36,
};
enum ib_uverbs_raw_packet_caps {
IB_UVERBS_RAW_PACKET_CAP_CVLAN_STRIPPING = 1 << 0,
IB_UVERBS_RAW_PACKET_CAP_SCATTER_FCS = 1 << 1,
IB_UVERBS_RAW_PACKET_CAP_IP_CSUM = 1 << 2,
IB_UVERBS_RAW_PACKET_CAP_DELAY_DROP = 1 << 3,
};
#endif /* IB_USER_VERBS_H */

582
include/uapi/scsi/scsi_bsg_mpi3mr.h Normal file
View file

@ -0,0 +1,582 @@
/* SPDX-License-Identifier: GPL-2.0-or-later WITH Linux-syscall-note */
/*
* Driver for Broadcom MPI3 Storage Controllers
*
* Copyright (C) 2017-2022 Broadcom Inc.
* (mailto: mpi3mr-linuxdrv.pdl@broadcom.com)
*
*/
#ifndef SCSI_BSG_MPI3MR_H_INCLUDED
#define SCSI_BSG_MPI3MR_H_INCLUDED
#include <linux/types.h>
/* Definitions for BSG commands */
#define MPI3MR_IOCTL_VERSION 0x06
#define MPI3MR_APP_DEFAULT_TIMEOUT (60) /*seconds*/
#define MPI3MR_BSG_ADPTYPE_UNKNOWN 0
#define MPI3MR_BSG_ADPTYPE_AVGFAMILY 1
#define MPI3MR_BSG_ADPSTATE_UNKNOWN 0
#define MPI3MR_BSG_ADPSTATE_OPERATIONAL 1
#define MPI3MR_BSG_ADPSTATE_FAULT 2
#define MPI3MR_BSG_ADPSTATE_IN_RESET 3
#define MPI3MR_BSG_ADPSTATE_UNRECOVERABLE 4
#define MPI3MR_BSG_ADPRESET_UNKNOWN 0
#define MPI3MR_BSG_ADPRESET_SOFT 1
#define MPI3MR_BSG_ADPRESET_DIAG_FAULT 2
#define MPI3MR_BSG_LOGDATA_MAX_ENTRIES 400
#define MPI3MR_BSG_LOGDATA_ENTRY_HEADER_SZ 4
#define MPI3MR_DRVBSG_OPCODE_UNKNOWN 0
#define MPI3MR_DRVBSG_OPCODE_ADPINFO 1
#define MPI3MR_DRVBSG_OPCODE_ADPRESET 2
#define MPI3MR_DRVBSG_OPCODE_ALLTGTDEVINFO 4
#define MPI3MR_DRVBSG_OPCODE_GETCHGCNT 5
#define MPI3MR_DRVBSG_OPCODE_LOGDATAENABLE 6
#define MPI3MR_DRVBSG_OPCODE_PELENABLE 7
#define MPI3MR_DRVBSG_OPCODE_GETLOGDATA 8
#define MPI3MR_DRVBSG_OPCODE_QUERY_HDB 9
#define MPI3MR_DRVBSG_OPCODE_REPOST_HDB 10
#define MPI3MR_DRVBSG_OPCODE_UPLOAD_HDB 11
#define MPI3MR_DRVBSG_OPCODE_REFRESH_HDB_TRIGGERS 12
#define MPI3MR_BSG_BUFTYPE_UNKNOWN 0
#define MPI3MR_BSG_BUFTYPE_RAIDMGMT_CMD 1
#define MPI3MR_BSG_BUFTYPE_RAIDMGMT_RESP 2
#define MPI3MR_BSG_BUFTYPE_DATA_IN 3
#define MPI3MR_BSG_BUFTYPE_DATA_OUT 4
#define MPI3MR_BSG_BUFTYPE_MPI_REPLY 5
#define MPI3MR_BSG_BUFTYPE_ERR_RESPONSE 6
#define MPI3MR_BSG_BUFTYPE_MPI_REQUEST 0xFE
#define MPI3MR_BSG_MPI_REPLY_BUFTYPE_UNKNOWN 0
#define MPI3MR_BSG_MPI_REPLY_BUFTYPE_STATUS 1
#define MPI3MR_BSG_MPI_REPLY_BUFTYPE_ADDRESS 2
#define MPI3MR_HDB_BUFTYPE_UNKNOWN 0
#define MPI3MR_HDB_BUFTYPE_TRACE 1
#define MPI3MR_HDB_BUFTYPE_FIRMWARE 2
#define MPI3MR_HDB_BUFTYPE_RESERVED 3
#define MPI3MR_HDB_BUFSTATUS_UNKNOWN 0
#define MPI3MR_HDB_BUFSTATUS_NOT_ALLOCATED 1
#define MPI3MR_HDB_BUFSTATUS_POSTED_UNPAUSED 2
#define MPI3MR_HDB_BUFSTATUS_POSTED_PAUSED 3
#define MPI3MR_HDB_BUFSTATUS_RELEASED 4
#define MPI3MR_HDB_TRIGGER_TYPE_UNKNOWN 0
#define MPI3MR_HDB_TRIGGER_TYPE_DIAGFAULT 1
#define MPI3MR_HDB_TRIGGER_TYPE_ELEMENT 2
#define MPI3MR_HDB_TRIGGER_TYPE_MASTER 3
/* Supported BSG commands */
enum command {
MPI3MR_DRV_CMD = 1,
MPI3MR_MPT_CMD = 2,
};
/**
* struct mpi3_driver_info_layout - Information about driver
*
* @information_length: Length of this structure in bytes
* @driver_signature: Driver Vendor name
* @os_name: Operating System Name
* @driver_name: Driver name
* @driver_version: Driver version
* @driver_release_date: Driver release date
* @driver_capabilities: Driver capabilities
*/
struct mpi3_driver_info_layout {
__le32 information_length;
__u8 driver_signature[12];
__u8 os_name[16];
__u8 os_version[12];
__u8 driver_name[20];
__u8 driver_version[32];
__u8 driver_release_date[20];
__le32 driver_capabilities;
};
/**
* struct mpi3mr_bsg_in_adpinfo - Adapter information request
* data returned by the driver.
*
* @adp_type: Adapter type
* @rsvd1: Reserved
* @pci_dev_id: PCI device ID of the adapter
* @pci_dev_hw_rev: PCI revision of the adapter
* @pci_subsys_dev_id: PCI subsystem device ID of the adapter
* @pci_subsys_ven_id: PCI subsystem vendor ID of the adapter
* @pci_dev: PCI device
* @pci_func: PCI function
* @pci_bus: PCI bus
* @rsvd2: Reserved
* @pci_seg_id: PCI segment ID
* @app_intfc_ver: version of the application interface definition
* @rsvd3: Reserved
* @rsvd4: Reserved
* @rsvd5: Reserved
* @driver_info: Driver Information (Version/Name)
*/
struct mpi3mr_bsg_in_adpinfo {
__u32 adp_type;
__u32 rsvd1;
__u32 pci_dev_id;
__u32 pci_dev_hw_rev;
__u32 pci_subsys_dev_id;
__u32 pci_subsys_ven_id;
__u32 pci_dev:5;
__u32 pci_func:3;
__u32 pci_bus:8;
__u16 rsvd2;
__u32 pci_seg_id;
__u32 app_intfc_ver;
__u8 adp_state;
__u8 rsvd3;
__u16 rsvd4;
__u32 rsvd5[2];
struct mpi3_driver_info_layout driver_info;
};
/**
* struct mpi3mr_bsg_adp_reset - Adapter reset request
* payload data to the driver.
*
* @reset_type: Reset type
* @rsvd1: Reserved
* @rsvd2: Reserved
*/
struct mpi3mr_bsg_adp_reset {
__u8 reset_type;
__u8 rsvd1;
__u16 rsvd2;
};
/**
* struct mpi3mr_change_count - Topology change count
* returned by the driver.
*
* @change_count: Topology change count
* @rsvd: Reserved
*/
struct mpi3mr_change_count {
__u16 change_count;
__u16 rsvd;
};
/**
* struct mpi3mr_device_map_info - Target device mapping
* information
*
* @handle: Firmware device handle
* @perst_id: Persistent ID assigned by the firmware
* @target_id: Target ID assigned by the driver
* @bus_id: Bus ID assigned by the driver
* @rsvd1: Reserved
* @rsvd2: Reserved
*/
struct mpi3mr_device_map_info {
__u16 handle;
__u16 perst_id;
__u32 target_id;
__u8 bus_id;
__u8 rsvd1;
__u16 rsvd2;
};
/**
* struct mpi3mr_all_tgt_info - Target device mapping
* information returned by the driver
*
* @num_devices: The number of devices in driver's inventory
* @rsvd1: Reserved
* @rsvd2: Reserved
* @dmi: Variable length array of mapping information of targets
*/
struct mpi3mr_all_tgt_info {
__u16 num_devices;
__u16 rsvd1;
__u32 rsvd2;
struct mpi3mr_device_map_info dmi[1];
};
/**
* struct mpi3mr_logdata_enable - Number of log data
* entries saved by the driver returned as payload data for
* enable logdata BSG request by the driver.
*
* @max_entries: Number of log data entries cached by the driver
* @rsvd: Reserved
*/
struct mpi3mr_logdata_enable {
__u16 max_entries;
__u16 rsvd;
};
/**
* struct mpi3mr_bsg_out_pel_enable - PEL enable request payload
* data to the driver.
*
* @pel_locale: PEL locale to the firmware
* @pel_class: PEL class to the firmware
* @rsvd: Reserved
*/
struct mpi3mr_bsg_out_pel_enable {
__u16 pel_locale;
__u8 pel_class;
__u8 rsvd;
};
/**
* struct mpi3mr_logdata_entry - Log data entry cached by the
* driver.
*
* @valid_entry: Is the entry valid
* @rsvd1: Reserved
* @rsvd2: Reserved
* @data: Variable length Log entry data
*/
struct mpi3mr_logdata_entry {
__u8 valid_entry;
__u8 rsvd1;
__u16 rsvd2;
__u8 data[1]; /* Variable length Array */
};
/**
* struct mpi3mr_bsg_in_log_data - Log data entries saved by
* the driver returned as payload data for Get logdata request
* by the driver.
*
* @entry: Variable length Log data entry array
*/
struct mpi3mr_bsg_in_log_data {
struct mpi3mr_logdata_entry entry[1];
};
/**
* struct mpi3mr_hdb_entry - host diag buffer entry.
*
* @buf_type: Buffer type
* @status: Buffer status
* @trigger_type: Trigger type
* @rsvd1: Reserved
* @size: Buffer size
* @rsvd2: Reserved
* @trigger_data: Trigger specific data
* @rsvd3: Reserved
* @rsvd4: Reserved
*/
struct mpi3mr_hdb_entry {
__u8 buf_type;
__u8 status;
__u8 trigger_type;
__u8 rsvd1;
__u16 size;
__u16 rsvd2;
__u64 trigger_data;
__u32 rsvd3;
__u32 rsvd4;
};
/**
* struct mpi3mr_bsg_in_hdb_status - This structure contains
* return data for the BSG request to retrieve the number of host
* diagnostic buffers supported by the driver and their current
* status and additional status specific data if any in forms of
* multiple hdb entries.
*
* @num_hdb_types: Number of host diag buffer types supported
* @rsvd1: Reserved
* @rsvd2: Reserved
* @rsvd3: Reserved
* @entry: Variable length Diag buffer status entry array
*/
struct mpi3mr_bsg_in_hdb_status {
__u8 num_hdb_types;
__u8 rsvd1;
__u16 rsvd2;
__u32 rsvd3;
struct mpi3mr_hdb_entry entry[1];
};
/**
* struct mpi3mr_bsg_out_repost_hdb - Repost host diagnostic
* buffer request payload data to the driver.
*
* @buf_type: Buffer type
* @rsvd1: Reserved
* @rsvd2: Reserved
*/
struct mpi3mr_bsg_out_repost_hdb {
__u8 buf_type;
__u8 rsvd1;
__u16 rsvd2;
};
/**
* struct mpi3mr_bsg_out_upload_hdb - Upload host diagnostic
* buffer request payload data to the driver.
*
* @buf_type: Buffer type
* @rsvd1: Reserved
* @rsvd2: Reserved
* @start_offset: Start offset of the buffer from where to copy
* @length: Length of the buffer to copy
*/
struct mpi3mr_bsg_out_upload_hdb {
__u8 buf_type;
__u8 rsvd1;
__u16 rsvd2;
__u32 start_offset;
__u32 length;
};
/**
* struct mpi3mr_bsg_out_refresh_hdb_triggers - Refresh host
* diagnostic buffer triggers request payload data to the driver.
*
* @page_type: Page type
* @rsvd1: Reserved
* @rsvd2: Reserved
*/
struct mpi3mr_bsg_out_refresh_hdb_triggers {
__u8 page_type;
__u8 rsvd1;
__u16 rsvd2;
};
/**
* struct mpi3mr_bsg_drv_cmd - Generic bsg data
* structure for all driver specific requests.
*
* @mrioc_id: Controller ID
* @opcode: Driver specific opcode
* @rsvd1: Reserved
* @rsvd2: Reserved
*/
struct mpi3mr_bsg_drv_cmd {
__u8 mrioc_id;
__u8 opcode;
__u16 rsvd1;
__u32 rsvd2[4];
};
/**
* struct mpi3mr_bsg_in_reply_buf - MPI reply buffer returned
* for MPI Passthrough request .
*
* @mpi_reply_type: Type of MPI reply
* @rsvd1: Reserved
* @rsvd2: Reserved
* @reply_buf: Variable Length buffer based on mpirep type
*/
struct mpi3mr_bsg_in_reply_buf {
__u8 mpi_reply_type;
__u8 rsvd1;
__u16 rsvd2;
__u8 reply_buf[1];
};
/**
* struct mpi3mr_buf_entry - User buffer descriptor for MPI
* Passthrough requests.
*
* @buf_type: Buffer type
* @rsvd1: Reserved
* @rsvd2: Reserved
* @buf_len: Buffer length
*/
struct mpi3mr_buf_entry {
__u8 buf_type;
__u8 rsvd1;
__u16 rsvd2;
__u32 buf_len;
};
/**
* struct mpi3mr_bsg_buf_entry_list - list of user buffer
* descriptor for MPI Passthrough requests.
*
* @num_of_entries: Number of buffer descriptors
* @rsvd1: Reserved
* @rsvd2: Reserved
* @rsvd3: Reserved
* @buf_entry: Variable length array of buffer descriptors
*/
struct mpi3mr_buf_entry_list {
__u8 num_of_entries;
__u8 rsvd1;
__u16 rsvd2;
__u32 rsvd3;
struct mpi3mr_buf_entry buf_entry[1];
};
/**
* struct mpi3mr_bsg_mptcmd - Generic bsg data
* structure for all MPI Passthrough requests .
*
* @mrioc_id: Controller ID
* @rsvd1: Reserved
* @timeout: MPI request timeout
* @buf_entry_list: Buffer descriptor list
*/
struct mpi3mr_bsg_mptcmd {
__u8 mrioc_id;
__u8 rsvd1;
__u16 timeout;
__u32 rsvd2;
struct mpi3mr_buf_entry_list buf_entry_list;
};
/**
* struct mpi3mr_bsg_packet - Generic bsg data
* structure for all supported requests .
*
* @cmd_type: represents drvrcmd or mptcmd
* @rsvd1: Reserved
* @rsvd2: Reserved
* @drvrcmd: driver request structure
* @mptcmd: mpt request structure
*/
struct mpi3mr_bsg_packet {
__u8 cmd_type;
__u8 rsvd1;
__u16 rsvd2;
__u32 rsvd3;
union {
struct mpi3mr_bsg_drv_cmd drvrcmd;
struct mpi3mr_bsg_mptcmd mptcmd;
} cmd;
};
/* MPI3: NVMe Encasulation related definitions */
#ifndef MPI3_NVME_ENCAP_CMD_MAX
#define MPI3_NVME_ENCAP_CMD_MAX (1)
#endif
struct mpi3_nvme_encapsulated_request {
__le16 host_tag;
__u8 ioc_use_only02;
__u8 function;
__le16 ioc_use_only04;
__u8 ioc_use_only06;
__u8 msg_flags;
__le16 change_count;
__le16 dev_handle;
__le16 encapsulated_command_length;
__le16 flags;
__le32 data_length;
__le32 reserved14[3];
__le32 command[MPI3_NVME_ENCAP_CMD_MAX];
};
struct mpi3_nvme_encapsulated_error_reply {
__le16 host_tag;
__u8 ioc_use_only02;
__u8 function;
__le16 ioc_use_only04;
__u8 ioc_use_only06;
__u8 msg_flags;
__le16 ioc_use_only08;
__le16 ioc_status;
__le32 ioc_log_info;
__le32 nvme_completion_entry[4];
};
#define MPI3MR_NVME_PRP_SIZE 8 /* PRP size */
#define MPI3MR_NVME_CMD_PRP1_OFFSET 24 /* PRP1 offset in NVMe cmd */
#define MPI3MR_NVME_CMD_PRP2_OFFSET 32 /* PRP2 offset in NVMe cmd */
#define MPI3MR_NVME_CMD_SGL_OFFSET 24 /* SGL offset in NVMe cmd */
#define MPI3MR_NVME_DATA_FORMAT_PRP 0
#define MPI3MR_NVME_DATA_FORMAT_SGL1 1
#define MPI3MR_NVME_DATA_FORMAT_SGL2 2
/* MPI3: task management related definitions */
struct mpi3_scsi_task_mgmt_request {
__le16 host_tag;
__u8 ioc_use_only02;
__u8 function;
__le16 ioc_use_only04;
__u8 ioc_use_only06;
__u8 msg_flags;
__le16 change_count;
__le16 dev_handle;
__le16 task_host_tag;
__u8 task_type;
__u8 reserved0f;
__le16 task_request_queue_id;
__le16 reserved12;
__le32 reserved14;
__u8 lun[8];
};
#define MPI3_SCSITASKMGMT_MSGFLAGS_DO_NOT_SEND_TASK_IU (0x08)
#define MPI3_SCSITASKMGMT_TASKTYPE_ABORT_TASK (0x01)
#define MPI3_SCSITASKMGMT_TASKTYPE_ABORT_TASK_SET (0x02)
#define MPI3_SCSITASKMGMT_TASKTYPE_TARGET_RESET (0x03)
#define MPI3_SCSITASKMGMT_TASKTYPE_LOGICAL_UNIT_RESET (0x05)
#define MPI3_SCSITASKMGMT_TASKTYPE_CLEAR_TASK_SET (0x06)
#define MPI3_SCSITASKMGMT_TASKTYPE_QUERY_TASK (0x07)
#define MPI3_SCSITASKMGMT_TASKTYPE_CLEAR_ACA (0x08)
#define MPI3_SCSITASKMGMT_TASKTYPE_QUERY_TASK_SET (0x09)
#define MPI3_SCSITASKMGMT_TASKTYPE_QUERY_ASYNC_EVENT (0x0a)
#define MPI3_SCSITASKMGMT_TASKTYPE_I_T_NEXUS_RESET (0x0b)
struct mpi3_scsi_task_mgmt_reply {
__le16 host_tag;
__u8 ioc_use_only02;
__u8 function;
__le16 ioc_use_only04;
__u8 ioc_use_only06;
__u8 msg_flags;
__le16 ioc_use_only08;
__le16 ioc_status;
__le32 ioc_log_info;
__le32 termination_count;
__le32 response_data;
__le32 reserved18;
};
#define MPI3_SCSITASKMGMT_RSPCODE_TM_COMPLETE (0x00)
#define MPI3_SCSITASKMGMT_RSPCODE_INVALID_FRAME (0x02)
#define MPI3_SCSITASKMGMT_RSPCODE_TM_FUNCTION_NOT_SUPPORTED (0x04)
#define MPI3_SCSITASKMGMT_RSPCODE_TM_FAILED (0x05)
#define MPI3_SCSITASKMGMT_RSPCODE_TM_SUCCEEDED (0x08)
#define MPI3_SCSITASKMGMT_RSPCODE_TM_INVALID_LUN (0x09)
#define MPI3_SCSITASKMGMT_RSPCODE_TM_OVERLAPPED_TAG (0x0a)
#define MPI3_SCSITASKMGMT_RSPCODE_IO_QUEUED_ON_IOC (0x80)
#define MPI3_SCSITASKMGMT_RSPCODE_TM_NVME_DENIED (0x81)
/* MPI3: PEL related definitions */
#define MPI3_PEL_LOCALE_FLAGS_NON_BLOCKING_BOOT_EVENT (0x0200)
#define MPI3_PEL_LOCALE_FLAGS_BLOCKING_BOOT_EVENT (0x0100)
#define MPI3_PEL_LOCALE_FLAGS_PCIE (0x0080)
#define MPI3_PEL_LOCALE_FLAGS_CONFIGURATION (0x0040)
#define MPI3_PEL_LOCALE_FLAGS_CONTROLER (0x0020)
#define MPI3_PEL_LOCALE_FLAGS_SAS (0x0010)
#define MPI3_PEL_LOCALE_FLAGS_EPACK (0x0008)
#define MPI3_PEL_LOCALE_FLAGS_ENCLOSURE (0x0004)
#define MPI3_PEL_LOCALE_FLAGS_PD (0x0002)
#define MPI3_PEL_LOCALE_FLAGS_VD (0x0001)
#define MPI3_PEL_CLASS_DEBUG (0x00)
#define MPI3_PEL_CLASS_PROGRESS (0x01)
#define MPI3_PEL_CLASS_INFORMATIONAL (0x02)
#define MPI3_PEL_CLASS_WARNING (0x03)
#define MPI3_PEL_CLASS_CRITICAL (0x04)
#define MPI3_PEL_CLASS_FATAL (0x05)
#define MPI3_PEL_CLASS_FAULT (0x06)
/* MPI3: Function definitions */
#define MPI3_BSG_FUNCTION_MGMT_PASSTHROUGH (0x0a)
#define MPI3_BSG_FUNCTION_SCSI_IO (0x20)
#define MPI3_BSG_FUNCTION_SCSI_TASK_MGMT (0x21)
#define MPI3_BSG_FUNCTION_SMP_PASSTHROUGH (0x22)
#define MPI3_BSG_FUNCTION_NVME_ENCAPSULATED (0x24)
#endif

126
include/uapi/sound/intel/avs/tokens.h Normal file
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@ -0,0 +1,126 @@
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
/*
* Copyright(c) 2021 Intel Corporation. All rights reserved.
*
* Authors: Cezary Rojewski <cezary.rojewski@intel.com>
* Amadeusz Slawinski <amadeuszx.slawinski@linux.intel.com>
*/
#ifndef __UAPI_SOUND_INTEL_AVS_TOKENS_H
#define __UAPI_SOUND_INTEL_AVS_TOKENS_H
enum avs_tplg_token {
/* struct avs_tplg */
AVS_TKN_MANIFEST_NAME_STRING = 1,
AVS_TKN_MANIFEST_VERSION_U32 = 2,
AVS_TKN_MANIFEST_NUM_LIBRARIES_U32 = 3,
AVS_TKN_MANIFEST_NUM_AFMTS_U32 = 4,
AVS_TKN_MANIFEST_NUM_MODCFGS_BASE_U32 = 5,
AVS_TKN_MANIFEST_NUM_MODCFGS_EXT_U32 = 6,
AVS_TKN_MANIFEST_NUM_PPLCFGS_U32 = 7,
AVS_TKN_MANIFEST_NUM_BINDINGS_U32 = 8,
/* struct avs_tplg_library */
AVS_TKN_LIBRARY_ID_U32 = 101,
AVS_TKN_LIBRARY_NAME_STRING = 102,
/* struct avs_audio_format */
AVS_TKN_AFMT_ID_U32 = 201,
AVS_TKN_AFMT_SAMPLE_RATE_U32 = 202,
AVS_TKN_AFMT_BIT_DEPTH_U32 = 203,
AVS_TKN_AFMT_CHANNEL_MAP_U32 = 204,
AVS_TKN_AFMT_CHANNEL_CFG_U32 = 205,
AVS_TKN_AFMT_INTERLEAVING_U32 = 206,
AVS_TKN_AFMT_NUM_CHANNELS_U32 = 207,
AVS_TKN_AFMT_VALID_BIT_DEPTH_U32 = 208,
AVS_TKN_AFMT_SAMPLE_TYPE_U32 = 209,
/* struct avs_tplg_modcfg_base */
AVS_TKN_MODCFG_BASE_ID_U32 = 301,
AVS_TKN_MODCFG_BASE_CPC_U32 = 302,
AVS_TKN_MODCFG_BASE_IBS_U32 = 303,
AVS_TKN_MODCFG_BASE_OBS_U32 = 304,
AVS_TKN_MODCFG_BASE_PAGES_U32 = 305,
/* struct avs_tplg_modcfg_ext */
AVS_TKN_MODCFG_EXT_ID_U32 = 401,
AVS_TKN_MODCFG_EXT_TYPE_UUID = 402,
AVS_TKN_MODCFG_CPR_OUT_AFMT_ID_U32 = 403,
AVS_TKN_MODCFG_CPR_FEATURE_MASK_U32 = 404,
AVS_TKN_MODCFG_CPR_DMA_TYPE_U32 = 405,
AVS_TKN_MODCFG_CPR_DMABUFF_SIZE_U32 = 406,
AVS_TKN_MODCFG_CPR_VINDEX_U8 = 407,
AVS_TKN_MODCFG_CPR_BLOB_FMT_ID_U32 = 408,
AVS_TKN_MODCFG_MICSEL_OUT_AFMT_ID_U32 = 409,
AVS_TKN_MODCFG_INTELWOV_CPC_LP_MODE_U32 = 410,
AVS_TKN_MODCFG_SRC_OUT_FREQ_U32 = 411,
AVS_TKN_MODCFG_MUX_REF_AFMT_ID_U32 = 412,
AVS_TKN_MODCFG_MUX_OUT_AFMT_ID_U32 = 413,
AVS_TKN_MODCFG_AEC_REF_AFMT_ID_U32 = 414,
AVS_TKN_MODCFG_AEC_OUT_AFMT_ID_U32 = 415,
AVS_TKN_MODCFG_AEC_CPC_LP_MODE_U32 = 416,
AVS_TKN_MODCFG_ASRC_OUT_FREQ_U32 = 417,
AVS_TKN_MODCFG_ASRC_MODE_U8 = 418,
AVS_TKN_MODCFG_ASRC_DISABLE_JITTER_U8 = 419,
AVS_TKN_MODCFG_UPDOWN_MIX_OUT_CHAN_CFG_U32 = 420,
AVS_TKN_MODCFG_UPDOWN_MIX_COEFF_SELECT_U32 = 421,
AVS_TKN_MODCFG_UPDOWN_MIX_COEFF_0_S32 = 422,
AVS_TKN_MODCFG_UPDOWN_MIX_COEFF_1_S32 = 423,
AVS_TKN_MODCFG_UPDOWN_MIX_COEFF_2_S32 = 424,
AVS_TKN_MODCFG_UPDOWN_MIX_COEFF_3_S32 = 425,
AVS_TKN_MODCFG_UPDOWN_MIX_COEFF_4_S32 = 426,
AVS_TKN_MODCFG_UPDOWN_MIX_COEFF_5_S32 = 427,
AVS_TKN_MODCFG_UPDOWN_MIX_COEFF_6_S32 = 428,
AVS_TKN_MODCFG_UPDOWN_MIX_COEFF_7_S32 = 429,
AVS_TKN_MODCFG_UPDOWN_MIX_CHAN_MAP_U32 = 430,
AVS_TKN_MODCFG_EXT_NUM_INPUT_PINS_U16 = 431,
AVS_TKN_MODCFG_EXT_NUM_OUTPUT_PINS_U16 = 432,
/* struct avs_tplg_pplcfg */
AVS_TKN_PPLCFG_ID_U32 = 1401,
AVS_TKN_PPLCFG_REQ_SIZE_U16 = 1402,
AVS_TKN_PPLCFG_PRIORITY_U8 = 1403,
AVS_TKN_PPLCFG_LOW_POWER_BOOL = 1404,
AVS_TKN_PPLCFG_ATTRIBUTES_U16 = 1405,
AVS_TKN_PPLCFG_TRIGGER_U32 = 1406,
/* struct avs_tplg_binding */
AVS_TKN_BINDING_ID_U32 = 1501,
AVS_TKN_BINDING_TARGET_TPLG_NAME_STRING = 1502,
AVS_TKN_BINDING_TARGET_PATH_TMPL_ID_U32 = 1503,
AVS_TKN_BINDING_TARGET_PPL_ID_U32 = 1504,
AVS_TKN_BINDING_TARGET_MOD_ID_U32 = 1505,
AVS_TKN_BINDING_TARGET_MOD_PIN_U8 = 1506,
AVS_TKN_BINDING_MOD_ID_U32 = 1507,
AVS_TKN_BINDING_MOD_PIN_U8 = 1508,
AVS_TKN_BINDING_IS_SINK_U8 = 1509,
/* struct avs_tplg_pipeline */
AVS_TKN_PPL_ID_U32 = 1601,
AVS_TKN_PPL_PPLCFG_ID_U32 = 1602,
AVS_TKN_PPL_NUM_BINDING_IDS_U32 = 1603,
AVS_TKN_PPL_BINDING_ID_U32 = 1604,
/* struct avs_tplg_module */
AVS_TKN_MOD_ID_U32 = 1701,
AVS_TKN_MOD_MODCFG_BASE_ID_U32 = 1702,
AVS_TKN_MOD_IN_AFMT_ID_U32 = 1703,
AVS_TKN_MOD_CORE_ID_U8 = 1704,
AVS_TKN_MOD_PROC_DOMAIN_U8 = 1705,
AVS_TKN_MOD_MODCFG_EXT_ID_U32 = 1706,
/* struct avs_tplg_path_template */
AVS_TKN_PATH_TMPL_ID_U32 = 1801,
/* struct avs_tplg_path */
AVS_TKN_PATH_ID_U32 = 1901,
AVS_TKN_PATH_FE_FMT_ID_U32 = 1902,
AVS_TKN_PATH_BE_FMT_ID_U32 = 1903,
/* struct avs_tplg_pin_format */
AVS_TKN_PIN_FMT_INDEX_U32 = 2201,
AVS_TKN_PIN_FMT_IOBS_U32 = 2202,
AVS_TKN_PIN_FMT_AFMT_ID_U32 = 2203,
};
#endif

4
include/uapi/sound/sof/abi.h
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@ -26,8 +26,8 @@
/* SOF ABI version major, minor and patch numbers */
#define SOF_ABI_MAJOR 3
#define SOF_ABI_MINOR 19
#define SOF_ABI_PATCH 1
#define SOF_ABI_MINOR 21
#define SOF_ABI_PATCH 0
/* SOF ABI version number. Format within 32bit word is MMmmmppp */
#define SOF_ABI_MAJOR_SHIFT 24