Merge branch 'drm-next-4.11' of git://people.freedesktop.org/~agd5f/linux into drm-next
This is the main feature pull for radeon and amdgpu for 4.11. Highlights: - Power and clockgating improvements - Preliminary SR-IOV support - ttm buffer priority support - ttm eviction fixes - Removal of the ttm lru callbacks - Remove SI DPM quirks due to MC firmware issues - Handle VFCT with multiple vbioses - Powerplay improvements - Lots of driver cleanups * 'drm-next-4.11' of git://people.freedesktop.org/~agd5f/linux: (120 commits) drm/amdgpu: fix amdgpu_bo_va_mapping flags drm/amdgpu: access stolen VRAM directly on CZ (v2) drm/amdgpu: access stolen VRAM directly on KV/KB (v2) drm/amdgpu: fix kernel panic when dpm disabled on Kv. drm/amdgpu: fix dpm bug on Kv. drm/amd/powerplay: fix regresstion issue can't set manual dpm mode. drm/amdgpu: handle vfct with multiple vbios images drm/radeon: handle vfct with multiple vbios images drm/amdgpu: move misc si headers into amdgpu drm/amdgpu: remove unused header si_reg.h drm/radeon: drop pitcairn dpm quirks drm/amdgpu: drop pitcairn dpm quirks drm: radeon: radeon_ttm: Handle return NULL error from ioremap_nocache drm/amd/amdgpu/amdgpu_ttm: Handle return NULL error from ioremap_nocache drm/amdgpu: add new virtual display ID drm/amd/amdgpu: remove the uncessary parameter for ib scheduler drm/amdgpu: Bring bo creation in line with radeon driver (v2) drm/amd/powerplay: fix misspelling in header guard drm/ttm: revert "add optional LRU removal callback v2" drm/ttm: revert "implement LRU add callbacks v2" ...
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commit
29a73d906b
134 changed files with 4853 additions and 6137 deletions
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@ -528,6 +528,8 @@ struct drm_amdgpu_cs_chunk_data {
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#define AMDGPU_INFO_VBIOS_SIZE 0x1
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/* Subquery id: Query vbios image */
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#define AMDGPU_INFO_VBIOS_IMAGE 0x2
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/* Query UVD handles */
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#define AMDGPU_INFO_NUM_HANDLES 0x1C
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#define AMDGPU_INFO_MMR_SE_INDEX_SHIFT 0
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#define AMDGPU_INFO_MMR_SE_INDEX_MASK 0xff
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@ -719,6 +721,13 @@ struct drm_amdgpu_info_hw_ip {
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__u32 _pad;
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};
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struct drm_amdgpu_info_num_handles {
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/** Max handles as supported by firmware for UVD */
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__u32 uvd_max_handles;
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/** Handles currently in use for UVD */
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__u32 uvd_used_handles;
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};
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#define AMDGPU_VCE_CLOCK_TABLE_ENTRIES 6
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struct drm_amdgpu_info_vce_clock_table_entry {
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