drm-misc-next for v4.18:
UAPI Changes: - Fix render node number regression from control node removal. Driver Changes: - Small header fix for virgl, used by qemu. - Use vm_fault_t in qxl. -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEuXvWqAysSYEJGuVH/lWMcqZwE8MFAlr6l0MACgkQ/lWMcqZw E8NFURAAkZ9TqzHRcn/3fMijuv/JslT0mW4CIFw3jm5diCXqrsKQ7TlQK8/q5uys 2vLgsTIKFzIp73ptUf11vyoKnvZA5SHHt55s2glrTDfKS9dkmgP+DcMab6qN31Y3 sPY54o0R/8lBd8YOZh8nfYbHngoeD4SHPIzZYETssklhip/CupMcHs2GtXlsO8nP 9ZNZyJHz0/GQUagUrFRgmVmq1ZF9t9Ap8fVBrkWUoQ02MogTFrPCj6F5AuBds9hR ZRhGZLu3Ri1BdP06JraDTvbWZ8jQKF9yD4PuQVGAjkuz4LpRrNQCCKJQ+GMSXMTK JmOB5Yty6/pN+WS+FeV7czbdS/bJDXLXzRh9dc0WOop4gCZPzmYC9HOBSZCZ8i1k dcpGsJGcgzXgFSgZYISkkn50YUnbdjk44tonSK1qAWvNuo4SdZJFGoMoE3Mxf3/R LMlfskWX3w8jzo7cWFkSvkh5Zt9MEaKJRKOGm4VUXidZSN/3/ZI1GbyRCZ8eeGxr R6FK7GYHszBS+whWsA0NcX4KwS7qbktm5JGKpZCevIh9cscBVzQ3tbIugV0EgfAm 8VK1F9VU760pXoN+RRfdH61nZ2QTzmDGZwVtTz0ta5MlkW7YY4bvL5PNbUXYffaK 4EOk/RypONazqJ0B2ZUEHC47/8ETlfJ0bnYIqfR6O7bo7KPfWGQ= =LG6G -----END PGP SIGNATURE----- Merge tag 'drm-misc-next-2018-05-15' of git://anongit.freedesktop.org/drm/drm-misc into drm-next drm-misc-next for v4.18: UAPI Changes: - Fix render node number regression from control node removal. Driver Changes: - Small header fix for virgl, used by qemu. - Use vm_fault_t in qxl. Signed-off-by: Dave Airlie <airlied@redhat.com> # gpg: Signature made Tue 15 May 2018 06:16:03 PM AEST # gpg: using RSA key FE558C72A67013C3 # gpg: Can't check signature: public key not found Link: https://patchwork.freedesktop.org/patch/msgid/e63306b9-67a0-74ab-8883-08b3d9db72d2@mblankhorst.nl
This commit is contained in:
commit
2045b22461
90 changed files with 4614 additions and 708 deletions
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@ -680,6 +680,13 @@ struct drm_get_cap {
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*/
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#define DRM_CLIENT_CAP_ATOMIC 3
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/**
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* DRM_CLIENT_CAP_ASPECT_RATIO
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*
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* If set to 1, the DRM core will provide aspect ratio information in modes.
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*/
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#define DRM_CLIENT_CAP_ASPECT_RATIO 4
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/** DRM_IOCTL_SET_CLIENT_CAP ioctl argument type */
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struct drm_set_client_cap {
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__u64 capability;
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@ -93,6 +93,8 @@ extern "C" {
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#define DRM_MODE_PICTURE_ASPECT_NONE 0
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#define DRM_MODE_PICTURE_ASPECT_4_3 1
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#define DRM_MODE_PICTURE_ASPECT_16_9 2
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#define DRM_MODE_PICTURE_ASPECT_64_27 3
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#define DRM_MODE_PICTURE_ASPECT_256_135 4
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/* Aspect ratio flag bitmask (4 bits 22:19) */
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#define DRM_MODE_FLAG_PIC_AR_MASK (0x0F<<19)
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@ -102,6 +104,10 @@ extern "C" {
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(DRM_MODE_PICTURE_ASPECT_4_3<<19)
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#define DRM_MODE_FLAG_PIC_AR_16_9 \
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(DRM_MODE_PICTURE_ASPECT_16_9<<19)
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#define DRM_MODE_FLAG_PIC_AR_64_27 \
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(DRM_MODE_PICTURE_ASPECT_64_27<<19)
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#define DRM_MODE_FLAG_PIC_AR_256_135 \
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(DRM_MODE_PICTURE_ASPECT_256_135<<19)
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#define DRM_MODE_FLAG_ALL (DRM_MODE_FLAG_PHSYNC | \
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DRM_MODE_FLAG_NHSYNC | \
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194
include/uapi/drm/v3d_drm.h
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194
include/uapi/drm/v3d_drm.h
Normal file
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@ -0,0 +1,194 @@
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/*
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* Copyright © 2014-2018 Broadcom
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#ifndef _V3D_DRM_H_
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#define _V3D_DRM_H_
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#include "drm.h"
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#if defined(__cplusplus)
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extern "C" {
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#endif
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#define DRM_V3D_SUBMIT_CL 0x00
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#define DRM_V3D_WAIT_BO 0x01
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#define DRM_V3D_CREATE_BO 0x02
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#define DRM_V3D_MMAP_BO 0x03
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#define DRM_V3D_GET_PARAM 0x04
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#define DRM_V3D_GET_BO_OFFSET 0x05
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#define DRM_IOCTL_V3D_SUBMIT_CL DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_SUBMIT_CL, struct drm_v3d_submit_cl)
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#define DRM_IOCTL_V3D_WAIT_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_WAIT_BO, struct drm_v3d_wait_bo)
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#define DRM_IOCTL_V3D_CREATE_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_CREATE_BO, struct drm_v3d_create_bo)
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#define DRM_IOCTL_V3D_MMAP_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_MMAP_BO, struct drm_v3d_mmap_bo)
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#define DRM_IOCTL_V3D_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_GET_PARAM, struct drm_v3d_get_param)
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#define DRM_IOCTL_V3D_GET_BO_OFFSET DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_GET_BO_OFFSET, struct drm_v3d_get_bo_offset)
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/**
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* struct drm_v3d_submit_cl - ioctl argument for submitting commands to the 3D
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* engine.
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*
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* This asks the kernel to have the GPU execute an optional binner
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* command list, and a render command list.
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*/
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struct drm_v3d_submit_cl {
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/* Pointer to the binner command list.
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*
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* This is the first set of commands executed, which runs the
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* coordinate shader to determine where primitives land on the screen,
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* then writes out the state updates and draw calls necessary per tile
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* to the tile allocation BO.
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*/
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__u32 bcl_start;
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/** End address of the BCL (first byte after the BCL) */
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__u32 bcl_end;
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/* Offset of the render command list.
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*
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* This is the second set of commands executed, which will either
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* execute the tiles that have been set up by the BCL, or a fixed set
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* of tiles (in the case of RCL-only blits).
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*/
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__u32 rcl_start;
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/** End address of the RCL (first byte after the RCL) */
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__u32 rcl_end;
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/** An optional sync object to wait on before starting the BCL. */
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__u32 in_sync_bcl;
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/** An optional sync object to wait on before starting the RCL. */
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__u32 in_sync_rcl;
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/** An optional sync object to place the completion fence in. */
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__u32 out_sync;
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/* Offset of the tile alloc memory
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*
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* This is optional on V3D 3.3 (where the CL can set the value) but
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* required on V3D 4.1.
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*/
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__u32 qma;
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/** Size of the tile alloc memory. */
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__u32 qms;
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/** Offset of the tile state data array. */
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__u32 qts;
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/* Pointer to a u32 array of the BOs that are referenced by the job.
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*/
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__u64 bo_handles;
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/* Number of BO handles passed in (size is that times 4). */
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__u32 bo_handle_count;
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/* Pad, must be zero-filled. */
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__u32 pad;
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};
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/**
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* struct drm_v3d_wait_bo - ioctl argument for waiting for
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* completion of the last DRM_V3D_SUBMIT_CL on a BO.
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*
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* This is useful for cases where multiple processes might be
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* rendering to a BO and you want to wait for all rendering to be
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* completed.
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*/
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struct drm_v3d_wait_bo {
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__u32 handle;
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__u32 pad;
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__u64 timeout_ns;
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};
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/**
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* struct drm_v3d_create_bo - ioctl argument for creating V3D BOs.
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*
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* There are currently no values for the flags argument, but it may be
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* used in a future extension.
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*/
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struct drm_v3d_create_bo {
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__u32 size;
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__u32 flags;
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/** Returned GEM handle for the BO. */
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__u32 handle;
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/**
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* Returned offset for the BO in the V3D address space. This offset
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* is private to the DRM fd and is valid for the lifetime of the GEM
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* handle.
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*
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* This offset value will always be nonzero, since various HW
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* units treat 0 specially.
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*/
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__u32 offset;
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};
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/**
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* struct drm_v3d_mmap_bo - ioctl argument for mapping V3D BOs.
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*
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* This doesn't actually perform an mmap. Instead, it returns the
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* offset you need to use in an mmap on the DRM device node. This
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* means that tools like valgrind end up knowing about the mapped
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* memory.
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*
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* There are currently no values for the flags argument, but it may be
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* used in a future extension.
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*/
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struct drm_v3d_mmap_bo {
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/** Handle for the object being mapped. */
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__u32 handle;
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__u32 flags;
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/** offset into the drm node to use for subsequent mmap call. */
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__u64 offset;
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};
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enum drm_v3d_param {
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DRM_V3D_PARAM_V3D_UIFCFG,
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DRM_V3D_PARAM_V3D_HUB_IDENT1,
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DRM_V3D_PARAM_V3D_HUB_IDENT2,
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DRM_V3D_PARAM_V3D_HUB_IDENT3,
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DRM_V3D_PARAM_V3D_CORE0_IDENT0,
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DRM_V3D_PARAM_V3D_CORE0_IDENT1,
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DRM_V3D_PARAM_V3D_CORE0_IDENT2,
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};
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struct drm_v3d_get_param {
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__u32 param;
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__u32 pad;
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__u64 value;
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};
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/**
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* Returns the offset for the BO in the V3D address space for this DRM fd.
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* This is the same value returned by drm_v3d_create_bo, if that was called
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* from this DRM fd.
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*/
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struct drm_v3d_get_bo_offset {
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__u32 handle;
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__u32 offset;
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};
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#if defined(__cplusplus)
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}
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#endif
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#endif /* _V3D_DRM_H_ */
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@ -183,10 +183,17 @@ struct drm_vc4_submit_cl {
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/* ID of the perfmon to attach to this job. 0 means no perfmon. */
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__u32 perfmonid;
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/* Unused field to align this struct on 64 bits. Must be set to 0.
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* If one ever needs to add an u32 field to this struct, this field
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* can be used.
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/* Syncobj handle to wait on. If set, processing of this render job
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* will not start until the syncobj is signaled. 0 means ignore.
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*/
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__u32 in_sync;
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/* Syncobj handle to export fence to. If set, the fence in the syncobj
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* will be replaced with a fence that signals upon completion of this
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* render job. 0 means ignore.
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*/
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__u32 out_sync;
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__u32 pad2;
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};
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@ -260,6 +260,7 @@ struct virtio_gpu_cmd_submit {
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};
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#define VIRTIO_GPU_CAPSET_VIRGL 1
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#define VIRTIO_GPU_CAPSET_VIRGL2 2
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/* VIRTIO_GPU_CMD_GET_CAPSET_INFO */
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struct virtio_gpu_get_capset_info {
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