drm for 5.11-rc1
core: - documentation updates - deprecate DRM_FORMAT_MOD_NONE - atomic crtc enable/disable rework - GEM convert drivers to gem object functions - remove SCATTER_LIST_MAX_SEGMENT sched: - avoid infinite waits ttm: - remove AGP support - don't modify caching for swapout - ttm pinning rework - major TTM reworks - new backend allocator - multihop support vram-helper: - top down BO placement fix - TTM changes - GEM object support displayport: - DP 2.0 DPCD prep work - DP MST extended DPCD caps fbdev: - mark as orphaned amdgpu: - Initial Vangogh support - Green Sardine support - Dimgrey Cavefish support - SG display support for renoir - SMU7 improvements - gfx9+ modiifier support - CI BACO fixes radeon: - expose voltage via hwmon on SUMO amdkfd: - fix unique id handling i915: - more DG1 enablement - bigjoiner support - integer scaling filter support - async flip support - ICL+ DSI command mode - Improve display shutdown - Display refactoring - eLLC machine fbdev loading fix - dma scatterlist fixes - TGL hang fixes - eLLC display buffer caching on SKL+ - MOCS PTE seeting for gen9+ msm: - Shutdown hook - GPU cooling device support - DSI 7nm and 10nm phy/pll updates - sm8150/sm2850 DPU support - GEM locking re-work - LLCC system cache support aspeed: - sysfs output config support ast: - LUT fix - new display mode gma500: - remove 2d framebuffer accel panfrost: - move gpu reset to a worker exynos: - new HDMI mode support mediatek: - MT8167 support - yaml bindings - MIPI DSI phy code moved etnaviv: - new perf counter - more lockdep annotation hibmc: - i2c DDC support ingenic: - pixel clock reset fix - reserved memory support - allow both DMA channels at once - different pixel format support - 30/24/8-bit palette modes tilcdc: - don't keep vblank irq enabled vc4: - new maintainer added - DSI registration fix virtio: - blob resource support - host visible and cross-device support - uuid api support -----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJf0upGAAoJEAx081l5xIa+1EoP/2OkZnl5d9S26qPja15EoRFl S69OjNci331Br9Y111jD2OCtyqA7w3ppnvCmzpHOBK1IZjhkxOVNC6PSUFSV4M3V oVOxZK0KaMHpLU2p90NbURWHa2TOktj7IWb9FrhPaEeBECbFuORZ2TbloFhaoyyt 9auEAwqYRPgF8CSYOjQGGZJ85MQN4ImExTdY13+BZgQlGLiSPHfpnLVJ1Q5TPt6A BLgcU/DFcqOZqyjeu+CuA+LZSHjHeVJxTOGRX65PoTtU3Xus8TRZ/qL4r8e6mAI1 boFLmsevvQlzaQ9GFohc+l9QR/dtnm6SpZxuEelewh7sQvsz2GI+SNF+OHcwHCph TYIEtyZNaz1bf7ip75FGbhEVaWh2PUMn3zkGlYt+zqAtznYB+dFPc31hhuVn3o5X c8UwLDUUJLzTePKPZ0UtzIu4Gm2RYTyRsnUAP0OKP/0WaZRyxnoQMYm5Llg7RBe0 5ZJSWjJPBlv1YMWAHQ0YMZ+MhnFE8k4eV/8WfBQnb2INosgzKfJXEmu6ffAkPqSq jxBsrVQwtOMF2P9VEfdQDv3fs0GKDuZN5ezTFuW59Dt4VYfCUe2FTssSwFBIp5X9 erPJ/nk883rcI6F0PdArNYvWpwPlVSDJyfTxQbYYxVAf8X1ARJCU3PT6iBnGO3i4 d5tveSc8HoOXr4W3eIjn =c9rl -----END PGP SIGNATURE----- Merge tag 'drm-next-2020-12-11' of git://anongit.freedesktop.org/drm/drm Pull drm updates from Dave Airlie: "Not a huge amount of big things here, AMD has support for a few new HW variants (vangogh, green sardine, dimgrey cavefish), Intel has some more DG1 enablement. We have a few big reworks of the TTM layers and interfaces, GEM and atomic internal API reworks cross tree. fbdev is marked orphaned in here as well to reflect the current reality. core: - documentation updates - deprecate DRM_FORMAT_MOD_NONE - atomic crtc enable/disable rework - GEM convert drivers to gem object functions - remove SCATTER_LIST_MAX_SEGMENT sched: - avoid infinite waits ttm: - remove AGP support - don't modify caching for swapout - ttm pinning rework - major TTM reworks - new backend allocator - multihop support vram-helper: - top down BO placement fix - TTM changes - GEM object support displayport: - DP 2.0 DPCD prep work - DP MST extended DPCD caps fbdev: - mark as orphaned amdgpu: - Initial Vangogh support - Green Sardine support - Dimgrey Cavefish support - SG display support for renoir - SMU7 improvements - gfx9+ modiifier support - CI BACO fixes radeon: - expose voltage via hwmon on SUMO amdkfd: - fix unique id handling i915: - more DG1 enablement - bigjoiner support - integer scaling filter support - async flip support - ICL+ DSI command mode - Improve display shutdown - Display refactoring - eLLC machine fbdev loading fix - dma scatterlist fixes - TGL hang fixes - eLLC display buffer caching on SKL+ - MOCS PTE seeting for gen9+ msm: - Shutdown hook - GPU cooling device support - DSI 7nm and 10nm phy/pll updates - sm8150/sm2850 DPU support - GEM locking re-work - LLCC system cache support aspeed: - sysfs output config support ast: - LUT fix - new display mode gma500: - remove 2d framebuffer accel panfrost: - move gpu reset to a worker exynos: - new HDMI mode support mediatek: - MT8167 support - yaml bindings - MIPI DSI phy code moved etnaviv: - new perf counter - more lockdep annotation hibmc: - i2c DDC support ingenic: - pixel clock reset fix - reserved memory support - allow both DMA channels at once - different pixel format support - 30/24/8-bit palette modes tilcdc: - don't keep vblank irq enabled vc4: - new maintainer added - DSI registration fix virtio: - blob resource support - host visible and cross-device support - uuid api support" * tag 'drm-next-2020-12-11' of git://anongit.freedesktop.org/drm/drm: (1754 commits) drm/amdgpu: Initialise drm_gem_object_funcs for imported BOs drm/amdgpu: fix size calculation with stolen vga memory drm/amdgpu: remove amdgpu_ttm_late_init and amdgpu_bo_late_init drm/amdgpu: free the pre-OS console framebuffer after the first modeset drm/amdgpu: enable runtime pm using BACO on CI dGPUs drm/amdgpu/cik: enable BACO reset on Bonaire drm/amd/pm: update smu10.h WORKLOAD_PPLIB setting for raven drm/amd/pm: remove one unsupported smu function for vangogh drm/amd/display: setup system context for APUs drm/amd/display: add S/G support for Vangogh drm/amdkfd: Fix leak in dmabuf import drm/amdgpu: use AMDGPU_NUM_VMID when possible drm/amdgpu: fix sdma instance fw version and feature version init drm/amd/pm: update driver if version for dimgrey_cavefish drm/amd/display: 3.2.115 drm/amd/display: [FW Promotion] Release 0.0.45 drm/amd/display: Revert DCN2.1 dram_clock_change_latency update drm/amd/display: Enable gpu_vm_support for dcn3.01 drm/amd/display: Fixed the audio noise during mode switching with HDCP mode on drm/amd/display: Add wm table for Renoir ...
This commit is contained in:
Linus Torvalds
commit
1d36dffa5d
1323 changed files with 397128 additions and 18672 deletions
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@ -173,7 +173,7 @@ struct console_font {
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#define KD_FONT_OP_SET 0 /* Set font */
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#define KD_FONT_OP_GET 1 /* Get font */
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#define KD_FONT_OP_SET_DEFAULT 2 /* Set font to default, data points to name / NULL */
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#define KD_FONT_OP_COPY 3 /* Copy from another console */
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#define KD_FONT_OP_COPY 3 /* Obsolete, do not use */
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#define KD_FONT_FLAG_DONT_RECALC 1 /* Don't recalculate hw charcell size [compat] */
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@ -34,7 +34,7 @@
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#define MEDIA_BUS_FMT_FIXED 0x0001
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/* RGB - next is 0x101d */
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/* RGB - next is 0x101e */
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#define MEDIA_BUS_FMT_RGB444_1X12 0x1016
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#define MEDIA_BUS_FMT_RGB444_2X8_PADHI_BE 0x1001
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#define MEDIA_BUS_FMT_RGB444_2X8_PADHI_LE 0x1002
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@ -56,6 +56,7 @@
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#define MEDIA_BUS_FMT_RGB888_2X12_BE 0x100b
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#define MEDIA_BUS_FMT_RGB888_2X12_LE 0x100c
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#define MEDIA_BUS_FMT_RGB888_3X8 0x101c
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#define MEDIA_BUS_FMT_RGB888_3X8_DELTA 0x101d
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#define MEDIA_BUS_FMT_RGB888_1X7X4_SPWG 0x1011
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#define MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA 0x1012
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#define MEDIA_BUS_FMT_ARGB8888_1X32 0x100d
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@ -55,6 +55,11 @@
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*/
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#define VIRTIO_GPU_F_RESOURCE_UUID 2
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/*
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* VIRTIO_GPU_CMD_RESOURCE_CREATE_BLOB
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*/
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#define VIRTIO_GPU_F_RESOURCE_BLOB 3
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enum virtio_gpu_ctrl_type {
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VIRTIO_GPU_UNDEFINED = 0,
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@ -71,6 +76,8 @@ enum virtio_gpu_ctrl_type {
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VIRTIO_GPU_CMD_GET_CAPSET,
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VIRTIO_GPU_CMD_GET_EDID,
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VIRTIO_GPU_CMD_RESOURCE_ASSIGN_UUID,
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VIRTIO_GPU_CMD_RESOURCE_CREATE_BLOB,
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VIRTIO_GPU_CMD_SET_SCANOUT_BLOB,
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/* 3d commands */
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VIRTIO_GPU_CMD_CTX_CREATE = 0x0200,
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@ -81,6 +88,8 @@ enum virtio_gpu_ctrl_type {
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VIRTIO_GPU_CMD_TRANSFER_TO_HOST_3D,
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VIRTIO_GPU_CMD_TRANSFER_FROM_HOST_3D,
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VIRTIO_GPU_CMD_SUBMIT_3D,
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VIRTIO_GPU_CMD_RESOURCE_MAP_BLOB,
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VIRTIO_GPU_CMD_RESOURCE_UNMAP_BLOB,
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/* cursor commands */
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VIRTIO_GPU_CMD_UPDATE_CURSOR = 0x0300,
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@ -93,6 +102,7 @@ enum virtio_gpu_ctrl_type {
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VIRTIO_GPU_RESP_OK_CAPSET,
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VIRTIO_GPU_RESP_OK_EDID,
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VIRTIO_GPU_RESP_OK_RESOURCE_UUID,
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VIRTIO_GPU_RESP_OK_MAP_INFO,
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/* error responses */
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VIRTIO_GPU_RESP_ERR_UNSPEC = 0x1200,
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@ -103,6 +113,11 @@ enum virtio_gpu_ctrl_type {
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VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER,
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};
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enum virtio_gpu_shm_id {
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VIRTIO_GPU_SHM_ID_UNDEFINED = 0,
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VIRTIO_GPU_SHM_ID_HOST_VISIBLE = 1
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};
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#define VIRTIO_GPU_FLAG_FENCE (1 << 0)
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struct virtio_gpu_ctrl_hdr {
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@ -359,4 +374,67 @@ struct virtio_gpu_resp_resource_uuid {
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__u8 uuid[16];
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};
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/* VIRTIO_GPU_CMD_RESOURCE_CREATE_BLOB */
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struct virtio_gpu_resource_create_blob {
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struct virtio_gpu_ctrl_hdr hdr;
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__le32 resource_id;
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#define VIRTIO_GPU_BLOB_MEM_GUEST 0x0001
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#define VIRTIO_GPU_BLOB_MEM_HOST3D 0x0002
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#define VIRTIO_GPU_BLOB_MEM_HOST3D_GUEST 0x0003
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#define VIRTIO_GPU_BLOB_FLAG_USE_MAPPABLE 0x0001
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#define VIRTIO_GPU_BLOB_FLAG_USE_SHAREABLE 0x0002
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#define VIRTIO_GPU_BLOB_FLAG_USE_CROSS_DEVICE 0x0004
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/* zero is invalid blob mem */
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__le32 blob_mem;
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__le32 blob_flags;
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__le32 nr_entries;
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__le64 blob_id;
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__le64 size;
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/*
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* sizeof(nr_entries * virtio_gpu_mem_entry) bytes follow
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*/
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};
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/* VIRTIO_GPU_CMD_SET_SCANOUT_BLOB */
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struct virtio_gpu_set_scanout_blob {
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struct virtio_gpu_ctrl_hdr hdr;
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struct virtio_gpu_rect r;
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__le32 scanout_id;
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__le32 resource_id;
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__le32 width;
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__le32 height;
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__le32 format;
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__le32 padding;
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__le32 strides[4];
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__le32 offsets[4];
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};
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/* VIRTIO_GPU_CMD_RESOURCE_MAP_BLOB */
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struct virtio_gpu_resource_map_blob {
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struct virtio_gpu_ctrl_hdr hdr;
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__le32 resource_id;
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__le32 padding;
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__le64 offset;
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};
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/* VIRTIO_GPU_RESP_OK_MAP_INFO */
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#define VIRTIO_GPU_MAP_CACHE_MASK 0x0f
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#define VIRTIO_GPU_MAP_CACHE_NONE 0x00
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#define VIRTIO_GPU_MAP_CACHE_CACHED 0x01
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#define VIRTIO_GPU_MAP_CACHE_UNCACHED 0x02
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#define VIRTIO_GPU_MAP_CACHE_WC 0x03
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struct virtio_gpu_resp_map_info {
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struct virtio_gpu_ctrl_hdr hdr;
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__u32 map_info;
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__u32 padding;
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};
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/* VIRTIO_GPU_CMD_RESOURCE_UNMAP_BLOB */
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struct virtio_gpu_resource_unmap_blob {
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struct virtio_gpu_ctrl_hdr hdr;
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__le32 resource_id;
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__le32 padding;
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};
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#endif
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