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spi: Updates for v5.15

Browse source 
A quiet release for SPI, some fixes and a couple of new drivers
 plus one small refactoring:
 
  - Move the chip select timing configuration from the controller
    to the device to allow a bit more flexibility.
  - New drivers for Rockchip SFC and Spreadtrum ADI.
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Merge tag 'spi-v5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi

Pull spi updates from Mark Brown:
 "A quiet release for SPI, some fixes and a couple of new drivers plus
  one small refactoring:

   - Move the chip select timing configuration from the controller to
     the device to allow a bit more flexibility

   - New drivers for Rockchip SFC and Spreadtrum ADI"

* tag 'spi-v5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (47 commits)
  spi: spi-zynq-qspi: use wait_for_completion_timeout to make zynq_qspi_exec_mem_op not interruptible
  spi: add sprd ADI for sc9863 and ums512
  spi: Convert sprd ADI bindings to yaml
  spi: sprd: Add ADI r3 support
  spi: sprd: Fix the wrong WDG_LOAD_VAL
  spi: davinci: invoke chipselect callback
  spi: sprd: fill offset only to RD_CMD register for reading from slave device
  spi: sprd: Make sure offset not equal to slave address size
  spi: sprd: Pass offset instead of physical address to adi_read/_write()
  spi: rockchip-sfc: Fix assigned but never used return error codes
  spi: rockchip-sfc: Remove redundant IO operations
  spi: stm32: fix excluded_middle.cocci warnings
  spi: coldfire-qspi: Use clk_disable_unprepare in the remove function
  spi: tegra20-slink: remove spi_master_put() in tegra_slink_remove()
  spi: rockchip-sfc: add rockchip serial flash controller
  spi: rockchip-sfc: Bindings for Rockchip serial flash controller
  spi: orion: Prevent incorrect chip select behaviour
  spi: mxic: add missing braces
  spi: spi-pic32: Fix issue with uninitialized dma_slave_config
  spi: spi-fsl-dspi: Fix issue with uninitialized dma_slave_config
  ...
This commit is contained in:
Linus Torvalds 2021-08-30 11:41:46 -07:00
commit 0da9bc6d2f
31 changed files with 1520 additions and 578 deletions
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1
include/linux/platform_data/spi-mt65xx.h
View file

@ -12,5 +12,6 @@
/* Board specific platform_data */
struct mtk_chip_config {
u32 sample_sel;
u32 tick_delay;
};
#endif

26
include/linux/spi/spi.h
View file

@ -147,7 +147,11 @@ extern int spi_delay_exec(struct spi_delay *_delay, struct spi_transfer *xfer);
* not using a GPIO line)
* @word_delay: delay to be inserted between consecutive
* words of a transfer
*
* @cs_setup: delay to be introduced by the controller after CS is asserted
* @cs_hold: delay to be introduced by the controller before CS is deasserted
* @cs_inactive: delay to be introduced by the controller after CS is
* deasserted. If @cs_change_delay is used from @spi_transfer, then the
* two delays will be added up.
* @statistics: statistics for the spi_device
*
* A @spi_device is used to interchange data between an SPI slave
@ -188,6 +192,10 @@ struct spi_device {
int cs_gpio; /* LEGACY: chip select gpio */
struct gpio_desc *cs_gpiod; /* chip select gpio desc */
struct spi_delay word_delay; /* inter-word delay */
/* CS delays */
struct spi_delay cs_setup;
struct spi_delay cs_hold;
struct spi_delay cs_inactive;
/* the statistics */
struct spi_statistics statistics;
@ -339,6 +347,7 @@ extern struct spi_device *spi_new_ancillary_device(struct spi_device *spi, u8 ch
* @max_speed_hz: Highest supported transfer speed
* @flags: other constraints relevant to this driver
* @slave: indicates that this is an SPI slave controller
* @devm_allocated: whether the allocation of this struct is devres-managed
* @max_transfer_size: function that returns the max transfer size for
* a &spi_device; may be %NULL, so the default %SIZE_MAX will be used.
* @max_message_size: function that returns the max message size for
@ -412,11 +421,6 @@ extern struct spi_device *spi_new_ancillary_device(struct spi_device *spi, u8 ch
* controller has native support for memory like operations.
* @unprepare_message: undo any work done by prepare_message().
* @slave_abort: abort the ongoing transfer request on an SPI slave controller
* @cs_setup: delay to be introduced by the controller after CS is asserted
* @cs_hold: delay to be introduced by the controller before CS is deasserted
* @cs_inactive: delay to be introduced by the controller after CS is
* deasserted. If @cs_change_delay is used from @spi_transfer, then the
* two delays will be added up.
* @cs_gpios: LEGACY: array of GPIO descs to use as chip select lines; one per
* CS number. Any individual value may be -ENOENT for CS lines that
* are not GPIOs (driven by the SPI controller itself). Use the cs_gpiods
@ -511,7 +515,7 @@ struct spi_controller {
#define SPI_MASTER_GPIO_SS BIT(5) /* GPIO CS must select slave */
/* flag indicating this is a non-devres managed controller */
/* flag indicating if the allocation of this struct is devres-managed */
bool devm_allocated;
/* flag indicating this is an SPI slave controller */
@ -550,8 +554,7 @@ struct spi_controller {
* to configure specific CS timing through spi_set_cs_timing() after
* spi_setup().
*/
int (*set_cs_timing)(struct spi_device *spi, struct spi_delay *setup,
struct spi_delay *hold, struct spi_delay *inactive);
int (*set_cs_timing)(struct spi_device *spi);
/* bidirectional bulk transfers
*
@ -638,11 +641,6 @@ struct spi_controller {
/* Optimized handlers for SPI memory-like operations. */
const struct spi_controller_mem_ops *mem_ops;
/* CS delays */
struct spi_delay cs_setup;
struct spi_delay cs_hold;
struct spi_delay cs_inactive;
/* gpio chip select */
int *cs_gpios;
struct gpio_desc **cs_gpiods;