drm/amd/display: Change null plane state swizzle mode to 4kb_s
[Why] During SetPathMode and UpdatePlanes, the plane state can be null. We default to linear swizzle mode when plane state is null. This resulted in bandwidth validation failing when trying to set 8K60 mode (which previously passed validation during rebuild timing list). [How] Change the default swizzle mode from linear to 4kb_s and update pitch accordingly. Signed-off-by: George Shen <george.shen@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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1 changed files with 2 additions and 2 deletions
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@ -2223,7 +2223,7 @@ int dcn20_populate_dml_pipes_from_context(
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if (!res_ctx->pipe_ctx[i].plane_state) {
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pipes[pipe_cnt].pipe.src.is_hsplit = pipes[pipe_cnt].pipe.dest.odm_combine != dm_odm_combine_mode_disabled;
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pipes[pipe_cnt].pipe.src.source_scan = dm_horz;
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pipes[pipe_cnt].pipe.src.sw_mode = dm_sw_linear;
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pipes[pipe_cnt].pipe.src.sw_mode = dm_sw_4kb_s;
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pipes[pipe_cnt].pipe.src.macro_tile_size = dm_64k_tile;
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pipes[pipe_cnt].pipe.src.viewport_width = timing->h_addressable;
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if (pipes[pipe_cnt].pipe.src.viewport_width > 1920)
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@ -2235,7 +2235,7 @@ int dcn20_populate_dml_pipes_from_context(
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pipes[pipe_cnt].pipe.src.surface_width_y = pipes[pipe_cnt].pipe.src.viewport_width;
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pipes[pipe_cnt].pipe.src.surface_height_c = pipes[pipe_cnt].pipe.src.viewport_height;
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pipes[pipe_cnt].pipe.src.surface_width_c = pipes[pipe_cnt].pipe.src.viewport_width;
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pipes[pipe_cnt].pipe.src.data_pitch = ((pipes[pipe_cnt].pipe.src.viewport_width + 63) / 64) * 64; /* linear sw only */
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pipes[pipe_cnt].pipe.src.data_pitch = ((pipes[pipe_cnt].pipe.src.viewport_width + 255) / 256) * 256;
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pipes[pipe_cnt].pipe.src.source_format = dm_444_32;
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pipes[pipe_cnt].pipe.dest.recout_width = pipes[pipe_cnt].pipe.src.viewport_width; /*vp_width/hratio*/
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pipes[pipe_cnt].pipe.dest.recout_height = pipes[pipe_cnt].pipe.src.viewport_height; /*vp_height/vratio*/
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