powerpc updates for 4.2
- Disable the 32-bit vdso when building LE, so we can build with a 64-bit only
toolchain.
- EEH fixes from Gavin & Richard.
- Enable the sys_kcmp syscall from Laurent.
- Sysfs control for fastsleep workaround from Shreyas.
- Expose OPAL events as an irq chip by Alistair.
- MSI ops moved to pci_controller_ops by Daniel.
- Fix for kernel to userspace backtraces for perf from Anton.
- Merge pseries and pseries_le defconfigs from Cyril.
- CXL in-kernel API from Mikey.
- OPAL prd driver from Jeremy.
- Fix for DSCR handling & tests from Anshuman.
- Powernv flash mtd driver from Cyril.
- Dynamic DMA Window support on powernv from Alexey.
- LLVM clang fixes & workarounds from Anton.
- Reworked version of the patch to abort syscalls when transactional.
- Fix the swap encoding to support 4TB, from Aneesh.
- Various fixes as usual.
- Freescale updates from Scott: Highlights include more 8xx optimizations, an
e6500 hugetlb optimization, QMan device tree nodes, t1024/t1023 support, and
various fixes and cleanup.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJViSZqAAoJEFHr6jzI4aWAA7kQAKq3+pejfo2rY7alpKJyeVao
vlaIEaDNOTh+ctcmu3MFF9Jy6fai8gNZziRXU5JRmE5RW4GVBN4KZiqXRbkVjdBK
uG9sCX7Y58VRsS2vnGBYLsamfTMgjaXeDvgunQHVLiechJnrDr0RHEK90F3LSi73
Axp6l8XIG63a3zFZmkhzANMCme2lm5+MWmGlSjUUNi5F+viQUgJc5iiO8xrVUgM5
RpNlV2NJSqFiU+gMQWJ226V85UIniouq4j+qtyUcu8/m9BberyolXVU0GPlPFdsx
r/Qh9uCJyZaUdSB5hzomQZj50IsSz6J6nEuJTeGRoVZOmeI8Dnc2xU9fxQF5fC8H
lUJw10WPoNOggQZTeSUKn7wTXw3i4p3KsWNUczaW68VJdhqZUVaSp0+I6mnDSqzs
9iGC+VffLYNa1OHq7mGRFrgDdLBCHes31aZ3CxlQsmyNpAPCwMzsD4TUfVnvOG6E
oJOeaQ4mZM9PvqxEYJfoIL+vgRxmQ8sdIBtNY4in+C7J6eFnZNFO9xmPnJZuVU31
PGtx60kjFCOVMXvqn34WkRNbgqGWI91IK0KcRwFO2LXVio1uY77TWL52kNK2IMsp
Az+VDDvqnT3+BoV1yz0P6SrXAkwTpvFk2y+IdmEiUUN7zZFL5ZSA2epej9AzHTAK
WID2bc5yVtIL6p6x5ICH
=d9Wh
-----END PGP SIGNATURE-----
Merge tag 'powerpc-4.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mpe/linux
Pull powerpc updates from Michael Ellerman:
- disable the 32-bit vdso when building LE, so we can build with a
64-bit only toolchain.
- EEH fixes from Gavin & Richard.
- enable the sys_kcmp syscall from Laurent.
- sysfs control for fastsleep workaround from Shreyas.
- expose OPAL events as an irq chip by Alistair.
- MSI ops moved to pci_controller_ops by Daniel.
- fix for kernel to userspace backtraces for perf from Anton.
- merge pseries and pseries_le defconfigs from Cyril.
- CXL in-kernel API from Mikey.
- OPAL prd driver from Jeremy.
- fix for DSCR handling & tests from Anshuman.
- Powernv flash mtd driver from Cyril.
- dynamic DMA Window support on powernv from Alexey.
- LLVM clang fixes & workarounds from Anton.
- reworked version of the patch to abort syscalls when transactional.
- fix the swap encoding to support 4TB, from Aneesh.
- various fixes as usual.
- Freescale updates from Scott: Highlights include more 8xx
optimizations, an e6500 hugetlb optimization, QMan device tree nodes,
t1024/t1023 support, and various fixes and cleanup.
* tag 'powerpc-4.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mpe/linux: (180 commits)
cxl: Fix typo in debug print
cxl: Add CXL_KERNEL_API config option
powerpc/powernv: Fix wrong IOMMU table in pnv_ioda_setup_bus_dma()
powerpc/mm: Change the swap encoding in pte.
powerpc/mm: PTE_RPN_MAX is not used, remove the same
powerpc/tm: Abort syscalls in active transactions
powerpc/iommu/ioda2: Enable compile with IOV=on and IOMMU_API=off
powerpc/include: Add opal-prd to installed uapi headers
powerpc/powernv: fix construction of opal PRD messages
powerpc/powernv: Increase opal-irqchip initcall priority
powerpc: Make doorbell check preemption safe
powerpc/powernv: pnv_init_idle_states() should only run on powernv
macintosh/nvram: Remove as unused
powerpc: Don't use gcc specific options on clang
powerpc: Don't use -mno-strict-align on clang
powerpc: Only use -mtraceback=no, -mno-string and -msoft-float if toolchain supports it
powerpc: Only use -mabi=altivec if toolchain supports it
powerpc: Fix duplicate const clang warning in user access code
vfio: powerpc/spapr: Support Dynamic DMA windows
vfio: powerpc/spapr: Register memory and define IOMMU v2
...
This commit is contained in:
Linus Torvalds
commit
08d183e3c1
210 changed files with 9267 additions and 2225 deletions
|
|
@ -36,6 +36,8 @@
|
|||
/* Two-stage IOMMU */
|
||||
#define VFIO_TYPE1_NESTING_IOMMU 6 /* Implies v2 */
|
||||
|
||||
#define VFIO_SPAPR_TCE_v2_IOMMU 7
|
||||
|
||||
/*
|
||||
* The IOCTL interface is designed for extensibility by embedding the
|
||||
* structure length (argsz) and flags into structures passed between
|
||||
|
|
@ -442,6 +444,23 @@ struct vfio_iommu_type1_dma_unmap {
|
|||
|
||||
/* -------- Additional API for SPAPR TCE (Server POWERPC) IOMMU -------- */
|
||||
|
||||
/*
|
||||
* The SPAPR TCE DDW info struct provides the information about
|
||||
* the details of Dynamic DMA window capability.
|
||||
*
|
||||
* @pgsizes contains a page size bitmask, 4K/64K/16M are supported.
|
||||
* @max_dynamic_windows_supported tells the maximum number of windows
|
||||
* which the platform can create.
|
||||
* @levels tells the maximum number of levels in multi-level IOMMU tables;
|
||||
* this allows splitting a table into smaller chunks which reduces
|
||||
* the amount of physically contiguous memory required for the table.
|
||||
*/
|
||||
struct vfio_iommu_spapr_tce_ddw_info {
|
||||
__u64 pgsizes; /* Bitmap of supported page sizes */
|
||||
__u32 max_dynamic_windows_supported;
|
||||
__u32 levels;
|
||||
};
|
||||
|
||||
/*
|
||||
* The SPAPR TCE info struct provides the information about the PCI bus
|
||||
* address ranges available for DMA, these values are programmed into
|
||||
|
|
@ -452,14 +471,17 @@ struct vfio_iommu_type1_dma_unmap {
|
|||
* addresses too so the window works as a filter rather than an offset
|
||||
* for IOVA addresses.
|
||||
*
|
||||
* A flag will need to be added if other page sizes are supported,
|
||||
* so as defined here, it is always 4k.
|
||||
* Flags supported:
|
||||
* - VFIO_IOMMU_SPAPR_INFO_DDW: informs the userspace that dynamic DMA windows
|
||||
* (DDW) support is present. @ddw is only supported when DDW is present.
|
||||
*/
|
||||
struct vfio_iommu_spapr_tce_info {
|
||||
__u32 argsz;
|
||||
__u32 flags; /* reserved for future use */
|
||||
__u32 flags;
|
||||
#define VFIO_IOMMU_SPAPR_INFO_DDW (1 << 0) /* DDW supported */
|
||||
__u32 dma32_window_start; /* 32 bit window start (bytes) */
|
||||
__u32 dma32_window_size; /* 32 bit window size (bytes) */
|
||||
struct vfio_iommu_spapr_tce_ddw_info ddw;
|
||||
};
|
||||
|
||||
#define VFIO_IOMMU_SPAPR_TCE_GET_INFO _IO(VFIO_TYPE, VFIO_BASE + 12)
|
||||
|
|
@ -470,12 +492,23 @@ struct vfio_iommu_spapr_tce_info {
|
|||
* - unfreeze IO/DMA for frozen PE;
|
||||
* - read PE state;
|
||||
* - reset PE;
|
||||
* - configure PE.
|
||||
* - configure PE;
|
||||
* - inject EEH error.
|
||||
*/
|
||||
struct vfio_eeh_pe_err {
|
||||
__u32 type;
|
||||
__u32 func;
|
||||
__u64 addr;
|
||||
__u64 mask;
|
||||
};
|
||||
|
||||
struct vfio_eeh_pe_op {
|
||||
__u32 argsz;
|
||||
__u32 flags;
|
||||
__u32 op;
|
||||
union {
|
||||
struct vfio_eeh_pe_err err;
|
||||
};
|
||||
};
|
||||
|
||||
#define VFIO_EEH_PE_DISABLE 0 /* Disable EEH functionality */
|
||||
|
|
@ -492,9 +525,70 @@ struct vfio_eeh_pe_op {
|
|||
#define VFIO_EEH_PE_RESET_HOT 6 /* Assert hot reset */
|
||||
#define VFIO_EEH_PE_RESET_FUNDAMENTAL 7 /* Assert fundamental reset */
|
||||
#define VFIO_EEH_PE_CONFIGURE 8 /* PE configuration */
|
||||
#define VFIO_EEH_PE_INJECT_ERR 9 /* Inject EEH error */
|
||||
|
||||
#define VFIO_EEH_PE_OP _IO(VFIO_TYPE, VFIO_BASE + 21)
|
||||
|
||||
/**
|
||||
* VFIO_IOMMU_SPAPR_REGISTER_MEMORY - _IOW(VFIO_TYPE, VFIO_BASE + 17, struct vfio_iommu_spapr_register_memory)
|
||||
*
|
||||
* Registers user space memory where DMA is allowed. It pins
|
||||
* user pages and does the locked memory accounting so
|
||||
* subsequent VFIO_IOMMU_MAP_DMA/VFIO_IOMMU_UNMAP_DMA calls
|
||||
* get faster.
|
||||
*/
|
||||
struct vfio_iommu_spapr_register_memory {
|
||||
__u32 argsz;
|
||||
__u32 flags;
|
||||
__u64 vaddr; /* Process virtual address */
|
||||
__u64 size; /* Size of mapping (bytes) */
|
||||
};
|
||||
#define VFIO_IOMMU_SPAPR_REGISTER_MEMORY _IO(VFIO_TYPE, VFIO_BASE + 17)
|
||||
|
||||
/**
|
||||
* VFIO_IOMMU_SPAPR_UNREGISTER_MEMORY - _IOW(VFIO_TYPE, VFIO_BASE + 18, struct vfio_iommu_spapr_register_memory)
|
||||
*
|
||||
* Unregisters user space memory registered with
|
||||
* VFIO_IOMMU_SPAPR_REGISTER_MEMORY.
|
||||
* Uses vfio_iommu_spapr_register_memory for parameters.
|
||||
*/
|
||||
#define VFIO_IOMMU_SPAPR_UNREGISTER_MEMORY _IO(VFIO_TYPE, VFIO_BASE + 18)
|
||||
|
||||
/**
|
||||
* VFIO_IOMMU_SPAPR_TCE_CREATE - _IOWR(VFIO_TYPE, VFIO_BASE + 19, struct vfio_iommu_spapr_tce_create)
|
||||
*
|
||||
* Creates an additional TCE table and programs it (sets a new DMA window)
|
||||
* to every IOMMU group in the container. It receives page shift, window
|
||||
* size and number of levels in the TCE table being created.
|
||||
*
|
||||
* It allocates and returns an offset on a PCI bus of the new DMA window.
|
||||
*/
|
||||
struct vfio_iommu_spapr_tce_create {
|
||||
__u32 argsz;
|
||||
__u32 flags;
|
||||
/* in */
|
||||
__u32 page_shift;
|
||||
__u64 window_size;
|
||||
__u32 levels;
|
||||
/* out */
|
||||
__u64 start_addr;
|
||||
};
|
||||
#define VFIO_IOMMU_SPAPR_TCE_CREATE _IO(VFIO_TYPE, VFIO_BASE + 19)
|
||||
|
||||
/**
|
||||
* VFIO_IOMMU_SPAPR_TCE_REMOVE - _IOW(VFIO_TYPE, VFIO_BASE + 20, struct vfio_iommu_spapr_tce_remove)
|
||||
*
|
||||
* Unprograms a TCE table from all groups in the container and destroys it.
|
||||
* It receives a PCI bus offset as a window id.
|
||||
*/
|
||||
struct vfio_iommu_spapr_tce_remove {
|
||||
__u32 argsz;
|
||||
__u32 flags;
|
||||
/* in */
|
||||
__u64 start_addr;
|
||||
};
|
||||
#define VFIO_IOMMU_SPAPR_TCE_REMOVE _IO(VFIO_TYPE, VFIO_BASE + 20)
|
||||
|
||||
/* ***************************************************************** */
|
||||
|
||||
#endif /* _UAPIVFIO_H */
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue