clk: sunxi-ng: h6-r: Add R_APB2_RSB clock and reset

While no information about the H6 RSB controller is included in the
datasheet or manual, the vendor BSP and power management blob both
reference the RSB clock parent and register address. These values were
verified by experimentation.

Since this clock/reset are added late, the specifier is added at the end
to maintain the existing DT binding. The code is kept in register order.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
This commit is contained in:
Samuel Holland 2021-01-03 04:00:04 -06:00 committed by Chen-Yu Tsai
parent 5c8fe583cc
commit 0482a4e6de
4 changed files with 9 additions and 1 deletions

View file

@ -21,4 +21,6 @@
#define CLK_IR 11
#define CLK_W1 12
#define CLK_R_APB2_RSB 13
#endif /* _DT_BINDINGS_CLK_SUN50I_H6_R_CCU_H_ */