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drm/amd/display: [FW Promotion] Release 0.0.71

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- Introduce CMD for EDID CEA block parsing
- Add SCR5 definition for reporting eDP power sequencer status

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Bindu Ramamurthy <bindu.r@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Anthony Koo 2021-06-12 20:33:42 -04:00 • committed by Alex Deucher
parent 7335d95659
commit 021eaef8ae
1 changed files with 88 additions and 2 deletions
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90
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
View file

@ -47,10 +47,10 @@
/* Firmware versioning. */
#ifdef DMUB_EXPOSE_VERSION
#define DMUB_FW_VERSION_GIT_HASH 0x5cac099d3
#define DMUB_FW_VERSION_GIT_HASH 0xf3da2b656
#define DMUB_FW_VERSION_MAJOR 0
#define DMUB_FW_VERSION_MINOR 0
#define DMUB_FW_VERSION_REVISION 70
#define DMUB_FW_VERSION_REVISION 71
#define DMUB_FW_VERSION_TEST 0
#define DMUB_FW_VERSION_VBIOS 0
#define DMUB_FW_VERSION_HOTFIX 0
@ -309,6 +309,7 @@ struct dmcub_trace_buf_entry {
* Current scratch register usage is as follows:
*
* SCRATCH0: FW Boot Status register
* SCRATCH5: LVTMA Status Register
* SCRATCH15: FW Boot Options register
*/
@ -335,6 +336,21 @@ enum dmub_fw_boot_status_bit {
DMUB_FW_BOOT_STATUS_BIT_RESTORE_REQUIRED = (1 << 3), /**< 1 if driver should call restore */
};
/* Register bit definition for SCRATCH5 */
union dmub_lvtma_status {
struct {
uint32_t psp_ok : 1;
uint32_t edp_on : 1;
uint32_t reserved : 30;
} bits;
uint32_t all;
};
enum dmub_lvtma_status_bit {
DMUB_LVTMA_STATUS_BIT_PSP_OK = (1 << 0),
DMUB_LVTMA_STATUS_BIT_EDP_ON = (1 << 1),
};
/**
* union dmub_fw_boot_options - Boot option definitions for SCRATCH15
*/
@ -629,6 +645,10 @@ enum dmub_cmd_type {
*/
DMUB_CMD__PANEL_CNTL = 74,
#endif
/**
* Command type used for EDID CEA parsing
*/
DMUB_CMD__EDID_CEA = 79,
/**
* Command type used for all VBIOS interface commands.
*/
@ -2152,6 +2172,68 @@ struct dmub_rb_cmd_lvtma_control {
struct dmub_cmd_lvtma_control_data data;
};
/**
* Maximum number of bytes a chunk sent to DMUB for parsing
*/
#define DMUB_EDID_CEA_DATA_CHUNK_BYTES 8
/**
* Represent a chunk of CEA blocks sent to DMUB for parsing
*/
struct dmub_cmd_send_edid_cea {
uint16_t offset; /**< offset into the CEA block */
uint8_t length; /**< number of bytes in payload to copy as part of CEA block */
uint16_t total_length; /**< total length of the CEA block */
uint8_t payload[DMUB_EDID_CEA_DATA_CHUNK_BYTES]; /**< data chunk of the CEA block */
uint8_t pad[3]; /**< padding and for future expansion */
};
/**
* Result of VSDB parsing from CEA block
*/
struct dmub_cmd_edid_cea_amd_vsdb {
uint8_t vsdb_found; /**< 1 if parsing has found valid AMD VSDB */
uint8_t freesync_supported; /**< 1 if Freesync is supported */
uint16_t amd_vsdb_version; /**< AMD VSDB version */
uint16_t min_frame_rate; /**< Maximum frame rate */
uint16_t max_frame_rate; /**< Minimum frame rate */
};
/**
* Result of sending a CEA chunk
*/
struct dmub_cmd_edid_cea_ack {
uint16_t offset; /**< offset of the chunk into the CEA block */
uint8_t success; /**< 1 if this sending of chunk succeeded */
uint8_t pad; /**< padding and for future expansion */
};
/**
* Specify whether the result is an ACK/NACK or the parsing has finished
*/
enum dmub_cmd_edid_cea_reply_type {
DMUB_CMD__EDID_CEA_AMD_VSDB = 1, /**< VSDB parsing has finished */
DMUB_CMD__EDID_CEA_ACK = 2, /**< acknowledges the CEA sending is OK or failing */
};
/**
* Definition of a DMUB_CMD__EDID_CEA command.
*/
struct dmub_rb_cmd_edid_cea {
struct dmub_cmd_header header; /**< Command header */
union dmub_cmd_edid_cea_data {
struct dmub_cmd_send_edid_cea input; /**< input to send CEA chunks */
struct dmub_cmd_edid_cea_output { /**< output with results */
uint8_t type; /**< dmub_cmd_edid_cea_reply_type */
union {
struct dmub_cmd_edid_cea_amd_vsdb amd_vsdb;
struct dmub_cmd_edid_cea_ack ack;
};
} output; /**< output to retrieve ACK/NACK or VSDB parsing results */
} data; /**< Command data */
};
/**
* union dmub_rb_cmd - DMUB inbox command.
*/
@ -2290,6 +2372,10 @@ union dmub_rb_cmd {
* Definition of a DMUB_CMD__VBIOS_LVTMA_CONTROL command.
*/
struct dmub_rb_cmd_lvtma_control lvtma_control;
/**
* Definition of a DMUB_CMD__EDID_CEA command.
*/
struct dmub_rb_cmd_edid_cea edid_cea;
};
/**