linux-xiaomi-chiron/include/asm-blackfin/fixed_code.h

/* This file defines the fixed addresses where userspace programs can find
   atomic code sequences.  */

#define FIXED_CODE_START	0x400

#define SIGRETURN_STUB		0x400

#define ATOMIC_SEQS_START	0x410

#define ATOMIC_XCHG32		0x410
#define ATOMIC_CAS32		0x420
#define ATOMIC_ADD32		0x430
#define ATOMIC_SUB32		0x440
#define ATOMIC_IOR32		0x450
#define ATOMIC_AND32		0x460
#define ATOMIC_XOR32		0x470

#define ATOMIC_SEQS_END		0x480

#define FIXED_CODE_END		0x480
Blackfin arch: defines and provides entry points for certain user space functions at fixed addresses This patch defines (and provides) entry points for certain user space functions at fixed addresses. The Blackfin has no usable atomic instructions, but we can ensure that these code sequences appear atomic from a user space point of view by detecting when we're in the process of executing them during the interrupt handler return path. This allows much more efficient pthread lock implementations than the bfin_spinlock syscall we're currently using. Also provided is a small sys_rt_sigreturn stub which can be used by the signal handler setup code. The signal.c part will be committed separately. Signed-off-by: Bernd Schmidt <bernd.schmidt@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com> 2007-06-21 11:34:16 +08:00			`/* This file defines the fixed addresses where userspace programs can find`
			`atomic code sequences. */`

			`#define FIXED_CODE_START 0x400`

			`#define SIGRETURN_STUB 0x400`

			`#define ATOMIC_SEQS_START 0x410`

			`#define ATOMIC_XCHG32 0x410`
			`#define ATOMIC_CAS32 0x420`
			`#define ATOMIC_ADD32 0x430`
			`#define ATOMIC_SUB32 0x440`
			`#define ATOMIC_IOR32 0x450`
			`#define ATOMIC_AND32 0x460`
			`#define ATOMIC_XOR32 0x470`

			`#define ATOMIC_SEQS_END 0x480`

			`#define FIXED_CODE_END 0x480`